For add new hardware, not only need to lock lat hardware, also
need to lock core hardware in case of different instance start
to decoder at the same time.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec.c | 4 ++--
Adds decoder dt-bindings for mt8192.
Reviewed-by: Rob Herring
Signed-off-by: Yunfei Dong
---
.../media/mediatek,vcodec-subdev-decoder.yaml | 265 ++
1 file changed, 265 insertions(+)
create mode 100644
Add work queue to process core hardware information.
First, get lat_buf from message queue, then call core
hardware of each codec(H264/VP9/AV1) to decode, finally
puts lat_buf back to the message.
Reviewed-by: Steve Cho
Signed-off-by: Yunfei Dong
---
Generalizes power and clock on/off interfaces to support different hardware.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 6 +-
.../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 2 +-
Separate decoder and encoder document for the dts are big difference.
Reviewed-by: Rob Herring
Signed-off-by: Yunfei Dong
---
.../media/mediatek,vcodec-decoder.yaml| 176 +
.../media/mediatek,vcodec-encoder.yaml| 187 ++
There is just one core thread, in order to separate different
hardware, using codec type to separeate it in scp driver.
Signed-off-by: Yunfei Dong
Reviewed-by: AngeloGioacchino Del Regno
---
.../media/platform/mtk-vcodec/vdec_ipi_msg.h | 12 ---
Use the dma_set_mask_and_coherent helper to set vdec
DMA bit mask to support 34bits iova space(16GB) that
the mt8192 iommu HW support.
Whole the iova range separate to 0~4G/4G~8G/8G~12G/12G~16G,
regarding which iova range VDEC actually locate, it
depends on the dma-ranges property of vdec dtsi
Separates different architecture for hardware: pure_sin_core
and lat_sin_core. MT8183 is pure single core. Uses .hw_arch to
distinguish.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_stateful.c | 1 +
Adds irq interface for multi hardware.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 33 ---
.../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 2 +-
.../platform/mtk-vcodec/mtk_vcodec_drv.h | 25
When mtk vcodec decoder is build as a module, we need to export
mtk-vcodec-dec pm functions to make them visible by the other components.
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Benjamin Gaignard
Signed-off-by: Yunfei Dong
---
For lat and core architecture, lat thread will send message to core
thread when lat decode done. Core hardware will use the message
from lat to decode, then free message to lat thread when decode done.
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/Makefile| 1 +
There are more than two hardwares for decoder: LAT0, LAT1 and CORE. In order to
manage these hardwares, register each hardware as independent platform device
for the larbs are different.
Each hardware module controls its own information which includes
interrupt/power/
clocks/registers.
Calling
Using the needed params for pm init/release function and remove unused
param mtkdev in 'struct mtk_vcodec_pm'.
Reviewed-by: Tzung-Bi Shih
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Steve Cho
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 6 ++---
This series adds support for multi hardware decode into mtk-vcodec, by first
adding use
of_platform_populate to manage each hardware information: interrupt, clock,
register
bases and power. Secondly add core work queue to deal with core hardware
message,
at the same time, add msg queue for
From: Yunfei Dong
Adds MT8192's compatible "mediatek,mt8192-vcodec-dec".
Adds MT8192's device private data mtk_lat_sig_core_pdata.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Yunfei Dong
---
.../media/platform/mtk-vcodec/mtk_vcodec_dec.h | 1 +
Vdec and venc can use the same function to wake up interrupt event.
Reviewed-by: Tzung-Bi Shih
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Steve Cho
Signed-off-by: Yunfei Dong
---
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 9 +
Different platforms may have different numbers of register bases. Gets the
numbers of register bases from dts (sizeof(u32) * 4 bytes for each).
Reviewed-by: Tzung-Bi Shih
Signed-off-by: Yunfei Dong
---
.../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 37 ++-
1 file changed, 28
From: Thierry Reding
This function can return one of several errors in an ERR_PTR()-encoded
pointer, so make sure to propogate those on failure.
Suggested-by: Robin Murphy
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/tegra/vic.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
On Fri, Dec 10, 2021 at 05:54:44PM +, Robin Murphy wrote:
> Upon failure, dma_alloc_coherent() returns NULL. If that does happen,
> passing some uninitialised stack contents to dma_mapping_error() - which
> belongs to a different API in the first place - has precious little
> chance of
On Fri, Dec 10, 2021 at 05:54:43PM +, Robin Murphy wrote:
> Host1x seems to be relying on picking up dma-mapping.h transitively from
> iova.h, which has no reason to include it in the first place. Fix the
> former issue before we totally break things by fixing the latter one.
>
> CC: Thierry
On 15/12/2021 22:45, john.c.harri...@intel.com wrote:
From: John Harrison
A fault injection probe test hit a BUG_ON in a GuC error path. It
showed that the GuC code could potentially attempt to do many things
when the device is actually wedged. So, add a check in to prevent that.
Hi Thomas,
Thanks for your review
On Wed, Dec 15, 2021 at 04:11:50PM +0100, Thomas Zimmermann wrote:
> Hi,
>
> I have a number of comments below. But if you want, you can add
>
> Acked-by: Thomas Zimmermann
Thanks :)
> Am 15.12.21 um 10:17 schrieb Maxime Ripard:
> > From: Dave Stevenson
>
Am 15.12.21 um 22:09 schrieb Ira Weiny:
On Tue, Dec 14, 2021 at 08:09:29AM +0100, Christian König wrote:
Am 14.12.21 um 04:37 schrieb Ira Weiny:
On Mon, Dec 13, 2021 at 09:37:32PM +0100, Christian König wrote:
Am 11.12.21 um 00:24 schrieb ira.we...@intel.com:
From: Ira Weiny
The default
Hi Dave, Daniel,
Here's this week drm-misc-fixes PR.
Note that dim pull-request was stalling when generating the email, so I
had to send this with git request-pull, hence the odd tag name and the
format slightly different.
Maxime
The following changes since commit
Hi
Am 15.12.21 um 22:37 schrieb Noralf Trønnes:
Den 15.12.2021 01.59, skrev Javier Martinez Canillas:
According to disable Documentation/admin-guide/kernel-parameters.txt, this
parameter can be used to disable kernel modesetting.
DRM drivers will not perform display-mode changes or
Am 16.12.21 um 05:39 schrieb Huang Rui:
Fix the typo to align with the prototype and function name.
All warnings (new ones prefixed by >>):
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:631: warning: expecting
prototype for amdgpu_fence_clear_job_fences(). Prototype was for
Hi Zongmin,
that strongly sounds like the ASIC is not correctly initialized when
trying to read the register.
What board and environment are you using this GPU with? Is that a normal
x86 system?
Regards,
Christian.
Am 16.12.21 um 04:11 schrieb 周宗敏:
1.
the problematic boards that I
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