On 2022-11-25 05:21, Christian König wrote:
We already fallback to a dummy BO with no backing store when we
allocate GDS,GWS and OA resources and to GTT when we allocate VRAM.
Drop all those workarounds and generalize this for GTT as well. This
fixes ENOMEM issues with runaway applications
Hi Christian,
On Fri, 9 Dec 2022 at 12:45, Christian König
wrote:
>
> The init order and resulting error handling in dma_buf_export
> was pretty messy.
>
> Subordinate objects like the file and the sysfs kernel objects
> were initializing and wiring itself up with the object in the
> wrong order
Applied. Thanks!
Alex
On Fri, Dec 9, 2022 at 3:24 AM Paulo Miguel Almeida
wrote:
>
> One-element arrays are deprecated, and we are replacing them with
> flexible array members instead. So, replace one-element array with
> flexible-array member in structs _ATOM_DISPLAY_OBJECT_PATH,
>
On Fri, Dec 9, 2022, at 23:05, Uwe Kleine-König wrote:
> Some of these dependencies used to be sensible when only a small part of
> the platforms supported by ARCH=arm could be compiled together in a
> single kernel image. Nowadays ARCH_MULTIPLATFORM is only used as a guard
> for kernel options
Some of these dependencies used to be sensible when only a small part of
the platforms supported by ARCH=arm could be compiled together in a
single kernel image. Nowadays ARCH_MULTIPLATFORM is only used as a guard
for kernel options incompatible with a multiplatform image. See commit
84fc86360623
The missing DPCD defintions from DP2.0 spec is as follows:
DOWNSPREAD_CTRL (107h):
FIXED_VTOTAL_AS_SDP_EN_IN_PR_ACTIVE (bit 6)
For sink devices that support Adaptive-Sync operation
and Panel Replay
DPRX_FEATURE_ENUMERATION_LIST_CONT_1 (2214h):
The commit subject is very generic. A better one might be
"Add missing Adaptive Sync DPCD definitions"
On 12/8/22 14:25, Sung Joon Kim wrote:
> The missing DPCD defintions from DP2.0 spec is as follows:
>
> DOWNSPREAD_CTRL (107h):
> ADAPTIVE_SYNC_SDP_EN (bit 6)
> For sink
On Wed, Nov 30, 2022 at 04:21:37PM +0100, Uwe Kleine-König wrote:
> Hello,
>
> I forgot about this series and was remembered when I talked to Conor
> Dooley about how .get_state() should behave in an error case.
>
> Compared to (implicit) v1, sent with Message-Id:
>
On Thu, 08 Dec 2022 15:08:40 +0100, Alexander Stein wrote:
> i.MX8MP uses 3 clocks, so soften the restrictions for clocks & clock-names.
> This SoC requires a power-domain for this peripheral to use. Add it as
> a required property.
>
> Fixes: f5419cb0743f ("dt-bindings: lcdif: Add compatible
On Fri, Dec 9, 2022 at 8:29 AM Ruhl, Michael J wrote:
>
> >-Original Message-
> >From: dri-devel On Behalf Of
> >Christian König
> >Sent: Friday, December 9, 2022 2:16 AM
> >To: quic_chara...@quicinc.com; cuigaoshe...@huawei.com;
> >sumit.sem...@linaro.org
> >Cc:
On 12/6/22 06:30, Rijo Thomas wrote:
For AMD Secure Processor (ASP) to map and access TEE ring buffer, the
ring buffer address sent by host to ASP must be a real physical
address and the pages must be physically contiguous.
In a virtualized environment though, when the driver is running in a
On 2022-09-30 20:08:11, Konrad Dybcio wrote:
> Add support for the Sony TD4353 JDI 2160x1080 display panel used in
This is a vertical panel of 1080x2160 right?
> some Sony Xperia XZ2 and XZ2 Compact smartphones. Due to the specifics
> of smartphone manufacturing, it is impossible to retrieve a
On Fri, Dec 09, 2022 at 08:56:28PM +0200, Andy Shevchenko wrote:
> On Fri, Dec 09, 2022 at 04:48:39PM +0100, Andrzej Hajda wrote:
...
> > I hope there will be place for such tiny helper in kernel.
> > Quick cocci analyze shows there is probably few thousands places
> > where it could be used, of
On Fri, Dec 09, 2022 at 04:48:39PM +0100, Andrzej Hajda wrote:
> The pattern of setting variable with new value and returning old
> one is very common in kernel. Usually atomicity of the operation
> is not required, so xchg seems to be suboptimal and confusing in
> such cases. Since name xchg is
On Sun, 14 Aug 2022 16:46:54 -0700, Vinay Belgaumkar wrote:
>
> Host Turbo operates at efficient frequency when GT is not idle unless
> the user or workload has forced it to a higher level. Replicate the same
> behavior in SLPC by allowing the algorithm to use efficient frequency.
> We had
On Thu, 8 Dec 2022 at 22:06, Bjorn Andersson wrote:
>
> On Thu, Dec 08, 2022 at 02:40:55PM +0100, Ulf Hansson wrote:
> > On Wed, 7 Dec 2022 at 17:55, Bjorn Andersson wrote:
> > >
> > > On Wed, Dec 07, 2022 at 05:00:51PM +0100, Ulf Hansson wrote:
> > > > On Thu, 1 Dec 2022 at 23:57, Bjorn
On Fri, Dec 9, 2022, at 16:48, Andrzej Hajda wrote:
> The pattern of setting variable with new value and returning old
> one is very common in kernel. Usually atomicity of the operation
> is not required, so xchg seems to be suboptimal and confusing in
> such cases. Since name xchg is already in
On Fri, Dec 9, 2022 at 4:32 AM Pekka Paalanen wrote:
>
> On Fri, 9 Dec 2022 17:26:06 +0900
> Tomasz Figa wrote:
>
> > On Mon, Dec 5, 2022 at 5:29 PM Christian König
> > wrote:
> > >
> > > Hi Tomasz,
> > >
> > > Am 05.12.22 um 07:41 schrieb Tomasz Figa:
> > > > [SNIP]
> > > >> In other words
>-Original Message-
>From: dri-devel On Behalf Of
>Christian König
>Sent: Friday, December 9, 2022 2:16 AM
>To: quic_chara...@quicinc.com; cuigaoshe...@huawei.com;
>sumit.sem...@linaro.org
>Cc: linaro-mm-...@lists.linaro.org; dri-devel@lists.freedesktop.org; linux-
>me...@vger.kernel.org
Better use recently introduced kernel core helper.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 4 ++--
drivers/gpu/drm/i915/gem/i915_gem_stolen.c| 2 +-
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 6 +++---
Better use recently introduced kernel core helper.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gvt/kvmgt.c | 2 +-
drivers/gpu/drm/i915/gvt/scheduler.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c
Better use recently introduced kernel core helper.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/display/icl_dsi.c| 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 6 ++---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
Better use recently introduced kernel core helper.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c| 2 +-
drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 4 ++--
The pattern of setting variable with new value and returning old
one is very common in kernel. Usually atomicity of the operation
is not required, so xchg seems to be suboptimal and confusing in
such cases. Since name xchg is already in use and __xchg is used
in architecture code, proposition is
Add extras to support i.MX8M Plus. The main change is the removal of
HS/VS/DE signal inversion in the LCDIFv3-DSIM glue logic, otherwise
the implementation of this IP in i.MX8M Plus is very much compatible
with the i.MX8M Mini/Nano one.
Signed-off-by: Marek Vasut
Signed-off-by: Jagan Teki
---
Samsung MIPI DSIM bridge can also be found in i.MX8M Plus SoC.
Add dt-bingings for it.
Signed-off-by: Jagan Teki
---
Changes for v9:
- none
Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
Samsung MIPI DSIM master can also be found in i.MX8M Mini/Nano SoC.
Add compatible and associated driver_data for it.
v9:
* none
v8:
* fix and update the comment
v7, v6:
* none
v3:
* enable DSIM_QUIRK_FIXUP_SYNC_POL quirk
v5:
* [mszyprow] rebased and adjusted to the new driver initialization
Samsung MIPI DSIM bridge can also be found in i.MX8M Mini/Nano SoC.
Add dt-bingings for it.
v9:
* none
v8:
* add comment to include i.MX8M Nano.
v7, v6, v5, v4:
* none
v3:
* collect Rob Acked-by
v2:
* updated comments
v1:
* new patch
Acked-by: Rob Herring
Signed-off-by: Jagan Teki
---
LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting
the i.MX8M Mini/Nano DSI host to add additional Data Enable signal
active low (DE_LOW). This makes the valid data transfer on each
horizontal line.
So, add additional bus flags DE_LOW setting via input_bus_flags for
i.MX8M Mini/Nano
Finding the right input bus format throughout the pipeline is hard
so add atomic_get_input_bus_fmts callback and initialize with the
proper input format from list of supported output formats.
This format can be used in pipeline for negotiating bus format between
the DSI-end of this bridge and the
Look like PLL PMS_P offset value varies between platforms that have
Samsung DSIM IP.
However, there is no clear evidence for it as both Exynos and i.MX
8M Mini Application Processor Reference Manual is still referring
the PMS_P offset as 13.
The offset 13 is not working for i.MX8M Mini SoCs but
Look like an explicit fixing up of mode_flags is required for DSIM IP
present in i.MX8M Mini/Nano SoCs.
At least the LCDIF + DSIM needs active low sync polarities in order
to correlate the correct sync flags of the surrounding components in
the chain to make sure the whole pipeline can work
The existing drm panels and bridges in Exynos required host
initialization during the first DSI command transfer even though
the initialization was done before.
This host reinitialization is handled via DSIM_STATE_REINITIALIZED
flag and triggers from host transfer.
Do this exclusively for
Host transfer() in DSI master will invoke only when the DSI commands
are sent from DSI devices like DSI Panel or DSI bridges and this host
transfer wouldn't invoke for I2C-based-DSI bridge drivers.
Handling DSI host initialization in transfer calls misses the controller
setup for I2C configured
In i.MX8M Mini/Nano SoC the DSI Phy requires a MIPI DPHY bit
to reset in order to activate the PHY and that can be done via
upstream i.MX8M blk-ctrl driver.
So, mark the phy get as optional.
v9, v8, v7, v6, v5, v4, v3, v2:
* none
v1:
* new patch
Signed-off-by: Jagan Teki
---
The child devices in MIPI DSI can be binding with OF-graph
and also via child nodes.
The OF-graph interface represents the child devices via
remote and associated endpoint numbers like
dsi {
compatible = "fsl,imx8mm-mipi-dsim";
ports {
port@0 {
reg = <0>;
Samsung MIPI DSIM controller is common DSI IP that can be used in various
SoCs like Exynos, i.MX8M Mini/Nano.
In order to access this DSI controller between various platform SoCs,
the ideal way to incorporate this in the drm stack is via the drm bridge
driver.
This patch is trying to
HSA/HBP/HFP/HSE mode bits in Processor Reference Manuals specify
a naming conversion as 'disable mode bit' due to its bit definition,
0 = Enable and 1 = Disable.
For HSE bit, the i.MX 8M Mini/Nano/Plus Applications Processor
Reference Manual named this bit as 'HseDisableMode' but the bit
HFP/HBP/HSA/EOT_PACKET modes in Exynos DSI host specifies
0 = Enable and 1 = Disable.
The logic for checking these mode flags was correct before
the MIPI_DSI*_NO_* mode flag conversion.
Fix the MIPI_DSI*_NO_* mode flags handling.
Fixes: <0f3b68b66a6d> ("drm/dsi: Add _NO_ to MIPI_DSI_* flags
From: Marek Szyprowski
Restore the proper bridge chain by finding the previous bridge
in the chain instead of passing NULL.
This establishes a proper bridge chain while attaching downstream
bridges.
v9, v4:
* none
v3:
* new patch
Signed-off-by: Marek Szyprowski
Signed-off-by: Jagan Teki
From: Marek Szyprowski
Enable the drm bridge pre_enable_prev_first flag so that the
previous bridge pre_enable should be called first before the
pre_enable for the tc358764 bridge is called.
This makes sure that the previous bridge should be initialized
properly before the tc358764 bridge is
Enable the drm panel prepare_prev_first flag so-that the previous
controller should be prepared first before the prepare for the
panel is called.
samsung-s6e3ha2, samsung-s6e63j0x03 and samsung-s6e8aa0 are the
effected samsung-s6e panels for this change.
This makes sure that the previous
This series supports common bridge support for Samsung MIPI DSIM
which is used in Exynos and i.MX8MM SoC's.
The final bridge supports both the Exynos and i.MX8M Mini/Nano/Plus.
Changes for v9:
- rebase on drm-misc-next
- drop drm bridge attach fix for Exynos
- added prepare_prev_first flag
-
On 09/12/2022 00:38, Kuogee Hsieh wrote:
>
> On 12/8/2022 3:33 PM, Dmitry Baryshkov wrote:
>> On 09/12/2022 00:36, Kuogee Hsieh wrote:
>>> Add both data-lanes and link-frequencies property into endpoint
>>>
>>> Changes in v7:
>>> -- split yaml out of dtsi patch
>>> -- link-frequencies from link
On 08/12/2022 23:36, Kuogee Hsieh wrote:
> Move data-lanes property from mdss_dp node to dp_out endpoint. Also
> add link-frequencies property into dp_out endpoint as well. The last
> frequency specified at link-frequencies will be the max link rate
> supported by DP.
>
> Changes in v5:
> --
On 12/9/22 14:38, Alexander Stein wrote:
Am Freitag, 9. Dezember 2022, 13:43:02 CET schrieb Marek Vasut:
On 12/9/22 13:21, Alexander Stein wrote:
Hi Marek,
Am Freitag, 9. Dezember 2022, 13:02:10 CET schrieb Marek Vasut:
On 12/9/22 10:36, Alexander Stein wrote:
Hello Krzysztof,
Hi,
Am
Am Freitag, 9. Dezember 2022, 13:43:02 CET schrieb Marek Vasut:
> On 12/9/22 13:21, Alexander Stein wrote:
> > Hi Marek,
> >
> > Am Freitag, 9. Dezember 2022, 13:02:10 CET schrieb Marek Vasut:
> >> On 12/9/22 10:36, Alexander Stein wrote:
> >>> Hello Krzysztof,
> >>
> >> Hi,
> >>
> >>> Am
On Mon, Dec 05, 2022 at 03:56:47PM +0800, ye.xingc...@zte.com.cn wrote:
> Subject: [PATCH linux-next] backlight: use sysfs_emit() to instead of
> scnprintf()
Isn't this a v2?
(this isn't just a "nice to have"... I ended up delaying review for
several days until I had time to look up where I had
On 12/9/22 13:21, Alexander Stein wrote:
Hi Marek,
Am Freitag, 9. Dezember 2022, 13:02:10 CET schrieb Marek Vasut:
On 12/9/22 10:36, Alexander Stein wrote:
Hello Krzysztof,
Hi,
Am Freitag, 9. Dezember 2022, 10:07:45 CET schrieb Krzysztof Kozlowski:
On 09/12/2022 09:54, Alexander Stein
Hi,
Am Freitag, 9. Dezember 2022, 13:10:00 CET schrieb Krzysztof Kozlowski:
> On 09/12/2022 13:02, Marek Vasut wrote:
> > On 12/9/22 10:36, Alexander Stein wrote:
> >> Hello Krzysztof,
> >
> > Hi,
> >
> >> Am Freitag, 9. Dezember 2022, 10:07:45 CET schrieb Krzysztof Kozlowski:
> >>> On
Hi Marek,
Am Freitag, 9. Dezember 2022, 13:02:10 CET schrieb Marek Vasut:
> On 12/9/22 10:36, Alexander Stein wrote:
> > Hello Krzysztof,
>
> Hi,
>
> > Am Freitag, 9. Dezember 2022, 10:07:45 CET schrieb Krzysztof Kozlowski:
> >> On 09/12/2022 09:54, Alexander Stein wrote:
> >>> Hello Krzysztof,
On Thu, 08 Dec 2022 14:36:52 -0800, Kuogee Hsieh wrote:
> Add both data-lanes and link-frequencies property into endpoint
>
> Changes in v7:
> -- split yaml out of dtsi patch
> -- link-frequencies from link rate to symbol rate
> -- deprecation of old data-lanes property
>
> Changes in v8:
> --
Hello,
syzbot has tested the proposed patch but the reproducer is still triggering an
issue:
WARNING in drm_wait_one_vblank
platform vkms: vblank wait timed out on crtc 0
WARNING: CPU: 1 PID: 4329 at drivers/gpu/drm/drm_vblank.c:1269
drm_wait_one_vblank+0x2bc/0x500
On 09/12/2022 13:02, Marek Vasut wrote:
> On 12/9/22 10:36, Alexander Stein wrote:
>> Hello Krzysztof,
>
> Hi,
>
>> Am Freitag, 9. Dezember 2022, 10:07:45 CET schrieb Krzysztof Kozlowski:
>>> On 09/12/2022 09:54, Alexander Stein wrote:
Hello Krzysztof,
thanks for the fast
On 12/9/22 10:36, Alexander Stein wrote:
Hello Krzysztof,
Hi,
Am Freitag, 9. Dezember 2022, 10:07:45 CET schrieb Krzysztof Kozlowski:
On 09/12/2022 09:54, Alexander Stein wrote:
Hello Krzysztof,
thanks for the fast feedback.
Am Freitag, 9. Dezember 2022, 09:39:49 CET schrieb Krzysztof
Hi Sandor,
Am Montag, dem 28.11.2022 um 15:36 +0800 schrieb Sandor Yu:
> Mailbox access functions could be share to other mhdp driver and
> HDP-TX HDMI/DP PHY drivers, move those functions to head file
> include/drm/bridge/cdns-mhdp-mailbox.h and convert them to
> macro functions.
>
This does
On Thu, 8 Dec 2022 at 00:00, Bjorn Andersson wrote:
>
> From: Bjorn Andersson
>
> The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes
> and link it together with the backlight control.
>
> Signed-off-by: Bjorn Andersson
> Signed-off-by: Bjorn Andersson
> ---
>
> Changes
On 14.11.2022 15:55, Konrad Dybcio wrote:
>
>
> On 14/10/2022 18:36, Konrad Dybcio wrote:
>>
>>
>> On 30.09.2022 20:08, Konrad Dybcio wrote:
>>> Add support for the Sony TD4353 JDI 2160x1080 display panel used in
>>> some Sony Xperia XZ2 and XZ2 Compact smartphones. Due to the specifics
>>>
On Wed, Dec 07, 2022 at 02:00:10PM -0800, Bjorn Andersson wrote:
> From: Bjorn Andersson
>
> Define the display clock controllers, the MDSS instances, the DP phys
> and connect these together.
>
> Signed-off-by: Bjorn Andersson
> Signed-off-by: Bjorn Andersson
> ---
>
> Changes since v4:
> -
On Wed, Dec 07, 2022 at 02:00:12PM -0800, Bjorn Andersson wrote:
> From: Bjorn Andersson
>
> The SA8295P ADP has, among other interfaces, six MiniDP connectors which
> are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3.
>
> Enable Display Clock controllers, MDSS instanced, MDPs, DP
On Wed, Dec 07, 2022 at 02:00:11PM -0800, Bjorn Andersson wrote:
> From: Bjorn Andersson
>
> The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes
> and link it together with the backlight control.
>
> Signed-off-by: Bjorn Andersson
> Signed-off-by: Bjorn Andersson
> ---
>
>
Am 09.12.22 um 09:26 schrieb Tomasz Figa:
[SNIP]
Although I think the most common case on mainstream Linux today is
properly allocating for device X (e.g. V4L2 video decoder or DRM-based
GPU) and hoping that other devices would accept the buffers just fine,
which isn't a given on most platforms
On Fri, Dec 9, 2022 at 11:05 AM Xin Ji wrote:
>
> Sometimes kernel may resume back quickly after suspend,
> and DRM not call .mode_set() to re-config
> display timing before calling .atomic_enable(), bridge
> driver with this patch to keep last configure timing.
>
> Signed-off-by: Xin Ji
On 09/12/2022 10:50, Krzysztof Kozlowski wrote:
> On 09/12/2022 10:36, Alexander Stein wrote:
>> Hello Krzysztof,
>>
>> Am Freitag, 9. Dezember 2022, 10:07:45 CET schrieb Krzysztof Kozlowski:
>>> On 09/12/2022 09:54, Alexander Stein wrote:
Hello Krzysztof,
thanks for the fast
On 09/12/2022 10:36, Alexander Stein wrote:
> Hello Krzysztof,
>
> Am Freitag, 9. Dezember 2022, 10:07:45 CET schrieb Krzysztof Kozlowski:
>> On 09/12/2022 09:54, Alexander Stein wrote:
>>> Hello Krzysztof,
>>>
>>> thanks for the fast feedback.
>>>
>>> Am Freitag, 9. Dezember 2022, 09:39:49 CET
Hi
Am 09.12.22 um 10:11 schrieb Jammy Huang:
With WayLand, there is error log when display waken up from power-off:
gnome-shell: Failed to post KMS update: CRTC property (GAMMA_LUT) not found
gnome-shell: Page flip discarded: CRTC property (GAMMA_LUT) not found
To fix the issue, enable
Hello Krzysztof,
Am Freitag, 9. Dezember 2022, 10:07:45 CET schrieb Krzysztof Kozlowski:
> On 09/12/2022 09:54, Alexander Stein wrote:
> > Hello Krzysztof,
> >
> > thanks for the fast feedback.
> >
> > Am Freitag, 9. Dezember 2022, 09:39:49 CET schrieb Krzysztof Kozlowski:
> >> On 09/12/2022
On Fri, 9 Dec 2022 17:26:06 +0900
Tomasz Figa wrote:
> On Mon, Dec 5, 2022 at 5:29 PM Christian König
> wrote:
> >
> > Hi Tomasz,
> >
> > Am 05.12.22 um 07:41 schrieb Tomasz Figa:
> > > [SNIP]
> > >> In other words explicit ownership transfer is not something we would
> > >> want as
With WayLand, there is error log when display waken up from power-off:
gnome-shell: Failed to post KMS update: CRTC property (GAMMA_LUT) not found
gnome-shell: Page flip discarded: CRTC property (GAMMA_LUT) not found
To fix the issue, enable GAMMA_LUT property on CRTC.
Signed-off-by: Jammy Huang
On 09/12/2022 09:54, Alexander Stein wrote:
> Hello Krzysztof,
>
> thanks for the fast feedback.
>
> Am Freitag, 9. Dezember 2022, 09:39:49 CET schrieb Krzysztof Kozlowski:
>> On 09/12/2022 09:33, Alexander Stein wrote:
>>> It takes some time until the enable GPIO has settled when turning on.
Hello Krzysztof,
thanks for the fast feedback.
Am Freitag, 9. Dezember 2022, 09:39:49 CET schrieb Krzysztof Kozlowski:
> On 09/12/2022 09:33, Alexander Stein wrote:
> > It takes some time until the enable GPIO has settled when turning on.
> > This delay is platform specific and may be caused by
On 09/12/2022 09:33, Alexander Stein wrote:
> It takes some time until the enable GPIO has settled when turning on.
> This delay is platform specific and may be caused by e.g. voltage
> shifts, capacitors etc.
>
> Signed-off-by: Alexander Stein
> ---
>
On 08/12/2022 01:54, Dmitry Baryshkov wrote:
> Add platform-specific compatible entries to the qcom,mdp5.yaml to allow
> distinguishing between various platforms.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/qcom,mdp5.yaml | 19 ++-
> 1 file
On 08/12/2022 01:54, Dmitry Baryshkov wrote:
> Convert the mdp5.txt into the yaml format. Changes to the existing (txt)
> schema:
> - MSM8996 has additional "iommu" clock, define it separately
> - Add new properties used on some of platforms:
>- interconnects, interconnect-names
>-
It takes some time until the enable GPIO has settled when turning on.
This delay is platform specific and may be caused by e.g. voltage
shifts, capacitors etc.
Signed-off-by: Alexander Stein
---
.../devicetree/bindings/display/bridge/ti,sn65dsi83.yaml | 4
1 file changed, 4
It takes some time until the enable GPIO has settled when turning on.
This delay is platform specific and may be caused by e.g. voltage shifts,
capacitors etc.
Fall back to current default if not specified in DT.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 7
Hi all,
this small series adds a new optional property for specifying a platform
spefic enable delay. The LVDS Bridge requires at least a reset time of
10ms, but this is just the low pulse width. The actual rising time is a
different matter and is highly platform specific. My platform has a
On Mon, Dec 5, 2022 at 5:29 PM Christian König wrote:
>
> Hi Tomasz,
>
> Am 05.12.22 um 07:41 schrieb Tomasz Figa:
> > [SNIP]
> >> In other words explicit ownership transfer is not something we would
> >> want as requirement in the framework, cause otherwise we break tons of
> >> use cases which
One-element arrays are deprecated, and we are replacing them with
flexible array members instead. So, replace one-element array with
flexible-array member in structs _ATOM_DISPLAY_OBJECT_PATH,
_ATOM_DISPLAY_OBJECT_PATH_TABLE, _ATOM_OBJECT_TABLE, GOP_VBIOS_CONTENT
_ATOM_GPIO_VOLTAGE_OBJECT_V3 and
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