Hi,
Adding a plane color_mgmt_changed doesn't really work as it could be
different plane object each time but not need a reset at the hardware level.
What needs to be done is to add the properties to should_reset_plane
directly in the old_other_state stuff like so:
/*
Hi, Guillaume:
Guillaume Ranquet 於 2023年6月9日 週五 下午11:50寫道：
>
> On Thu, 08 Jun 2023 23:05, Rob Herring wrote:
> >On Mon, May 29, 2023 at 04:30:58PM +0200, Guillaume Ranquet wrote:
> >> Add mt8195 SoC bindings for hdmi and hdmi-ddc
> >>
> >> On mt8195 the ddc i2c controller is part of the hdmi IP
https://bugzilla.kernel.org/show_bug.cgi?id=217537
Paulo Marcos de Souza Arruda do Nascimento (contato-mygh...@protonmail.com)
changed:
What|Removed |Added
Kernel Version|
https://bugzilla.kernel.org/show_bug.cgi?id=217537
Bug ID: 217537
Summary: [AMDGPU] RDNA Freesync problem with CVT-Reduced
display profile
Product: Drivers
Version: 2.5
Hardware: AMD
OS: Linux
smatch warning:
drivers/accel/qaic/qaic_data.c:620 qaic_free_object() error:
dereferencing freed memory 'obj->import_attach'
obj->import_attach is detached and freed using dma_buf_detach().
But used after free to decrease the dmabuf ref count using
dma_buf_put().
Fixes:
On Sat, Jun 10, 2023 at 5:17 AM Nathan Chancellor wrote:
>
> + Masahiro and linux-kbuild
>
> On Fri, Jun 09, 2023 at 12:42:06PM -0400, Hamza Mahfooz wrote:
> > We have a clean build with W=1 as of
> > commit 12a15dd589ac ("drm/amd/display/amdgpu_dm/amdgpu_dm_helpers: Move
> > SYNAPTICS_DEVICE_ID
On 6/8/2023 12:51 PM, Abhinav Kumar wrote:
On 6/7/2023 2:56 PM, Dmitry Baryshkov wrote:
On 08/06/2023 00:05, Abhinav Kumar wrote:
On 3/20/2023 6:18 PM, Dmitry Baryshkov wrote:
Only several SSPP blocks support such features as YUV output or
scaling,
thus different DRM planes have
On 10/06/2023 01:57, Jessica Zhang wrote:
Add documentation comments explaining the pclk_rate and hdisplay math
related to DSC.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 10 ++
1 file changed, 10 insertions(+)
diff --git
On 6/9/2023 12:30 PM, Simon Ser wrote:
Hi Christopher,
On Friday, June 9th, 2023 at 17:52, Christopher Braga
wrote:
The new COLOROP objects also expose a number of KMS properties. Each has a
type, a reference to the next COLOROP object in the linked list, and other
type-specific
On 6/9/2023 3:57 PM, Jessica Zhang wrote:
Adjust the pclk rate to divide hdisplay by the compression ratio when DSC
is enabled.
Signed-off-by: Jessica Zhang
---
Reviewed-by: Abhinav Kumar
On 6/9/2023 3:57 PM, Jessica Zhang wrote:
Add a DPU INTF op to set the DCE_DATA_COMPRESS bit to enable the
DCE/DSC 1.2 datapath
Note: For now, this op is called for command mode encoders only. Changes to
set DATA_COMPRESS for video mode encoders will be posted along with DSC
v1.2 support for
This is a series of changes for DSI to enable command mode support
for DSC v1.2.
This includes:
1) Rounding up `hdisplay / 3` in dsc_timing_setup()
2) Adjusting pclk_rate to account for compression
3) Fixing incorrect uses of slice_count in DSI DSC calculations
4) Setting the DATA_COMPRESS bit
Add documentation comments explaining the pclk_rate and hdisplay math
related to DSC.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
In DPU 7.x and later, DSC/DCE enablement registers have been moved from
PINGPONG to INTF. Thus, add a DPU_INTF_DATA_COMPRESS feature flag that will
be set if the DATA_COMPRESS register is in the INTF block.
Reviewed-by: Marijn Suijten
Signed-off-by: Jessica Zhang
---
Adjust the pclk rate to divide hdisplay by the compression ratio when DSC
is enabled.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 21 ++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
Add a DPU INTF op to set the DCE_DATA_COMPRESS bit to enable the
DCE/DSC 1.2 datapath
Note: For now, this op is called for command mode encoders only. Changes to
set DATA_COMPRESS for video mode encoders will be posted along with DSC
v1.2 support for DP.
Signed-off-by: Jessica Zhang
---
Currently, slice_count is being used to calculate word count and
pkt_per_line. Instead, these values should be calculated using slice per
packet, which is not the same as slice_count.
Slice count represents the number of slices per interface, and its value
will not always match that of slice per
Currently, when compression is enabled, hdisplay is reduced via integer
division. This causes issues for modes where the original hdisplay is
not a multiple of 3.
To fix this, use DIV_ROUND_UP to divide hdisplay.
Suggested-by: Marijn Suijten
Fixes: 08802f515c3cf ("drm/msm/dsi: Add support for
On Mon, May 29, 2023 at 03:52:29PM +0200, Konrad Dybcio wrote:
>
> Some (particularly SMD_RPM, a.k.a non-RPMh) SoCs implement A6XX GPUs
> but don't implement the associated GMUs. This is due to the fact that
> the GMU directly pokes at RPMh. Sadly, this means we have to take care
> of enabling &
We were skipping when min_softlimit was equal to RPn. We need to apply
it rergardless as efficient frequency will push the SLPC min to RPe.
This will break scenarios where user sets a min softlimit < RPe before
reset and then performs a GT reset.
Fixes: 95ccf312a1e4 ("drm/i915/guc/slpc: Allow
+ Masahiro and linux-kbuild
On Fri, Jun 09, 2023 at 12:42:06PM -0400, Hamza Mahfooz wrote:
> We have a clean build with W=1 as of
> commit 12a15dd589ac ("drm/amd/display/amdgpu_dm/amdgpu_dm_helpers: Move
> SYNAPTICS_DEVICE_ID into CONFIG_DRM_AMD_DC_DCN ifdef"). So, let's enable
> these checks
On Mon, Apr 10, 2023 at 5:26 PM Rob Herring wrote:
>
> Etnaviv doesn't use anything from of_platform.h, but depends on
> of.h, of_device.h, and platform_device.h which are all implicitly
> included, but that is going to be removed soon.
>
> Signed-off-by: Rob Herring
> ---
>
On Sat, Jun 10, 2023 at 02:07:58AM +0800, Sui Jingfeng wrote:
> On 2023/6/10 01:52, Bjorn Helgaas wrote:
> > On Fri, Jun 09, 2023 at 09:37:02AM +0800, Sui Jingfeng wrote:
> > > On 2023/6/9 01:32, Bjorn Helgaas wrote:
> > > > On Wed, Jun 07, 2023 at 06:55:49PM +0800, Sui Jingfeng wrote:
> > > > >
Applied. Thanks!
Alex
On Fri, Jun 9, 2023 at 1:40 PM Borislav Petkov wrote:
>
> On Fri, Jun 09, 2023 at 04:03:56PM +0200, Thomas Zimmermann wrote:
> > Disable the modesetting pipeline before release the radeon's fbdev
> > client. Fixes the following error:
> >
> > [ 17.217408] WARNING: CPU:
These have already been fixed up.
Thanks!
Alex
On Fri, Jun 9, 2023 at 4:18 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:248: warning: Function parameter or
> member 'job' not described in 'sdma_v6_0_ring_emit_ib'
>
This patch is no longer applicable.
Alex
On Fri, Jun 9, 2023 at 4:18 AM Lee Jones wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/radeon/radeon_ttm.c: In function ‘radeon_bo_move’:
> drivers/gpu/drm/radeon/radeon_ttm.c:201:27: warning: variable ‘rbo’ set but
>
On Mon, May 29, 2023 at 03:52:28PM +0200, Konrad Dybcio wrote:
>
> Rename lower_bit to hbb_lo and explain what it signifies.
> Add explanations (wherever possible to other tunables).
>
> Port setting min_access_length, ubwc_mode and hbb_hi from downstream.
>
> Reviewed-by: Rob Clark
>
On 9.06.2023 20:25, Akhil P Oommen wrote:
> On Mon, May 29, 2023 at 03:52:27PM +0200, Konrad Dybcio wrote:
>>
>> Currently we're only deasserting REG_A6XX_RBBM_GBIF_HALT, but we also
>> need REG_A6XX_GBIF_HALT to be set to 0.
>>
>> This is typically done automatically on successful GX collapse,
On Mon, May 29, 2023 at 03:52:27PM +0200, Konrad Dybcio wrote:
>
> Currently we're only deasserting REG_A6XX_RBBM_GBIF_HALT, but we also
> need REG_A6XX_GBIF_HALT to be set to 0.
>
> This is typically done automatically on successful GX collapse, but in
> case that fails, we should take care of
Hi,
On 2023/6/10 01:52, Bjorn Helgaas wrote:
On Fri, Jun 09, 2023 at 09:37:02AM +0800, Sui Jingfeng wrote:
On 2023/6/9 01:32, Bjorn Helgaas wrote:
On Wed, Jun 07, 2023 at 06:55:49PM +0800, Sui Jingfeng wrote:
From: Sui Jingfeng
This patch adds PCI driver support on top of what we already
drm_sched_entity_kill_jobs_cb() logic is omitting the last fence popped
from the dependency array that was waited upon before
drm_sched_entity_kill() was called (drm_sched_entity::dependency field),
so we're basically waiting for all dependencies except one.
In theory, this wait shouldn't be
On Fri, Jun 09, 2023 at 09:37:02AM +0800, Sui Jingfeng wrote:
> On 2023/6/9 01:32, Bjorn Helgaas wrote:
> > On Wed, Jun 07, 2023 at 06:55:49PM +0800, Sui Jingfeng wrote:
> > > From: Sui Jingfeng
> > >
> > > This patch adds PCI driver support on top of what we already have. Take
> > > the GC1000
Hi Dave, Daniel,
New stuff for 6.5. Includes last week's PR with fixed sob tag, plus a few
new things.
The following changes since commit e82c98f2ca439356d5595ba8c9cd782f993f6f8c:
Merge tag 'amd-drm-next-6.4-2023-04-14' of
https://gitlab.freedesktop.org/agd5f/linux into drm-next (2023-04-17
On 2023/6/10 00:48, Bjorn Helgaas wrote:
On Fri, Jun 09, 2023 at 10:27:39AM +0800, Sui Jingfeng wrote:
On 2023/6/9 03:19, Bjorn Helgaas wrote:
On Thu, Jun 08, 2023 at 07:43:22PM +0800, Sui Jingfeng wrote:
From: Sui Jingfeng
The vga_is_firmware_default() function is arch-dependent, which
On Fri, Jun 09, 2023 at 04:03:56PM +0200, Thomas Zimmermann wrote:
> Disable the modesetting pipeline before release the radeon's fbdev
> client. Fixes the following error:
>
> [ 17.217408] WARNING: CPU: 5 PID: 1464 at drivers/gpu/drm/ttm/ttm_bo.c:326
> ttm_bo_release+0x27e/0x2d0 [ttm]
> [
On 6/9/23 02:03, Jani Nikula wrote:
On Thu, 08 Jun 2023, Ralph Campbell wrote:
The OSVR virtual reality headset HDK 2.0 uses a different EDID
vendor and device identifier than the HDK 1.1 - 1.4 headsets.
Add the HDK 2.0 vendor and device identifier to the quirks table so
that window managers
On 6/9/2023 9:58 AM, Dmitry Baryshkov wrote:
On 08/06/2023 23:36, Marijn Suijten wrote:
Same title suggestion as earlier: s/adjust/reduce
On 2023-05-22 18:08:56, Jessica Zhang wrote:
Adjust the pclk rate to divide hdisplay by the compression ratio when
DSC
is enabled.
Signed-off-by:
On 6/2/2023 3:04 PM, Jeffrey Hugo wrote:
Two additional fixes for corner cases found during development when
buggy userspace or firmware ends up subjecting the KMD to error
scenarios.
Carl Vanderlip (1):
accel/qaic: Free user handle on interrupted mutex
Jeffrey Hugo (1):
accel/qaic: Fix
On Fri, Jun 9, 2023 at 7:12 AM Tvrtko Ursulin
wrote:
>
>
> On 09/06/2023 13:44, Iddamsetty, Aravind wrote:
> > On 09-06-2023 17:41, Tvrtko Ursulin wrote:
> >> From: Tvrtko Ursulin
> >>
> >> I need a new flavour of the drm_gem_prime_fd_to_handle helper, one which
> >> will return a reference to a
The driver only supports OLED controllers that have a native DRM_FORMAT_C1
pixel format and that is why it has harcoded a division of the width by 8.
But the driver might be extended to support devices that have a different
pixel format. So it's better to use the struct drm_format_info helpers to
The resolutions for these panels are fixed and defined in the Device Tree,
so there's no point to allocate the buffers on each plane update and that
can just be done once.
Let's do the allocation and free on the encoder enable and disable helpers
since that's where others initialization and
A default resolution in the ssd130x driver isn't set to an arbitrary 96x16
anymore. Instead is set to a width and height that's controller dependent.
The datasheets for the chips describes the following display resolutions:
- SH1106: 132 x 64 Dot Matrix OLED/PLED
- SSD1305: 132 x 64 Dot
The driver only supports OLED controllers that have a page height of 8 but
there are devices that have different page heights. So it is better to not
hardcode this value and instead have it as a per controller data value.
Signed-off-by: Javier Martinez Canillas
Reviewed-by: Thomas Zimmermann
Currently the driver hardcodes the default values to 96x16 pixels but this
default resolution depends on the controller. The datasheets for the chips
describes the following display controller resolutions:
- SH1106: 132 x 64 Dot Matrix OLED/PLED
- SSD1305: 132 x 64 Dot Matrix OLED/PLED
-
Hello,
While working on adding support for the SSD132X family of 4-bit grayscale
Solomon OLED panel controllers, I noticed a few things in the driver that
can be improved and make extending to support other chip families easier.
I've split the preparatory patches in this series and will post the
On 08/06/2023 23:36, Marijn Suijten wrote:
Same title suggestion as earlier: s/adjust/reduce
On 2023-05-22 18:08:56, Jessica Zhang wrote:
Adjust the pclk rate to divide hdisplay by the compression ratio when DSC
is enabled.
Signed-off-by: Jessica Zhang
---
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 53ab6975c12d1ad86c599a8927e8c698b144d669 Add linux-next specific
files for 20230609
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202306081708.gtvacxsh-...@intel.com
https
On 6/8/2023 4:07 PM, Alan Previn wrote:
Ensure intel_gsc_uc_fw_init_done and intel_gsc_uc_fw_proxy_init
takes a wakeref before reading GSC Shim registers.
NOTE: another patch in review also adds a call from selftest to
this same function. (https://patchwork.freedesktop.org/series/117713/)
On Fri, Jun 09, 2023 at 10:27:39AM +0800, Sui Jingfeng wrote:
> On 2023/6/9 03:19, Bjorn Helgaas wrote:
> > On Thu, Jun 08, 2023 at 07:43:22PM +0800, Sui Jingfeng wrote:
> > > From: Sui Jingfeng
> > >
> > > The vga_is_firmware_default() function is arch-dependent, which doesn't
> > > sound
We have a clean build with W=1 as of
commit 12a15dd589ac ("drm/amd/display/amdgpu_dm/amdgpu_dm_helpers: Move
SYNAPTICS_DEVICE_ID into CONFIG_DRM_AMD_DC_DCN ifdef"). So, let's enable
these checks unconditionally for the entire module to catch these errors
during development.
Cc: Alex Deucher
Cc:
Hi Christopher,
On Friday, June 9th, 2023 at 17:52, Christopher Braga
wrote:
> > The new COLOROP objects also expose a number of KMS properties. Each has a
> > type, a reference to the next COLOROP object in the linked list, and other
> > type-specific properties. Here is an example for a 1D
On Wed, Jun 07, 2023 at 02:49:26PM -0700, Douglas Anderson wrote:
> Inform fw_devlink of the fact that a panel follower (like a
> touchscreen) is effectively a consumer of the panel from the purposes
> of fw_devlink.
>
> NOTE: this patch isn't required for correctness but instead optimizes
>
The content of of_device_uevent() is currently hardcoded in a driver
that can be compiled as a module. Nothing prevents of_device_uevent() to
be exported to modules, most of the other helpers in of/device.c
actually are. The reason why this helper was not exported is because it
has been so far
There is apparently no reasons to open-code of_device_uevent() besides:
- The helper receives a struct device while we want to use the of_node
member of the struct device *parent*.
- of_device_uevent() could not be called by modules because of a missing
EXPORT_SYMBOL*().
In practice, the
My previous attempt to slightly clean the OF core wrt device structures
was rather unsuccessful as the idea behind the discussed cleanup was
more impacting than what I thought, leading to most of the previous
series to be dropped. However, aside, two patches seemed actually
relevant, so here they
On 07/06/2023 23:49, Douglas Anderson wrote:
> As talked about in the patch ("drm/panel: Add a way for other devices
> to follow panel state"), touchscreens that are connected to panels are
> generally expected to be power sequenced together with the panel
> they're attached to. Today, nothing
Hi all,
The goal of this RFC is to expose a generic KMS uAPI to configure the color
pipeline before blending, ie. after a pixel is tapped from a plane's
framebuffer and before it's blended with other planes. With this new
uAPI we
aim to reduce the battery life impact of color management and
On Thu, 08 Jun 2023 23:05, Rob Herring wrote:
>On Mon, May 29, 2023 at 04:30:58PM +0200, Guillaume Ranquet wrote:
>> Add mt8195 SoC bindings for hdmi and hdmi-ddc
>>
>> On mt8195 the ddc i2c controller is part of the hdmi IP block and thus has no
>> specific register range, power domain or
On 6/10/22 10:59, Daniel Vetter wrote:
On Fri, Jun 10, 2022 at 10:41:05AM +0200, Daniel Vetter wrote:
Hi all,
Kinda top post because the thread is sprawling and I think we need a
summary/restart. I think there's at least 3 issues here:
- lack of hotspot property support, which means
> Hi Carl,
>
besides this, ask a dumb question.
How we retrieve the pat_index from a shared resource though dma_buf fd?
maybe we need to know whether it could be CPU cached if we want map it.
Of course, looks there are no real usage to access it though CPU.
Just use it
On the SoC host controller, the pixel clock can be:
* standard: data is launched on the rising edge
* inverted: data is launched on the falling edge
Some panels may need the inverted option to be used so let's support
this DRM flag.
Signed-off-by: Miquel Raynal
---
Hello, this change was
On 6/9/23 04:17, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c:48:22:
warning: ‘SYNAPTICS_DEVICE_ID’ defined but not used [-Wunused-const-variable=]
Cc: Harry Wentland
Cc: Leo Li
Cc: Rodrigo Siqueira
Hi,
On Fri, Jun 9, 2023 at 2:27 AM Benjamin Tissoires
wrote:
>
> > I suspect that it's not worth it, but I'll do this if you feel
> > strongly about it.
> >
> > I guess the simplest way I can think of to move this to its own file
> > would be to put the whole private data structure (struct
A very basic debugging rule when a device is connected for the first
time is to access a read-only register which contains known data in
order to ensure the communication protocol is properly working. This
driver lacked any read helper which is often a critical peace for
fastening bring-ups.
Add
The Sitronix controller expects 9-bit words, provide this as default at
probe time rather than specifying this in each and every access.
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git
The LCD controller supports RGB444, RGB565 and RGB888. The value that is
written in the COLMOD register indicates using RGB888, so let's clearly
specify the in-use bus format.
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 4
1 file changed, 4
The ST7789V LCD controller is also embedded in the ET028013DMA panel. In
fact, "sitronix,st7789v" might not be totally relevant alone as most of
the time -if not all- the LCD controller will always be packaged into a
display with its own physical properties.
Let's keep "sitronix,st7789v" valid
This panel from Emerging Display Technologies Corporation features an
ST7789V2 panel inside which is almost identical to what the Sitronix
panel driver supports.
In practice, the module physical size is specific, and experiments show
that the display will malfunction if any of the following
The spi core warns us about using an of_device_id table without a
spi_device_id table aside for module utilities in orter to not rely on
OF modaliases. Just add this table using the device name without the
vendor prefix (as it is usually done).
Signed-off-by: Miquel Raynal
---
The Sitronix ST7789V LCD controller is actually packaged in a number of
different panels with slightly different properties. Before introducing
the support for another pannel using this same LCD controller, let's
move all the panel-specific information into a dedicated structure that
is available
Hello,
The aim of this series is to add support for the EDT ET028013DMA
panel. This panel features a Sitronix ST7789V2 LCD controller, which is
already supported mainline (or very close to the ST7789V for which
Maxime added support years ago).
The EDT panel is slightly different on the geometry
On 6/9/23 04:17, Lee Jones wrote:
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c:48:22:
> warning: ‘SYNAPTICS_DEVICE_ID’ defined but not used [-Wunused-const-variable=]
>
> Cc: Harry Wentland
> Cc: Leo Li
> Cc:
On Thu, Jun 8, 2023 at 11:17 PM Johan Hovold wrote:
>
> On Thu, Jun 08, 2023 at 02:17:45PM -0700, Rob Clark wrote:
> > On Thu, Jun 8, 2023 at 7:12 AM Johan Hovold wrote:
>
> > > Have you had a chance to look at this regression yet? It prevents us
> > > from using lockdep on the X13s as it is
On 31/05/2023 09:43, Chen-Yu Tsai wrote:
Hi Matthias,
On Mon, Mar 6, 2023 at 4:07 PM Jason-JH.Lin wrote:
After mmsys and drm change DITHER enum to DDP_COMPONENT_DITHER0,
mmsys header can remove the useless DDP_COMPONENT_DITHER enum.
Signed-off-by: Jason-JH.Lin
Reviewed-by:
On 09/06/2023 10:17, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c:47: warning: Function parameter or
member 'clk' not described in 'mtk_disp_ccorr'
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c:47: warning: Function parameter or
Am 09.06.23 um 16:10 schrieb Boris Brezillon:
Hello Christian,
On Fri, 9 Jun 2023 13:53:59 +0200
Christian König wrote:
Am 08.06.23 um 08:55 schrieb Boris Brezillon:
If I understand correctly, drm_sched_entity_kill_jobs_cb() is supposed
to wait on all the external dependencies (those added
On 09/06/2023 13:44, Iddamsetty, Aravind wrote:
On 09-06-2023 17:41, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
I need a new flavour of the drm_gem_prime_fd_to_handle helper, one which
will return a reference to a newly created GEM objects (if created), in
order to enable tracking of
Hello Christian,
On Fri, 9 Jun 2023 13:53:59 +0200
Christian König wrote:
> Am 08.06.23 um 08:55 schrieb Boris Brezillon:
> > If I understand correctly, drm_sched_entity_kill_jobs_cb() is supposed
> > to wait on all the external dependencies (those added to
> > drm_sched_job::dependencies)
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.
Signed-off-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 2 +-
Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 +-
2
On 09/06/2023 13:52, Christian König wrote:
Am 09.06.23 um 14:09 schrieb Tvrtko Ursulin:
On 09/06/2023 07:32, Christian König wrote:
Am 08.06.23 um 16:30 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
For dma_fence_is_signaled signaling critical path annotations are an
annoying cause of
Disable the modesetting pipeline before release the radeon's fbdev
client. Fixes the following error:
[ 17.217408] WARNING: CPU: 5 PID: 1464 at drivers/gpu/drm/ttm/ttm_bo.c:326
ttm_bo_release+0x27e/0x2d0 [ttm]
[ 17.217418] Modules linked in: edac_mce_amd radeon(+) drm_ttm_helper ttm
video
The section about converting existing KMS drivers to atomic modesetting
mentions the existence of a conversion guide, but does not reference it.
While the guide is old and rusty, it still contains useful information,
so add a link to it. Also link to the LWN.net articles that give an
overview
Hi all,
This patch series contains various improvements to the documentation and
comments related to atomic modesetting. Hopefully, it will ease the job
of DRM novice who want to tackle the daunting task of converting a
legacy DRM driver to atomic modesetting.
Changes compared to 1:
-
The transitional helpers were removed a long time ago, but some
references stuck. Remove them.
Fixes: 21ebe615c16994f3 ("drm: Remove transitional helpers")
Signed-off-by: Geert Uytterhoeven
---
v2:
- Drop "first part" in drivers/gpu/drm/drm_plane_helper.c.
---
As of commit a01cb8ba3f628293 ("drm: Move drm_plane_helper_check_state()
into drm_atomic_helper.c"), drm_plane_helper_check_state() no longer
exists, but is part of drm_atomic_helper_check_plane_state().
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Laurent Pinchart
---
v2:
- Add
Convert the references to fbconv links to footnotes, so they can be
navigated.
Signed-off-by: Geert Uytterhoeven
---
v2:
- New.
---
Documentation/gpu/todo.rst | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst
On 09/06/2023 15:06, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> Two functions got added with normal prototypes for debugfs, but not
> alternative when building without it:
>
> drivers/accel/habanalabs/common/device.c: In function 'hl_device_init':
>
On Wed, 07 Jun 2023 00:00:10 +0530, Siddh Raman Pant wrote:
> There are a couple of superfluous print statements using the drm_*
> macros, which do stuff like printing newlines, print OOM messages
> (OOM while allocating memory is already supposed to be noisy), and
> printing strings like
Hi,
On Friday, June 9th, 2023 at 13:31, Thomas Zimmermann
wrote:
> Is there a v3 of this patchset? It was Acked with the one errno code
> changed.
Since this was a minor change, I did it locally and pushed the patch
to drm-misc-next already.
Simon
Am 09.06.23 um 14:09 schrieb Tvrtko Ursulin:
On 09/06/2023 07:32, Christian König wrote:
Am 08.06.23 um 16:30 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
For dma_fence_is_signaled signaling critical path annotations are an
annoying cause of false positives when using dma_fence_is_signaled
On Fri, Jun 2, 2023 at 1:17 PM Geert Uytterhoeven wrote:
> On Fri, Jun 2, 2023 at 1:05 PM Laurent Pinchart
> wrote:
> > On Fri, Jun 02, 2023 at 11:11:35AM +0200, Geert Uytterhoeven wrote:
> > > The transitional helpers were removed a long time ago, but some
> > > references stuck. Remove them.
On 09-06-2023 17:41, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> I need a new flavour of the drm_gem_prime_fd_to_handle helper, one which
> will return a reference to a newly created GEM objects (if created), in
> order to enable tracking of imported i915 GEM objects in the following
>
Hi,
On 2023/6/9 20:00, Andi Shyti wrote:
Hi Sui,
On Fri, Jun 09, 2023 at 07:24:16PM +0800, Sui Jingfeng wrote:
This patch replaces the leading space with a tab and removes the double
blank line, no functional change.
You mainly fixed comment style, though and it's not written here.
No need
Hi,
On 2023/6/9 19:48, Andi Shyti wrote:
Hi Sui,
On Fri, Jun 09, 2023 at 07:24:14PM +0800, Sui Jingfeng wrote:
The io_state variable in the vga_arb_write() function is declared with
unsigned int type, while the vga_str_to_iostate() function takes int *
type. To keep them consistent, replace
Hi,
On 2023/6/9 03:12, Bjorn Helgaas wrote:
Start with verb and capitalize to match ("Deal only with ...")
On Thu, Jun 08, 2023 at 07:43:21PM +0800, Sui Jingfeng wrote:
From: Sui Jingfeng
vgaarb only deal with the VGA devcie(pdev->class == 0x0300), so replace the
pci_get_subsys() function
From: Tvrtko Ursulin
Use the newly added drm_print_memory_stats helper to show memory
utilisation of our objects in drm/driver specific fdinfo output.
To collect the stats we walk the per memory regions object lists
and accumulate object size into the respective drm_memory_stats
categories.
From: Tvrtko Ursulin
I need a new flavour of the drm_gem_prime_fd_to_handle helper, one which
will return a reference to a newly created GEM objects (if created), in
order to enable tracking of imported i915 GEM objects in the following
patch.
Minor code reshuffule and only trivial additions on
From: Tvrtko Ursulin
We want to be able to show memory usage of imported dma-buf opjects in the
fdinfo stats.
To achieve this we wrap drm_gem_prime_fd_to_handle(_obj) in
i915_gem_prime_fd_to_handle and append some client management at the end.
Signed-off-by: Tvrtko Ursulin
Cc: Aravind
From: Tvrtko Ursulin
Account page table backing store against the owning client memory usage
stats.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gt/intel_gtt.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c
From: Tvrtko Ursulin
Account ring buffers and logical context space against the owning client
memory usage stats.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 ++
drivers/gpu/drm/i915/i915_drm_client.c | 10 ++
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