On Wed, 26 Jul 2023 18:57:18 +0530, Amit Pundir wrote:
> Add and document the reserved memory region property in the
> mdss-common schema.
>
> For now (sdm845-db845c), it points to a framebuffer memory
> region reserved by the bootloader for splash screen.
>
>
> [...]
Applied, thanks!
[2/2]
Hi,
On 2023/8/18 06:08, Bjorn Helgaas wrote:
I guess the point here is that:
- 03:00.0 BAR 0 is [mem 0xe005000-0xe005fff]
- screen_info says the framebuffer is
[mem 0xe005000-0xe005fff] (or part of it)
- Therefore, we want 03:00.0 to be the default VGA
-
Hi,
On 2023/8/18 06:08, Bjorn Helgaas wrote:
+
+/*
+ * Identify the PCI VGA device that contains the firmware framebuffer
+ */
+static void pci_boot_vga_finder(struct pci_dev *pdev)
+{
+ resource_size_t fb_start;
+ resource_size_t fb_end;
+ unsigned int i;
+
+ /* Already
Hi,
On 2023/8/18 06:08, Bjorn Helgaas wrote:
Please note that before apply this patch, vgaarb can not select the
right boot vga due to weird logic introduced with the commit
57fc7323a8e7c ("LoongArch: Add PCI controller support")
If we need this reference to 57fc7323a8e7c, we need more
On 8/11/23 16:08, Steven Price wrote:
> On 09/08/2023 17:53, Boris Brezillon wrote:
>> This way we can grab a pages ref without acquiring the resv lock when
>> pages_use_count > 0. Need to implement asynchronous map using the
>
> NIT: s/Need/This is needed/
>
>> drm_gpuva_mgr when the map/unmap
On Wed, Aug 16, 2023 at 10:25 AM Sarah Walker wrote:
> Add a GEM implementation based on drm_gem_shmem, and support code for the
> PowerVR GPU MMU. The GPU VA manager is used for address space management.
[...]
> +/**
> + * pvr_mmu_flush() - Request flush of all MMU caches.
> + * @pvr_dev: Target
On Fri, Aug 18, 2023 at 06:32:28PM -0300, Jason Gunthorpe wrote:
> It turns out several drivers are calling of_dma_configure() outside the
> expected bus_type.dma_configure op. This ends up being mis-locked and
> triggers a lockdep assertion, or instance:
Acked-by: Mark Brown
signature.asc
It turns out several drivers are calling of_dma_configure() outside the
expected bus_type.dma_configure op. This ends up being mis-locked and
triggers a lockdep assertion, or instance:
iommu_probe_device_locked+0xd4/0xe4
of_iommu_configure+0x10c/0x200
of_dma_configure_id+0x104/0x3b8
Create a section that specifies how to deal with DRM device resets for
kernel and userspace drivers.
Signed-off-by: André Almeida
---
v7 changes:
- s/application/graphical API contex/ in the robustness part (Michel)
- Grammar fixes (Randy)
v6:
Hi Dave, Daniel,
Last few updates for 6.6. Mostly bug fixes.
The following changes since commit a8b273a8fd9c88cee038ffdae05b7eca063b9622:
Merge tag 'amd-drm-next-6.6-2023-08-11' of
https://gitlab.freedesktop.org/agd5f/linux into drm-next (2023-08-15 13:37:49
+1000)
are available in the
Simplify probe() by replacing of_device_get_match_data() and ID lookup
for retrieving match data by i2c_get_match_data().
Signed-off-by: Biju Das
Reviewed-by: Andy Shevchenko
---
v2->v3:
* Added Rb tag from Andy.
v1->v2:
* Dropped sentence for dropping local variable as it is integral part of
The driver has OF match table, still it uses ID lookup table for
retrieving match data. Currently the driver is working on the
assumption that a I2C device registered via OF will always match a
legacy I2C device ID. The correct approach is to have an OF device ID
table using of_device_match_data()
This patch series aims to add match data improvements for it66121 driver.
v2->v3:
* Removed fixes tag from patch#1 as nothing broken.
* Added Rb tag from Andy.
v1->v2:
* Split the patch into two.
* patch#1 extend match support for OF tables compared to legacy ID
lookup and fixes tag.
*
Thank you for the patch and all your work to improve the link training
fallback logic and
to correctly reflect the link status to the userspace.
Chiming in some of the findings and this logic justification below so
it will help
the reviewers further.
On Fri, Aug 18, 2023 at 10:02 AM Gil Dekel
On Fri, Aug 18, 2023 at 05:08:42PM +0200, Thomas Hellström wrote:
> Use onion error unwind since that makes the function easier to read
> and extend. No functional change.
>
> Signed-off-by: Thomas Hellström
Reviewed-by: Matthew Brost
> ---
> drivers/gpu/drm/xe/xe_vm.c | 37
From: Matthew Brost
No DRM scheduler changes required, drivers just return NULL in run_job
vfunc.
Signed-off-by: Matthew Brost
---
Documentation/gpu/rfc/xe.rst | 27 ---
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/Documentation/gpu/rfc/xe.rst
Nouveau has landed the GPU VA helpers, support and documentation
already and Xe is already aligned with that.
Signed-off-by: Rodrigo Vivi
---
Documentation/gpu/rfc/xe.rst | 36 ++--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git
The consensus is for individual drivers VM_BIND uapis with
the GPUVA helpers that are already implemented and merged
upstream.
The merged GPUVA documentation also establish some overall
rules for the locking to be followed by the drivers.
Signed-off-by: Rodrigo Vivi
---
Xe is already using devcoredump infrastructure as the primary
error state and all the changes needed for user space error
replay and other useful logs are getting added into xe_devcoredump.
Link:
https://gitlab.freedesktop.org/drm/xe/kernel/-/blob/drm-xe-next/drivers/gpu/drm/xe/xe_devcoredump.c
Also the uapi should be reviewed and scrutinized before xe
is accepted upstream and we shouldn't cause regression.
Link:
https://lore.kernel.org/all/20230630100059.122881-1-thomas.hellst...@linux.intel.com
Signed-off-by: Rodrigo Vivi
---
Documentation/gpu/rfc/xe.rst | 6 --
1 file changed,
On Tue, Aug 08, 2023 at 03:47:47AM +, Lin, Wayne wrote:
> [AMD Official Use Only - General]
>
> > -Original Message-
> > From: Imre Deak
> > Sent: Tuesday, August 8, 2023 12:00 AM
> > To: Lin, Wayne
> > Cc: dri-devel@lists.freedesktop.org; amd-...@lists.freedesktop.org;
> >
Hi Andy Shevchenko,
> Subject: Re: [PATCH v2 1/2] drm: bridge: it66121: Extend match support for
> OF tables
>
> On Fri, Aug 18, 2023 at 05:54:51PM +0100, Biju Das wrote:
> > The driver has OF match table, still it uses ID lookup table for
> > retrieving match data. Currently the driver is
On Fri, Aug 18, 2023 at 05:54:50PM +0100, Biju Das wrote:
> This patch series aims to add match data improvements for it66121 driver.
With the Fixes removed, FWIW,
Reviewed-by: Andy Shevchenko
--
With Best Regards,
Andy Shevchenko
On Fri, Aug 18, 2023 at 05:54:51PM +0100, Biju Das wrote:
> The driver has OF match table, still it uses ID lookup table for
> retrieving match data. Currently the driver is working on the
> assumption that a I2C device registered via OF will always match a
> legacy I2C device ID. The correct
When a link-training attempt fails, emit a uevent to user space that
includes the trigger property, which in this case will be
link-statue=Bad.
This will allow userspace to parse the uevent property and better
understand the reason for the previous display configuration failure.
Cc: Jani Nikula
Currently, MST link training has no fallback whatsoever. This means that
if an MST base connector fails to link-train once, the training
completely fails, which makes this case significantly more common than a
complete SST link training failure.
Until MST fallback is fully implemented, this patch
Instead of silently giving up when all link-training fallback values are
exhausted, this patch modifies the fallback's failure branch to reduces
both max_link_lane_count and max_link_rate to zero (0) and continues to
emit uevents until userspace stops attempting to modeset.
By doing so, we ensure
Currently, when link training fails after all fallback values have been
exhausted, the i915 driver seizes to send uevents to userspace. This leave
userspace thinking that the last passing atomic commit was successful, and that
all connectors (displays) are connected and operational, when in fact,
Simplify probe() by replacing of_device_get_match_data() and ID lookup
for retrieving match data by i2c_get_match_data().
Signed-off-by: Biju Das
---
v1->v2:
* Dropped sentence for dropping local variable as it is integral part of
the patch.
---
drivers/gpu/drm/bridge/ite-it66121.c | 6
The driver has OF match table, still it uses ID lookup table for
retrieving match data. Currently the driver is working on the
assumption that a I2C device registered via OF will always match a
legacy I2C device ID. The correct approach is to have an OF device ID
table using of_device_match_data()
This patch series aims to add match data improvements for it66121 driver.
v1->v2:
* Split the patch into two.
* patch#1 extend match support for OF tables compared to legacy ID
lookup and fixes tag.
* patch#2 simplifies the probe() by using i2c_get_match_data.
* Dropped sentence for
On 2023-08-18 12:10, Zeng, Oak wrote:
Thanks Thomas. I will then look into more details of option 3:
* create a lean drm layer vram manager, a central control place for vram
eviction and cgroup accounting. Single LRU for eviction fairness.
* pretty much move the current ttm_resource
On Thu, Aug 17, 2023 at 2:07 AM Jiapeng Chong
wrote:
>
> The val is defined as unsigned int type, if(val<0) is invalid, modify
> to int type.
>
> drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_pm.c:2813
> amdgpu_hwmon_show_power_input() warn: unsigned 'val' is never less than zero.
>
Applied. Thanks!
On Thu, Aug 17, 2023 at 7:34 AM Konstantin Meskhidze
wrote:
>
> Buffer 'afmt_status' of size 6 could overflow, since index 'afmt_idx' is
> checked after access.
>
> Fixes: 5cc4e5fc293b ("drm/radeon: Cleanup HDMI audio interrupt handling for
> evergreen")
> Co-developed-by:
[Public]
> -Original Message-
> From: Ilpo Järvinen
> Sent: Monday, July 17, 2023 8:05 AM
> To: linux-...@vger.kernel.org; Bjorn Helgaas ; Lorenzo
> Pieralisi ; Rob Herring ;
> Krzysztof Wilczyński ; Emmanuel Grumbach
> ; Rafael J . Wysocki ;
> Heiner Kallweit ; Lukas Wunner ;
> Andy
Thanks Thomas. I will then look into more details of option 3:
* create a lean drm layer vram manager, a central control place for vram
eviction and cgroup accounting. Single LRU for eviction fairness.
* pretty much move the current ttm_resource eviction/cgroups logic to drm
layer
*
On 09/08/2023 17:53, Boris Brezillon wrote:
> This is the piece of software interacting with the FW scheduler, and
> taking care of some scheduling aspects when the FW comes short of slots
> scheduling slots. Indeed, the FW only expose a few slots, and the kernel
> has to give all submission
On Wed, 09 Aug 2023 13:42:16 +0200, Artur Weber wrote:
> Fixes the following warning:
>
> drivers/video/backlight/lp855x_bl.c:252:7: warning: variable 'ret' is used
> uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
>
>
Applied, thanks!
[1/1] backlight: lp855x: Drop
Hi,
On 2023/8/3 23:47, Daniel Stone wrote:
Since there's a lot of confusion around this, document both the rules
and the best practice around negotiating, allocating, importing, and
Probably, best practices?
using buffers when crossing context/process/device/subsystem boundaries.
This
Hi Sarah,
On Wed, Aug 16, 2023 at 09:25:23AM +0100, Sarah Walker wrote:
> Add a GEM implementation based on drm_gem_shmem, and support code for the
> PowerVR GPU MMU. The GPU VA manager is used for address space management.
>
> Changes since v4:
> - Correct sync function in vmap/vunmap function
Support pinning of vmas using XE_VM_BIND_FLAG_PIN, initially for userptr
only. Pinned memory becomes accounted against RLIMIT_MEMLOCK and processes
with CAP_IPC_LOCK will not apply the limit. This is pretty similar to
mlock()'ing userptr memory with the added benefit that the driver is
aware and
Account these pages against RLIMIT_MEMLOCK following how RDMA does this
with CAP_IPC_LOCK bypassing the limit.
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/xe/xe_vm.c | 43 --
1 file changed, 41 insertions(+), 2 deletions(-)
diff --git
Implement pinning of userptrs between VM_BIND and VM_UNBIND, which will
facilitate avoiding long hangs on non-preemptible workloads. But don't
hook it up to userspace just yet.
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/xe/xe_vm.c | 76 ++--
Use onion error unwind since that makes the function easier to read
and extend. No functional change.
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/xe/xe_vm.c | 37 +++--
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git
This series add a flag at VM_BIND time to pin the memory backing a VMA.
Initially this is needed for long-running workloads on hardware that
neither support mid-thread preemption nor pagefaults, since without it
the userptr MMU notifier will wait for preemption until preemption times
out.
Moving
On 2023-08-18 09:17, Hamza Mahfooz wrote:
> As made mention of in commit 4a2df0d1f28e ("drm/amd/display: Fixed
> non-native modes not lighting up"), we shouldn't call
> drm_mode_set_crtcinfo() once the crtc timings have been decided. Since,
> it can cause settings to be unintentionally
From: Rob Clark
If a signal callback releases the sw_sync fence, that will trigger a
deadlock as the timeline_fence_release recurses onto the fence->lock
(used both for signaling and the the timeline tree).
To avoid that, temporarily hold an extra reference to the signalled
fences until after
On Sun, Aug 13, 2023 at 1:05 PM Biju Das wrote:
>
> Add struct adv7511_chip_info to handle hw differences between various
> chips rather checking against the 'type' variable in various places.
> Replace 'adv->type'->'info->type' by moving variable 'type' from
> struct adv7511 to struct
On Fri, Aug 18, 2023 at 2:09 AM Christian König
wrote:
>
> Am 17.08.23 um 23:37 schrieb Rob Clark:
> > From: Rob Clark
> >
> > If a signal callback releases the sw_sync fence, that will trigger a
> > deadlock as the timeline_fence_release recurses onto the fence->lock
> > (used both for
On 09/08/2023 17:53, Boris Brezillon wrote:
> Tiler heap growing requires some kernel driver involvement: when the
> tiler runs out of heap memory, it will raise an exception which is
> either directly handled by the firmware if some free heap chunks are
> available in the heap context, or passed
Add support for the DSS controller on TI's AM62A7 SoC in the tidss
driver.
This contrller has 2 video pipelines that can render 2 video planes on
over a screen, using the overlay managers. The output of the DSS comes
from video port 2 (VP2) in the form of RGB88 DPI signals, while the VP1
is tied
The DSS controller on TI's AM62A7 SoC is an update from that on TI's
AM625 SoC. Like the DSS in AM625, the DSS in this SoC has 2 video
pipelines, but unlike the former, the latter only has one output port on
VP2 to service DPI display sinks.
Add the new controller's compatible.
Signed-off-by:
This patch series adds a new compatible for the Display SubSystem (DSS)
controller on TI's AM62A7 SoC. It further adds the required support, for
the same, in the tidss driver.
The DSS controller is similar to the recently added AM625 DSS, with the
key difference being the absence of VP1 output on
On 2023/8/18 22:04, suijingfeng wrote:
Hi,
Why this patch get dropped in the end?
Since the global screen_info is an arch-specific thing,
Whenever an arch-neutral module or subsystem references the global
screen_info,
There are some complaints from either compile testing robot.
There
On Fri, 2023-08-18 at 00:42 +0200, Jann Horn wrote:
> *** CAUTION: This email originates from a source not known to Imagination
> Technologies. Think before you click a link or open an attachment ***
>
> Hi!
>
> Thanks, I think it's great that Imagination is writing an upstream
> driver for
Hi,
Why this patch get dropped in the end?
Since the global screen_info is an arch-specific thing,
Whenever an arch-neutral module or subsystem references the global screen_info,
There are some complaints from either compile testing robot.
Well, a programmer may handle it by using the
Hi Biju,
On Sun, Aug 13, 2023 at 3:05 PM Biju Das wrote:
>
> This patch series aims to improve ADV7511 driver by adding
> feature bits and data instead of comparing enum adv7511_type for
> various hardware differences between ADV7511, ADV7533 and ADV7535.
>
> This patch series tested with[1] on
On Fri, 18 Aug 2023 14:03:14 +0300
Dmitry Baryshkov wrote:
> On 18/08/2023 13:51, Pekka Paalanen wrote:
> > On Fri, 4 Aug 2023 16:59:00 +0300
> > Dmitry Baryshkov wrote:
> >
> >> On Fri, 4 Aug 2023 at 16:44, Sebastian Wick
> >> wrote:
> >>>
> >>> On Fri, Aug 4, 2023 at 3:27 PM Dmitry
On Thu, 2023-08-17 at 19:43 -0500, Faith Ekstrand wrote:
> On Wed, Aug 16, 2023 at 3:26 AM Sarah Walker wrote:
> >
> > +/**
> > + * struct drm_pvr_dev_query_runtime_info - Container used to fetch
> > information
> > + * about the graphics runtime.
> > + *
> > + * When fetching this type
On 8/18/23 09:28, Alex Deucher wrote:
On Fri, Aug 18, 2023 at 9:25 AM Hamza Mahfooz wrote:
As made mention of in commit 4a2df0d1f28e ("drm/amd/display: Fixed
non-native modes not lighting up"), we shouldn't call
drm_mode_set_crtcinfo() once the crtc timings have been decided. Since,
it can
The DSS controller on TI's AM62A7 SoC is an update from that on TI's
AM625 SoC. Like the DSS in AM625, the DSS in this SoC has 2 video
pipelines, but unlike the former, the latter only has one output port on
VP2 to service DPI display sinks.
Add the new controller's compatible.
Signed-off-by:
Hi Adam,
> Subject: Re: [PATCH 7/7] drm: adv7511: Add hpd_override_enable feature bit
> to struct adv7511_chip_info
>
> On Fri, Aug 18, 2023 at 8:35 AM Biju Das
> wrote:
> >
> > Hi Adam Ford,
> >
> > Thanks for the feedback.
> >
> > > Subject: Re: [PATCH 7/7] drm: adv7511: Add
On 8/17/23 21:54, Mirsad Todorovac wrote:
Hi,
This is your friendly bug reporter.
The environment is vanilla torvalds tree kernel on Ubuntu 22.04 LTS and a Ryzen
7950X box.
Please find attached the complete dmesg output from the ring buffer and lshw
output.
NOTE: The kernel reports tainted
On 18-Aug-23 18:47, Aradhya Bhatia wrote:
> Add support for the DSS controller on TI's AM62A7 SoC in the tidss
> driver.
>
> This contrller has 2 video pipelines that can render 2 video planes on
> over a screen, using the overlay managers. The output of the DSS comes
> from video port 2 (VP2)
On 8/18/23 14:49, Matthew Brost wrote:
On Fri, Aug 18, 2023 at 07:40:41AM +0200, Christian König wrote:
Am 18.08.23 um 05:08 schrieb Matthew Brost:
On Thu, Aug 17, 2023 at 01:13:31PM +0200, Danilo Krummrich wrote:
On 8/17/23 07:33, Christian König wrote:
Am 16.08.23 um 18:33 schrieb Danilo
On Fri, Aug 18, 2023 at 8:35 AM Biju Das wrote:
>
> Hi Adam Ford,
>
> Thanks for the feedback.
>
> > Subject: Re: [PATCH 7/7] drm: adv7511: Add hpd_override_enable feature bit
> > to struct adv7511_chip_info
> >
> > On Sun, Aug 13, 2023 at 1:06 PM Biju Das
> > wrote:
> > >
> > > As per spec, it
Hi Adam Ford,
Thanks for the feedback.
> Subject: Re: [PATCH 7/7] drm: adv7511: Add hpd_override_enable feature bit
> to struct adv7511_chip_info
>
> On Sun, Aug 13, 2023 at 1:06 PM Biju Das
> wrote:
> >
> > As per spec, it is allowed to pulse the HPD signal to indicate that
> > the EDID
On 8/17/23 18:17, Christian König wrote:
Am 17.08.23 um 14:48 schrieb Danilo Krummrich:
On 8/17/23 15:35, Christian König wrote:
Am 17.08.23 um 13:13 schrieb Danilo Krummrich:
On 8/17/23 07:33, Christian König wrote:
[SNIP]
My proposal would be to just keep the hw_submission_limit (maybe
On Fri, Aug 18, 2023 at 9:25 AM Hamza Mahfooz wrote:
>
> As made mention of in commit 4a2df0d1f28e ("drm/amd/display: Fixed
> non-native modes not lighting up"), we shouldn't call
> drm_mode_set_crtcinfo() once the crtc timings have been decided. Since,
> it can cause settings to be
This patch series adds a new compatible for the Display SubSystem (DSS)
controller on TI's AM62A7 SoC. It further adds the required support, for
the same, in the tidss driver.
The DSS controller is similar to the recently added AM625 DSS, with the
key difference being the absence of VP1 output on
https://bugzilla.kernel.org/show_bug.cgi?id=217664
--- Comment #20 from Alex Deucher (alexdeuc...@gmail.com) ---
(In reply to popus_czy_to_ty from comment #18)
> banned all in grub ( GRUB_CMDLINE_LINUX_DEFAULT="quiet splash
>
On Thu, 10 Aug 2023 09:45:27 +0200
Maxime Ripard wrote:
> Hi
>
> On Mon, Aug 07, 2023 at 03:45:15PM +0200, Jocelyn Falempe wrote:
> > After discussions on IRC, the consensus is that the DRM drivers should
> > not do software color conversion, and only advertise the supported formats.
> > Update
Add support for the DSS controller on TI's AM62A7 SoC in the tidss
driver.
This contrller has 2 video pipelines that can render 2 video planes on
over a screen, using the overlay managers. The output of the DSS comes
from video port 2 (VP2) in the form of RGB88 DPI signals, while the VP1
is tied
As made mention of in commit 4a2df0d1f28e ("drm/amd/display: Fixed
non-native modes not lighting up"), we shouldn't call
drm_mode_set_crtcinfo() once the crtc timings have been decided. Since,
it can cause settings to be unintentionally overwritten. So, since
dm_state is never NULL now, we can use
On Fri, Aug 18, 2023 at 07:27:33AM +0200, Christian König wrote:
> Am 17.08.23 um 19:54 schrieb Matthew Brost:
> > On Thu, Aug 17, 2023 at 03:39:40PM +0200, Christian König wrote:
> > > Am 11.08.23 um 04:31 schrieb Matthew Brost:
> > > > Rather than call free_job and run_job in same work item have
On 11/11/2022 11:52, Daniel Vetter wrote:
On Thu, Nov 10, 2022 at 11:33:11AM -0800, Won Chung wrote:
Hi Daniel,
Thank you very much for a review.
On Wed, Nov 9, 2022 at 3:54 AM Daniel Vetter wrote:
On Tue, Nov 08, 2022 at 06:50:04PM +, Won Chung wrote:
Create a symlink pointing to USB
Hi Lucas,
On Fri, 16 Dec 2022 22:07:42 +0100
Lucas Stach wrote:
> This IP block is found in the HDMI subsystem of the i.MX8MP SoC. It has a
> full timing generator and can switch between different video sources. On
> the i.MX8MP however the only supported source is the LCDIF. The block
> just
Hi Lucas,
On Fri, 16 Dec 2022 22:07:40 +0100
Lucas Stach wrote:
> Add a simple wrapper driver for the DWC HDMI bridge driver that
> implements the few bits that are necessary to abstract the i.MX8MP
> SoC integration.
>
> Signed-off-by: Lucas Stach
> Reviewed-by: Laurent Pinchart
>
On Fri, Aug 18, 2023 at 07:40:41AM +0200, Christian König wrote:
> Am 18.08.23 um 05:08 schrieb Matthew Brost:
> > On Thu, Aug 17, 2023 at 01:13:31PM +0200, Danilo Krummrich wrote:
> > > On 8/17/23 07:33, Christian König wrote:
> > > > Am 16.08.23 um 18:33 schrieb Danilo Krummrich:
> > > > > On
Commit 06a2d7cc3f04 ("drm/amdgpu: revert "implement tdr advanced mode"")
removed drm_sched_reset_karma()/drm_sched_increase_karma_ext() but leave
the declarations.
Commit 2cf9886e2816 ("drm/scheduler: remove drm_sched_dependency_optimized")
removed drm_sched_dependency_optimized() but not its
On Sun, Aug 13, 2023 at 1:06 PM Biju Das wrote:
>
> As per spec, it is allowed to pulse the HPD signal to indicate that the
> EDID information has changed. Some monitors do this when they wake up
> from standby or are enabled. When the HPD goes low the adv7511 is
> reset and the outputs are
From: Martin Krastev
LGTM!
Reviewed-by: Martin Krastev
Regards,
Martin
On 18 Aug 2023 04:13:14, Zack Rusin wrote:
>From: Zack Rusin
>
>vmw_bo_unreference sets the input buffer to null on exit, resulting in
>null ptr deref's on the subsequent drm gem put calls.
>
>This went unnoticed
On 10/08/2023 15:04, Ruan Jinjie wrote:
Use memdup_user_nul() helper instead of open-coding to simplify the code.
Signed-off-by: Ruan Jinjie
---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 14 +++---
1 file changed, 3 insertions(+), 11 deletions(-)
Reviewed-by: Dmitry Baryshkov
--
On Thu, 25 May 2023, Jani Nikula wrote:
> On Thu, 11 May 2023, Krzysztof Kozlowski
> wrote:
>> Statically allocated array of pointers to hwmon_channel_info can be made
>> const for safety.
>
> Btw if you want to further make things const, the compound literals
> defined by HWMON_CHANNEL_INFO()
On 18/08/2023 13:51, Pekka Paalanen wrote:
On Fri, 4 Aug 2023 16:59:00 +0300
Dmitry Baryshkov wrote:
On Fri, 4 Aug 2023 at 16:44, Sebastian Wick wrote:
On Fri, Aug 4, 2023 at 3:27 PM Dmitry Baryshkov
wrote:
On Fri, 28 Jul 2023 at 20:03, Jessica Zhang wrote:
Document and add support
On Fri, 2023-08-18 at 00:42 +0200, Jann Horn wrote:
> *** CAUTION: This email originates from a source not known to Imagination
> Technologies. Think before you click a link or open an attachment ***
>
> On Wed, Aug 16, 2023 at 10:25 AM Sarah Walker wrote:
> > Implement ioctls for the creation
On Fri, 4 Aug 2023 16:59:00 +0300
Dmitry Baryshkov wrote:
> On Fri, 4 Aug 2023 at 16:44, Sebastian Wick wrote:
> >
> > On Fri, Aug 4, 2023 at 3:27 PM Dmitry Baryshkov
> > wrote:
> > >
> > > On Fri, 28 Jul 2023 at 20:03, Jessica Zhang
> > > wrote:
> > > >
> > > > Document and add support
On 16/08/2023 10:25, Sarah Walker wrote:
> Add the Series AXE GPU node to the AM62 device tree.
>
> Changes since v4:
> - Remove interrupt name
> - Make property order consistent across dts and bindings doc
> - Fixed formatting (replaced spaces with tabs)
>
Nope, DTS go via SoC tree. You
On 18/08/2023 11:36, Linus Walleij wrote:
> Hi Sarah,
>
> thanks for your patch!
>
> Patches adding device tree bindings need to be CC:ed to
> devicet...@vger.kernel.org
> and the DT binding maintainers, I have added it for now.
>
This won't help, I think. Patch will not be tested.
I was
On 16/08/2023 10:25, Sarah Walker wrote:
> Add the device tree binding documentation for the Series AXE GPU used in
> TI AM62 SoCs.
>
> Co-developed-by: Frank Binns
> Signed-off-by: Frank Binns
> Signed-off-by: Sarah Walker
> ---
> Changes since v4:
> - Add clocks constraint for ti,am62-gpu
On 18/08/2023 09:24, Simon Ser wrote:
On Thursday, August 17th, 2023 at 21:33, Dmitry Baryshkov
wrote:
We have been looking for a way to document that the corresponding DP
port is represented by the USB connector on the device.
Consequently, I believe the best way to document it, would be
On 18/08/2023 11:25, neil.armstr...@linaro.org wrote:
Hi Dmitry,
On 17/08/2023 20:35, Dmitry Baryshkov wrote:
On 16/08/2023 10:51, neil.armstr...@linaro.org wrote:
Hi Abhinav,
On 14/08/2023 20:02, Abhinav Kumar wrote:
Sending HS commands will always work on any controller, it's all
Hi,
On 2023/8/18 06:08, Bjorn Helgaas wrote:
Please note that before apply this patch, vgaarb can not select the
right boot vga due to weird logic introduced with the commit
57fc7323a8e7c ("LoongArch: Add PCI controller support")
If we need this reference to 57fc7323a8e7c, we need more
On 8/14/23 02:12, David Ahern wrote:
On 8/9/23 7:57 PM, Mina Almasry wrote:
Changes in RFC v2:
--
...
** Test Setup
Kernel: net-next with this RFC and memory provider API cherry-picked
locally.
Hardware: Google Cloud A3 VMs.
NIC: GVE with header split & RSS & flow steering
Hi Sarah,
thanks for your patch!
Patches adding device tree bindings need to be CC:ed to
devicet...@vger.kernel.org
and the DT binding maintainers, I have added it for now.
On Wed, Aug 16, 2023 at 10:26 AM Sarah Walker wrote:
> Add the device tree binding documentation for the Series AXE GPU
Hi,
On 2023/8/18 06:08, Bjorn Helgaas wrote:
This patch makes the vga_is_firmware_default() function works on whatever
arch that has UEFI GOP support. But we make it available only on platforms
where PCI resource relocation happens. if the provided method proves to be
effective and reliable,
On 16/06/2023 22:02, Sam Ravnborg wrote:
Hi Marek,
On Thu, Jun 15, 2023 at 10:18:58PM +0200, Marek Vasut wrote:
Move the register programming part, which actually enables the bridge and
makes it push data out of its DPI side, into the enable callback. The DSI
host like DSIM may not be able to
Am 17.08.23 um 23:37 schrieb Rob Clark:
From: Rob Clark
If a signal callback releases the sw_sync fence, that will trigger a
deadlock as the timeline_fence_release recurses onto the fence->lock
(used both for signaling and the the timeline tree).
To avoid that, temporarily hold an extra
On 08/07, Maíra Canal wrote:
> This patchset exposes GPU usages stats both globally and per-file
> descriptor.
>
> The first patch exposes the accumulated amount of active time per client
> through the fdinfo infrastructure. The amount of active time is exposed
> for each V3D queue. Moreover, it
On 08/07, Maíra Canal wrote:
> The previous patch exposed the accumulated amount of active time per
> client for each V3D queue. But this doesn't provide a global notion of
> the GPU usage.
>
> Therefore, provide the accumulated amount of active time for each V3D
> queue (BIN, RENDER, CSD, TFU
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