On 09/09/25 4:57 pm, Maxime Ripard wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> The atmel-hlcdc atomic_check implementation uses the deprecated
> drm_atomic_get_existing_crtc_state() helper.
>
> This hook is called as part of the globa
Hi Eslam Khafagy,
I am still awaiting approval for my commit access request to the
drm-misc repository. I will be able to apply your changes as soon as the
access is granted.Thank you for your patience.
On 14/09/25 3:49 am, Eslam Khafagy wrote:
> EXTERNAL EMAIL: Do not click links or open attac
On Mon, Sep 15, 2025 at 6:34 AM Nicolas Frattaroli
wrote:
>
> On Saturday, 13 September 2025 00:53:50 Central European Summer Time Chia-I
> Wu wrote:
> > On Fri, Sep 12, 2025 at 11:38 AM Nicolas Frattaroli
> > wrote:
> >
> > > diff --git a/drivers/gpu/drm/panthor/panthor_devfreq.h
> > > b/driv
Hi John,
kernel test robot noticed the following build warnings:
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/UPDATE-20250911-023707/John-Ripple/drm-bridge-ti-sn65dsi86-break-probe-dependency-loop/20250820-235209
base:
Hi,
On Thu, Aug 14, 2025 at 03:01:07PM +0900, Gustavo A. R. Silva wrote:
> -Wflex-array-member-not-at-end was introduced in GCC-14, and we are
> getting ready to enable it, globally.
>
> Use the new TRAILING_OVERLAP() helper to fix the following warning:
>
> drivers/gpu/drm/nouveau/nvif/fifo.c:2
From: David Heidelberg
Remove leftover from s6e3fc2x01 support drop.
Fixes: e1eb7293ab41 ("drm/panel: samsung-sofef00: Drop s6e3fc2x01 support")
Signed-off-by: David Heidelberg
---
drivers/gpu/drm/panel/Kconfig | 6 +++---
drivers/gpu/drm/panel/panel-samsung-sofef00.c | 2 +-
2
From: Hermes Wu
When connect to a DP-to-HDMI device which does not connect
to HDMI sink, it will report DPCD 00200h with SINK_COUNT = "0",
and issue HPD_IRQ when SINK_COUNT change to "1".
IT6505 can not recive HPD_IRQ before training done and driver will
force HW enter training done state when c
IT6505 supports HW auto link training which will write DPCD and check
training status automatically. Some DP device can not pass
HW auto link training and must set link training step by step.
when HW auto link training fail, it may trigger video FIFO error,
and link training process will reset to
From: Hermes Wu
IT6505 supports HW link training which will write DPCD and check
training status automatically.
In the case that driver set link rate at 2.7G and HW fail to training,
it will change link configuration and try 1.65G. And this will cause
INT_VID_FIFO_ERROR triggered when link clock
On Mon, Sep 15, 2025 at 6:34 AM Nicolas Frattaroli
wrote:
>
> On Saturday, 13 September 2025 00:11:10 Central European Summer Time Chia-I
> Wu wrote:
> > On Fri, Sep 12, 2025 at 11:38 AM Nicolas Frattaroli
> > wrote:
> >
> > > +static irqreturn_t mtk_gpueb_mbox_thread(int irq, void *data)
> > >
From: Hermes Wu
The DP link training work include auto training and after
auto training failed "AUTO_TRAIN_RETRY" times, it switch to
step training mode.
It will more efficiency that finish link auto training,
include retry, and step training in a work, rather than
re-schedule train work when ea
From: Hermes Wu
When start link training, interrupt status INT_LINK_TRAIN_FAIL can
use to check link training fail and no need to wait until timeout.
it6505_irq_link_train_fail() remove from interrupt and no longer used.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 26 ++
From: Hermes Wu
When connect to device which can only training done by
step training, skip auto training when link training restart,
usually happen when display resolution is changed.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 8 ++--
1 file changed, 6 insertions(+)
Hi Thomas,
Is deprecating the driver a mandatory step?
I'm not aware of a mandatory requirement, at least not in the sense
of it being documented in Documentation/process like other aspects
of the Linux kernel development process. So I would say it's up to
the Maintainers for Hyper-V and FBDEV
On Mon, Sep 15, 2025 at 10:52 AM Conor Dooley wrote:
>
> On Mon, Sep 15, 2025 at 06:51:16PM +0100, Conor Dooley wrote:
> > Acked-by: Conor Dooley
>
> Hmm, actually there seems to be a more complete binding proposed here:
> https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250912-mt
Reviewed-by: Alex Hung
On 9/12/25 23:19, James Flowers wrote:
Documentation/process/deprecated.rst recommends against the use of kmalloc
with dynamic size calculations due to the risk of overflow and smaller
allocation being made than the caller was expecting. This could lead to
buffer overflow
GuC IRQ and tasklet handler receive just single G2H message, and let other
messages to be received from next tasklet. During this chained tasklet
process, if reset process started, communication will be disabled.
Skip warning for this condition.
Fixes: 65dd4ed0f4e1 ("drm/i915/guc: Don't receive al
On 9/15/25 18:10, David Hildenbrand wrote:
+
>>>
>>> Wrong indentation.
>>
>> checkpatch.pl did not complain, what I see is
>>
>> + VM_WARN_ON(!is_pmd_migration_entry(pmd) &&
>> + !is_pmd_device_private_entry(pmd));
>>
>
> David complains :)
>
>> It looks different in y
Introduce a DRM interface for DRM clients to further restrict the
VRR Range within the panel supported VRR range on a per-commit
basis.
The goal is to give DRM client the ability to do frame-doubling/
ramping themselves, or to set lower static refresh rates for power
savings.
This is done through
LG SW49410 is the display panel used by sdm845-lg-judyln (LG G7 ThinQ).
It supports all the same properties as panel-simple.
Signed-off-by: Paul Sajna
---
Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/device
From: Amir Dahan
Added panel driver used by LG G7 ThinQ (judyln)
Signed-off-by: Amir Dahan
Co-developed-by: Paul Sajna
Signed-off-by: Paul Sajna
---
drivers/gpu/drm/panel/Kconfig| 13 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-lg-sw49410.c |
Add myself (Paul Sajna) as maintainer for lg,sw49410
Signed-off-by: Paul Sajna
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index
0c1d245bf7b84f8a78b811e0c9c5a3edc09edc22..f6c7f3cd80d7db6551351432215049adb3a5f626
100644
--- a/MAINTAINERS
++
This patch series adds a drm panel driver for the LG SW49410 panel found
in the LG G7 ThinQ (codename judyln).
The basic driver skeleton was generated by
https://github.com/msm8916-mainline/linux-mdss-dsi-panel-driver-generator
from the vendor device-tree.
The panel driver works but during testi
On Tue, Sep 09, 2025 at 04:50:41AM +, Usyskin, Alexander wrote:
>+static int mei_lb_component_match(struct device *dev, int subcomponent,
>+ void *data)
>+{
>+ /*
>+* This function checks if requester is Intel %PCI_CLASS_DISPLAY_VGA
or
>+* %PCI_CLASS_DISP
./drivers/gpu/drm/xe/xe_tlb_inval.c: xe_tlb_inval.h is included more than once.
./drivers/gpu/drm/xe/xe_pt.c: xe_tlb_inval_job.h is included more than once.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=24705
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id
On 9/11/25 22:42, David Hildenbrand wrote:
> On 08.09.25 02:04, Balbir Singh wrote:
>> Implement CPU fault handling for zone device THP entries through
>> do_huge_pmd_device_private(), enabling transparent migration of
>> device-private large pages back to system memory on CPU access.
>>
>> When th
syzbot has found a reproducer for the following issue on:
HEAD commit:f83ec76bf285 Linux 6.17-rc6
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=13e5f93458
kernel config: https://syzkaller.appspot.com/x/.config?x=8f01d8629880e620
dashboard link: https:/
On Mon, Sep 15, 2025 at 12:33:08PM +0200, Daniel Stone wrote:
> Hi Dmitry,
>
> On Mon, 15 Sept 2025 at 02:57, Dmitry Baryshkov
> wrote:
> > On Thu, Sep 11, 2025 at 08:15:48PM +0300, Marius Vlad wrote:
> > > On Thu, Sep 11, 2025 at 04:50:59PM +0300, Dmitry Baryshkov wrote:
> > > > It's unclear, wh
Hi Chris Brandt,
Thanks for the patch.
> -Original Message-
> From: Chris Brandt
> Sent: 12 September 2025 15:21
> Subject: [PATCH v2 0/2] Remove hard coded values for MIPI-DSI
>
> When the initial drivers were submitted, some of the timing was hard coded
> and did not allow for any
>
At present VMBus driver is hinged off of CONFIG_HYPERV which entails
lot of builtin code and encompasses too much. It's not always clear
what depends on builtin hv code and what depends on VMBus. Setting
CONFIG_HYPERV as a module and fudging the Makefile to switch to builtin
adds even more confusio
With CONFIG_HYPERV and CONFIG_HYPERV_VMBUS separated, change CONFIG_HYPERV
to bool from tristate. CONFIG_HYPERV now becomes the core Hyper-V
hypervisor support, such as hypercalls, clocks/timers, Confidential
Computing setup, PCI passthru, etc. that doesn't involve VMBus or VMBus
devices.
Signed-o
At present, drivers/Makefile will subst =m to =y for CONFIG_HYPERV
for hv subdir. Also, drivers/hv/Makefile replaces =m to =y to build in
hv_common.c that is needed for the drivers. Moreover, vmbus driver is
built if CONFIG_HYPER is set, either loadable or builtin.
This is not a good approach. CON
Hi Tohmas,
On Tue, Sep 02, 2025 at 03:44:54PM +0200, Thomas Zimmermann wrote:
> > +/**
> > + * drm_atomic_build_readout_state - Creates an initial state from the
> > hardware
> > + * @dev: DRM device to build the state for
> > + *
> > + * This function allocates a &struct drm_atomic_state, calls
Hi,
On Mon, 15 Sept 2025 at 20:12, Philipp Stanner wrote:
>
> On Fri, 2025-09-12 at 21:44 +0800, Luc Ma wrote:
> > The mentioned function has been renamed since commit 180fc134d712
> > ("drm/scheduler: Rename cleanup functions v2."), so let it refer to
> > the current one.
> >
> > Signed-off-by:
Hi Lyude,
On 13.09.25 00:43, Lyude Paul wrote:
> Agh! Sorry for the spam, I should have double checked the code before writing
> this as I realized the reason I didn't implement this. Correct me if I'm wrong
> here since it's the first time I've interacted very much with this API in the
> kernel b
Applied. Thanks!
Alex
On Sat, Sep 13, 2025 at 1:31 AM James Flowers
wrote:
>
> Documentation/process/deprecated.rst recommends against the use of kmalloc
> with dynamic size calculations due to the risk of overflow and smaller
> allocation being made than the caller was expecting. This could le
On Fri, 12 Sep 2025 09:42:52 +0300, Svyatoslav Ryhel wrote:
> Document Sharp LQ079L1SX01 panel found in Xiaomi Mi Pad.
>
> Signed-off-by: Svyatoslav Ryhel
> ---
> .../display/panel/sharp,lq079l1sx01.yaml | 99 +++
> 1 file changed, 99 insertions(+)
> create mode 100644
>
On Mon, Sep 15, 2025 at 12:13:56PM +0300, Ilpo Järvinen wrote:
> Use pci_rebar_get_max_size() from PCI core in resize_vram_bar() to
> simplify code.
>
> Signed-off-by: Ilpo Järvinen
> Acked-by: Christian König
> ---
> drivers/gpu/drm/xe/xe_vram.c | 15 +++
Acked-by: Rodrigo Vivi
On 9/15/25 03:35, Karol Wachowski wrote:
Update firmware JSM API header to version 3.32.5
The changes seem more than updating header version?
Lizhi
Signed-off-by: Karol Wachowski
---
drivers/accel/ivpu/vpu_jsm_api.h | 513 ---
1 file changed, 326 insertion
Reviewed-by: Lizhi Hou
On 9/15/25 03:34, Karol Wachowski wrote:
From: Jacek Lawrynowicz
Reduce code duplication and improve the overall readability of the debugfs
output for job scheduling priority bands.
Additionally fix clang-tidy warning about missing default case in the
switch statement.
Reviewed-by: Lizhi Hou
On 9/15/25 03:34, Karol Wachowski wrote:
Ensure that cmdq->db_id is reset to 0 if ivpu_jsm_register_db fails,
preventing potential reuse of invalid command queue with
unregistered doorbell.
Signed-off-by: Karol Wachowski
---
drivers/accel/ivpu/ivpu_job.c | 6 --
On 9/15/25 03:34, Karol Wachowski wrote:
From: Andrzej Kacprowski
Allow user mode drivers to manage preemption buffers, enabling
memory savings by sharing a single buffer across multiple
command queues within the same memory context.
Introduce DRM_IVPU_PARAM_PREEMPT_BUFFER_SIZE to report the
On Mon, Sep 15, 2025 at 12:13:54PM +0300, Ilpo Järvinen wrote:
> PCI core provides pci_rebar_size_supported() and
> pci_rebar_size_to_bytes(), use them in resize_vram_bar() to simplify
> code.
>
> Signed-off-by: Ilpo Järvinen
> Acked-by: Christian König
> ---
> drivers/gpu/drm/xe/xe_vram.c | 19
This looks a bug fix. Is adding 'Fixes:' tag better?
On 9/15/25 03:35, Karol Wachowski wrote:
Previously, aborting work could return early after engine reset or resume
failure, skipping the necessary runtime_put cleanup leaving the device
with incorrect reference count breaking runtime power man
On Mon, Sep 15, 2025 at 07:24:10PM +0200, Andi Shyti wrote:
> Hi,
>
> On Mon, Sep 15, 2025 at 03:42:23PM +0300, Jani Nikula wrote:
> > On Mon, 15 Sep 2025, Ilpo Järvinen wrote:
> > > PCI core provides pci_rebar_size_supported() that helps in checking if
> > > a BAR Size is supported for the BAR o
The J722S features a BXS-4 GPU. Add the node for it.
Signed-off-by: Michael Walle
---
.../arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
b/arch/arm64/boot/dts/ti/k3-am62p-j
On Sat, 05 Jul 2025 13:05:13 +0300, Dmitry Baryshkov wrote:
> Switch VC4 driver to using CEC helpers code, simplifying hotplug and
> registration / cleanup. The existing vc4_hdmi_cec_release() is kept for
> now.
>
>
Applied to drm-misc-next, thanks!
[1/1] drm/vc4: hdmi: switch to generic CEC he
> That's not the complete EDID data, though. It's missing 6*16 bytes. If
> you go by the hex offsets, 0x100 does not follow 0x090.
> please grab the EDID from sysfs.
Fresh from my terminal:
➜ ~ cat /sys/class/drm/card1-eDP-1/edid | edid-decode
edid-decode (hex):
00 ff ff ff ff ff ff 00 0e 6f 1
On Mon, Sep 15, 2025 at 11:51:23AM -0400, Frank Li wrote:
> Add innolux,n133hse-ea1 13.3" TFT LCD panel and nlt,nl12880bc20-spwg-24
> 12.1" WXGA (1280 x 800) LVDS TFT LCD panel.
>
> Fix below CHECK_DTBS warnings:
> arch/arm/boot/dts/nxp/imx/imx6q-novena.dtb: /panel: failed to match any
> schema w
On Tue, Jul 15, 2025 at 02:24:46PM +0200, Thomas Zimmermann wrote:
> Include to declare struct platform_device_id.
> Avoids dependency on backlight header to include it.
>
> Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Thompson (RISCstar)
Daniel.
On Mon, Sep 15, 2025 at 02:06:58PM +0300, Dmitry Baryshkov wrote:
> On Mon, Sep 15, 2025 at 04:00:41PM +0530, Harikrishna Shenoy wrote:
> > From: Swapnil Jakhade
> >
> > Enable support for Display Stream Compression (DSC) in independent
> > mode with a single stream, along with Forward Error Corr
On Tue, Sep 02, 2025 at 03:18:17PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 02.09.25 um 10:32 schrieb Maxime Ripard:
> > Bridges implement their state using a drm_private_obj and an
> > hand-crafted reset implementation.
> >
> > Since drm_private_obj doesn't have a set of reset helper like the
On Wed, 09 Jul 2025 10:54:38 +0200, Loic Poulain wrote:
> If the interrupt occurs before resource initialization is complete, the
> interrupt handler/worker may access uninitialized data such as the I2C
> tcpc_client device, potentially leading to NULL pointer dereference.
>
>
Applied to drm-mis
On 12/09/2025 19:19, Daniel Almeida wrote:
> This series adds basic Panthor tests. In particular, these are being
> used to test both Panthor[0] and Tyr[1], i.e.: the new Rust GPU driver
> that implements Panthor's uAPI (i.e.: panthor_drm.h). Most of the
> initial tests were chosen in order to have
On Tue, Sep 09, 2025 at 11:05:25PM -0300, Fabio Estevam wrote:
> The LCDIF IP on i.MX6SL and i.MX6SLL is compatible with i.MX6SX.
>
> Provide a more specific "fsl,imx6sx-lcdif" compatible and still keep
> "fsl,imx28-lcdif" for DT compatibility.
>
> Signed-off-by: Fabio Estevam
> Reviewed-by: Ahmad
Hi Dave and Daniel,
Add Exynos7870 SoC support to Exynos DSI driver and a bug fixup.
Please kindly let me know if there is any problem.
Ps. This PR depends on the following PR being merged first:
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos
tags/exynos-drm-misc-next-for-v
On Thu, 2025-08-14 at 21:50 -0600, Alex Hung wrote:
> From: Harry Wentland
>
> With the introduction of the pre-blending color pipeline we
> can no longer have color operations that don't have a clear
> position in the color pipeline. We deprecate all existing
> plane properties. For upstream dri
On 9/12/2025 8:08 PM, Dmitry Baryshkov wrote:
> On Fri, Sep 12, 2025 at 08:00:14PM +0800, Xiangxu Yin wrote:
>> On 9/12/2025 6:19 PM, Dmitry Baryshkov wrote:
>>> On Thu, Sep 11, 2025 at 10:55:05PM +0800, Xiangxu Yin wrote:
Add USB/DP switchable PHY clock registration and DT parsing for DP of
On Mon, Sep 15, 2025 at 10:42:22AM +0200, Maxime Ripard wrote:
> Hi Tohmas,
>
> On Tue, Sep 02, 2025 at 03:44:54PM +0200, Thomas Zimmermann wrote:
> > > +/**
> > > + * drm_atomic_build_readout_state - Creates an initial state from the
> > > hardware
> > > + * @dev: DRM device to build the state f
On Mon, Sep 15, 2025 at 04:06:47PM +0800, Yang Li wrote:
The header files xe_tlb_inval.h is included twice in xe_tlb_inval.c,
so one inclusion of each can be removed.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=24706
Signed-off-by: Yang Li
similar comment
Hi
Am 12.09.25 um 18:42 schrieb Iker Pedrosa:
This patch series improves the Solomon SSD130x DRM driver by adopting
existing DRM helpers, improving code clarity, and following kernel
coding standards.
* Patch #1 moves DRM GEM framebuffer CPU access calls to make critical
sections more visibl
On Mon, Sep 15, 2025 at 05:06:51PM +0200, David Heidelberg wrote:
>
> On 15/09/2025 13:11, Dmitry Baryshkov wrote:
> > On Mon, Sep 15, 2025 at 12:11:49PM +0200, David Heidelberg wrote:
> > > On 15/09/2025 03:29, Dmitry Baryshkov wrote:
> > > > On Sat, Sep 13, 2025 at 09:19:48PM +0200, David Heidel
The TISCI firmware will return 0 if the clock or consumer is not
enabled although there is a stored value in the firmware. IOW a call to
set rate will work but at get rate will always return 0 if the clock is
disabled.
The clk framework will try to cache the clock rate when it's requested
by a cons
Hi,
On Fri, Aug 08, 2025 at 04:49:14PM +0200, Luca Ceresoli wrote:
> All users have been replaced by drm_for_each_bridge_in_chain_scoped().
>
> Signed-off-by: Luca Ceresoli
> ---
> .clang-format| 1 -
> include/drm/drm_bridge.h | 14 --
> 2 files changed, 15 deletions(-
On Mon, Sep 15, 2025 at 10:24:20AM -0400, Frank Li wrote:
> On Mon, Sep 15, 2025 at 04:00:22AM +0300, Dmitry Baryshkov wrote:
> > On Fri, Sep 12, 2025 at 02:51:59PM -0400, Frank Li wrote:
> > > Add innolux,n133hse-ea1 13.3" TFT LCD panel and nlt,nl12880bc20-spwg-24
> > > 12.1" WXGA (1280 x 800) LVD
oops! Sorry - I meant to respond to this version :)
Reviewed-by: Lyude Paul
On Sat, 2025-08-23 at 12:26 -0500, Aaron Kling via B4 Relay wrote:
> From: Aaron Kling
>
> Starting with Tegra186, gpu clock handling is done by the bpmp and there
> is little to be done by the kernel. The only th
On Mon, Sep 15, 2025 at 01:17:52PM +0300, Tomi Valkeinen wrote:
> Hi,
>
> On 15/09/2025 11:55, Swamil Jain wrote:
> > Hi,
> >
> > On 9/15/25 13:27, Maxime Ripard wrote:
> >> On Thu, Sep 11, 2025 at 04:37:15PM +0530, Swamil Jain wrote:
> >>> From: Jayesh Choudhary
> >>>
> >>> Since OLDI consumes
oops! Sorry - I meant to respond to this version :)
Reviewed-by: Lyude Paul
On Sat, 2025-08-23 at 12:26 -0500, Aaron Kling via B4 Relay wrote:
> From: Aaron Kling
>
> Starting with Tegra186, gpu clock handling is done by the bpmp and there
> is little to be done by the kernel. The only th
On Tue, Sep 09, 2025 at 10:43:04AM +0300, Svyatoslav Ryhel wrote:
> According to LP8556 datasheet eprom region starts at 0x98 so adjust value
> in the driver accordingly.
>
> Signed-off-by: Svyatoslav Ryhel
Reviewed-by: Daniel Thompson (RISCstar)
Daniel.
Reviewed-by: Lyude Paul
Since this was tested already with the devfreq patches on top I will push this
+ the devfreq patch to drm-misc-next
On Fri, 2025-08-22 at 19:58 -0500, Aaron Kling via B4 Relay wrote:
> From: Aaron Kling
>
> Starting with Tegra186, gpu clock handling is done by the bpmp
Hi,
On Mon, Sep 15, 2025 at 10:46 AM John Ripple wrote:
>
> Add support for DisplayPort to the bridge, which entails the following:
> - Get and use an interrupt for HPD;
> - Properly clear all status bits in the interrupt handler;
>
> Signed-off-by: John Ripple
> ---
> V1 -> V2: Cleaned up codin
Hi Dave and Daniel,
Add DSIM bridge drvier support for Exynos7870 SoC.
Please kindly let me know if there is any problem.
Thanks,
Inki Dae
The following changes since commit 0d9f0083f7a5a31d91d501467b499bb8c4b25bdf:
Merge tag 'v6.17-rc6' into drm-next (2025-09-15 17:51:07 +1000)
are ava
On Fri, Sep 12, 2025 at 08:37:03PM +0200, Nicolas Frattaroli wrote:
> The MediaTek MT8196 SoC includes an embedded MCU referred to as "GPUEB",
> acting as glue logic to control power and frequency of the Mali GPU.
> This MCU runs special-purpose firmware for this use, and the main
> application pro
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
Hi,
On Mon, Sep 15, 2025 at 4:05 PM Bjorn Andersson wrote:
>
> On Fri, Sep 12, 2025 at 10:21:55AM +0200, Jens Wiklander wrote:
> > Hi,
> >
> > On Fri, Sep 12, 2025 at 6:07 AM Amirreza Zarrabi
> > wrote:
> > >
> > > This patch series introduces a Trusted Execution Environment (TEE)
> > > driver f
Hi,
>...but it doesn't really matter. I guess it's a little weird that your
>current code still writes status even if it's 0, but it shouldn't
>really hurt. There's no need to spin with that change unless you feel
>like it.
I'm already working on it so I might as well.
Thanks for all the feedbac
Add support for DisplayPort to the bridge, which entails the following:
- Get and use an interrupt for HPD;
- Properly clear all status bits in the interrupt handler;
Signed-off-by: John Ripple
---
V1 -> V2: Cleaned up coding style and addressed review comments
V2 -> V3:
- Removed unused HPD IRQs
From: Andrzej Kacprowski
Remove references to firmware boot parameters that were never used
by any production version of device firmware.
Signed-off-by: Andrzej Kacprowski
Signed-off-by: Karol Wachowski
---
drivers/accel/ivpu/ivpu_fw.c | 9 -
1 file changed, 9 deletions(-)
diff --git
JFYI - After talking a bit to the Asahi folks, it seems like that we're
actually a ways off from Asahi having any actual usecase for the export()
callback - so I'm going to just drop the dma_buf bits here for the next
version of the patch series
On Mon, 2025-09-15 at 10:59 +0200, Christian König w
Ensure that cmdq->db_id is reset to 0 if ivpu_jsm_register_db fails,
preventing potential reuse of invalid command queue with
unregistered doorbell.
Signed-off-by: Karol Wachowski
---
drivers/accel/ivpu/ivpu_job.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/
On 15:23-20250827, Nishanth Menon wrote:
> Hi,
>
> Add initial support for IT66122, which seems to be compatible to it66121
> but probably has additional functionality.
>
> BeagleY-AI uses this it66122 as the old part is no longer in production
> as far as I understand.
>
> Now, BeaglePlay uses
Ping?
regards,
dan carpenter
On Thu, Aug 07, 2025 at 06:53:41PM +0300, Dan Carpenter wrote:
> The xe_preempt_fence_create() function returns error pointers. It
> never returns NULL. Update the error checking to match.
>
> Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs"
Hi,
On Mon, Sep 15, 2025 at 9:51 AM John Ripple wrote:
>
> @@ -1309,6 +1375,41 @@ static int ti_sn_bridge_parse_dsi_host(struct
> ti_sn65dsi86 *pdata)
> return 0;
> }
>
> +static irqreturn_t ti_sn_bridge_interrupt(int irq, void *private)
> +{
> + struct ti_sn65dsi86 *pdata = priva
Hi,
On Mon, Sep 15, 2025 at 4:34 AM Zhongtian Wu
wrote:
>
> @@ -2006,11 +2008,13 @@ static const struct edp_panel_entry edp_panels[] = {
> EDP_PANEL_ENTRY('C', 'M', 'N', 0x142e, &delay_200_500_e80_d50,
> "N140BGA-EA4"),
> EDP_PANEL_ENTRY('C', 'M', 'N', 0x1441, &delay_200_500_e80_
On Tue, Jul 15, 2025 at 02:24:52PM +0200, Thomas Zimmermann wrote:
> The backlight interfaces don't require anything from , so
> don't include it.
>
> Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Thompson (RISCstar)
Daniel.
On Tue, Jul 15, 2025 at 02:24:47PM +0200, Thomas Zimmermann wrote:
> Include to declare IOMEM(). Avoids dependency on
> backlight header to include it.
>
> Signed-off-by: Thomas Zimmermann
Reviewed-by: Daniel Thompson (RISCstar)
Daniel.
Hi,
On Mon, Sep 15, 2025 at 03:42:23PM +0300, Jani Nikula wrote:
> On Mon, 15 Sep 2025, Ilpo Järvinen wrote:
> > PCI core provides pci_rebar_size_supported() that helps in checking if
> > a BAR Size is supported for the BAR or not. Use it in
> > i915_resize_lmem_bar() to simplify code.
> >
> > Si
On Wed, Jul 16, 2025 at 08:39:03AM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 15.07.25 um 15:34 schrieb Rob Herring:
> > On Tue, Jul 15, 2025 at 7:30 AM Thomas Zimmermann
> > wrote:
> > > Include to declare struct device_node and include
> > > to declare struct of_device_id. Avoids
> > > depen
On Tue, Sep 02, 2025 at 10:22:12PM +0200, Laurent Pinchart wrote:
> > > + struct drm_bridge *bridge = drm_priv_to_bridge(s->obj);
> > > +
> > > + drm_printf(p, "bridge: %s", drm_get_connector_type_name(bridge->type));
>
> It would be nice to identify the bridge more precisely, but bridges have
> n
On Mon, 15 Sep 2025, Lucas De Marchi wrote:
> On Mon, Sep 15, 2025 at 12:13:47PM +0300, Ilpo Järvinen wrote:
> > pci.c has been used as catch everything that doesn't fits elsewhere
> > within PCI core and thus resizable BAR code has been placed there as
> > well. Move Resizable BAR related code to
Hi Ilpo,
On Mon, Sep 15, 2025 at 12:13:53PM +0300, Ilpo Järvinen wrote:
> PCI core provides pci_rebar_size_supported() that helps in checking if
> a BAR Size is supported for the BAR or not. Use it in
> i915_resize_lmem_bar() to simplify code.
>
> Signed-off-by: Ilpo Järvinen
> Acked-by: Christi
On Thu, 11 Sep 2025 12:09:58 -0300, Ariel D'Alessandro wrote:
> Convert the existing text-based DT bindings for Dialog Semiconductor DA9211
> Voltage Regulators family to a DT schema. Examples are simplified, as these
> are all equal.
>
> Signed-off-by: Ariel D'Alessandro
> ---
> .../devicetre
Acked-by: Conor Dooley
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Description: PGP signature
On Thu, 11 Sep 2025 12:09:57 -0300, Ariel D'Alessandro wrote:
> Current, the DT bindings for MediaTek's MT65xx Pin controller is missing
> the gpio-line-names property, add it to the associated schema.
>
> Signed-off-by: Ariel D'Alessandro
> ---
> .../devicetree/bindings/pinctrl/mediatek,mt65x
On Thu, 11 Sep 2025 12:09:53 -0300, Ariel D'Alessandro wrote:
> Convert the existing text-based DT bindings for Mediatek MT8173 RT5650
> codecs to a DT schema.
>
> Signed-off-by: Ariel D'Alessandro
> ---
> .../sound/mediatek,mt8173-rt5650.yaml | 73 +++
> .../bindings/s
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