new-connector-status/20250923-163922
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
patch link:
https://lore.kernel.org/all/20250923083636.4749-2-marius.v...@collabora.com/
patch subject: [PATCH 1/2] drm: Introduce a new connector status
in testcase: boot
config: x86_64-randconfig-0
On 25-09-23 16:03:50, Jessica Zhang wrote:
> Since 3D merge allows for larger modes to be supported across 2 layer
> mixers, filter modes based on adjusted mode clock / 2 when 3d merge is
> supported.
>
> Reported-by: Abel Vesa
> Fixes: 62b7d6835288 ("drm/msm/dpu: Filter modes based on adjusted m
Hi Dave, Sima,
here's the drm-misc-next-fixes PR.
Best regards
Thomas
drm-misc-next-fixes-2025-09-25:
Short summary of fixes pull:
bridge:
- waveshare-dsi: Fix error handling in probe function
pixpaper:
- select GEM SHMEM helpers
The following changes since commit 0265d0ebb409a25d3bb3a19494e01
On 2025-09-25 at 08:03 +1000, Lyude Paul wrote...
> On Mon, 2025-09-22 at 21:30 +1000, Alistair Popple wrote:
> > This commit introduces core infrastructure for handling GSP command and
> > message queues in the nova-core driver. The command queue system enables
> > bidirectional communication bet
在 2025-09-24星期三的 20:15 +0200，Christian Gmeiner写道：
> > > > > Verisilicon has a series of display controllers prefixed with
> > > > > DC
> > > > > and
> > > > > with self-identification facility like their GC series GPUs.
> > > > >
> > > > > Add a device tree binding for it.
> > > > >
> > > > > Dep
Add device tree nodes for the DSI0 controller with their corresponding
PHY found on Qualcomm QCS8300 SoC.
Signed-off-by: Ayushi Makhija
---
arch/arm64/boot/dts/qcom/qcs8300.dtsi | 95 ++-
1 file changed, 94 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qc
On Wed, Sep 24, 2025 at 04:46:37PM -0700, Jingyi Wang wrote:
> From: Kumari Pallavi
>
> DSP currently supports 32-bit IOVA (32-bit PA + 4-bit SID) for
> both Q6 and user DMA (uDMA) access. This is being upgraded to
> 34-bit PA + 4-bit SID due to a hardware revision in CDSP for
> Kaanapali SoC, wh
On Thu, Sep 25, 2025 at 10:57:14AM +0800, Jianfeng Liu wrote:
> Hi,
>
> On 2025-09-25 2:18 UTC, Dmitry Baryshkov wrote:
> >When does q6apm_lpass_dai_prepare() happen?
>
> q6apm_lpass_dai_prepare() happens both before and after hw_params/prepare
> of hdmi-codec:
>
> [ 14.055198] q6apm-lpass-da
Dmitry Baryshkov 于2025年9月25日周四 03:21写道：
>
> On Wed, Sep 24, 2025 at 11:08:12PM +0800, Jun Nie wrote:
> > Support a hardware configuration where two independent DSI panels are
> > driven by a single, synchronous CRTC. This configuration uses a bonded
> > DSI link to provide a unified vblank for bot
On Mon, 2025-09-22 at 21:30 +1000, Alistair Popple wrote:
> The GSP requires some pieces of metadata to boot. These are passed in a
> struct which the GSP transfers via DMA. Create this struct and get a
> handle to it for future use when booting the GSP.
>
> Signed-off-by: Alistair Popple
>
> --
Hi Alexandr,
Please, verision the patch: this is [PATCH v2].
On Wed, Sep 24, 2025 at 03:48:50PM +0300, Alexandr Sapozhnkiov wrote:
> Return value of function drm_vma_node_allow_once(),
> called at i915_gem_mman.c:672, is not checked.
You've been asked to improve the commit log, but you didn't.
On Thu, Sep 25, 2025 at 12:05:09PM +0800, Jianfeng Liu wrote:
> After reusing drm_hdmi_audio_* helpers and drm_bridge_connector
> integration in drm/msm/dp, we have dropped msm_dp_audio_hw_params and
> use msm_dp_audio_prepare instead. While userspace is still calling
> hw_params to do audio initia
Hi Christian,
> Subject: Re: [PATCH v4 1/5] PCI/P2PDMA: Don't enforce ACS check for device
> functions of Intel GPUs
>
> >>
> >> On 23.09.25 15:38, Jason Gunthorpe wrote:
> >>> On Tue, Sep 23, 2025 at 03:28:53PM +0200, Christian König wrote:
> On 23.09.25 15:12, Jason Gunthorpe wrote:
>
On Wed, Sep 24, 2025 at 02:49:54PM +0800, Chu Guangqing wrote:
> add support for Yhgc BMC soc chipset
>
> Signed-off-by: Chu Guangqing
> ---
> MAINTAINERS | 5 +
> drivers/gpu/drm/Kconfig | 2 +
> drivers/gpu/drm/Makefile
On Wed, Sep 24, 2025 at 02:49:53PM +0800, Chu Guangqing wrote:
> Sorry, Thomas. The changes have been made this time.
>
> >Hi
> >
> >Am 10.09.25 um 04:23 schrieb Chu Guangqing:
> >> +select DRM_VRAM_HELPER
> >> +select DRM_TTM_HELPER
> >
> >I told you twice that VRAM helpers are obsolete a
Hi,
On 2025-09-25 2:18 UTC, Dmitry Baryshkov wrote:
>When does q6apm_lpass_dai_prepare() happen?
q6apm_lpass_dai_prepare() happens both before and after hw_params/prepare
of hdmi-codec:
[ 14.055198] q6apm-lpass-dais
370.remoteproc:glink-edge:gpr:service@1:bedais: q6apm_lpass_dai_prepare(
On Thu, Sep 25, 2025 at 10:58:27AM +0800, Liu Ying wrote:
> On 09/24/2025, Frank Li wrote:
> > On Wed, Sep 24, 2025 at 02:41:50PM +0800, Liu Ying wrote:
> >> On 09/23/2025, Frank Li wrote:
> >>> On Tue, Sep 23, 2025 at 10:07:57AM +0800, Liu Ying wrote:
> Display Prefetch Resolve Channel(DPRC)
On Wed, Sep 24, 2025 at 05:55:39PM +0800, Chaoyi Chen wrote:
> On 9/23/2025 6:40 PM, Dmitry Baryshkov wrote:
>
> > On Tue, Sep 23, 2025 at 05:07:25PM +0800, Chaoyi Chen wrote:
> > > On 9/23/2025 11:11 AM, Dmitry Baryshkov wrote:
> > >
> > > > On Tue, Sep 23, 2025 at 09:34:39AM +0800, Chaoyi Chen
On Mon, Sep 22, 2025 at 02:18:45PM +0200, Mike Looijmans wrote:
> The tmds181 and sn65dp159 are "retimers" and hence can be considered
> HDMI-to-HDMI bridges. Typical usage is to convert the output of an
> FPGA into a valid HDMI signal, and it will typically be inserted
> between an encoder and hdm
On Wed, Sep 24, 2025 at 04:46:36PM -0700, Jingyi Wang wrote:
> From: Kumari Pallavi
>
> Implement the new IOVA formatting required by the DSP architecture change
> on Kaanapali SoC. Place the SID for DSP DMA transactions at bit 56 in the
> physical address. This placement is necessary for the DSP
On 9/25/25 09:58, Alistair Popple wrote:
> On 2025-09-25 at 03:36 +1000, Zi Yan wrote...
>> On 24 Sep 2025, at 6:55, David Hildenbrand wrote:
>>
>>> On 18.09.25 04:49, Zi Yan wrote:
On 16 Sep 2025, at 8:21, Balbir Singh wrote:
> Add routines to support allocation of large order zone
On Thu, Sep 25, 2025 at 11:23:38AM +0800, Jianfeng Liu wrote:
> Hi,
>
> On Thu, 25 Sep 2025 06:08:58 +0300, Dmitry Baryshkov wrote:
> >> [ 14.055198] q6apm-lpass-dais
> >> 370.remoteproc:glink-edge:gpr:service@1:bedais:
> >> q6apm_lpass_dai_prepare() started
> >> [ 14.067225] q6apm-lpass
On Mon, 2025-09-22 at 21:30 +1000, Alistair Popple wrote:
> This commit introduces core infrastructure for handling GSP command and
> message queues in the nova-core driver. The command queue system enables
> bidirectional communication between the host driver and GSP firmware
> through a remote me
On Thu, Sep 25, 2025 at 09:51:12AM +0800, Jianfeng Liu wrote:
> Hi,
>
> On 2025-09-24 20:17 UTC, Dmitry Baryshkov wrote:
> >> msm_dp_audio_prepare is not called because hdmi-codec driver only checks
> >> and runs hw_params. This commit will add hw_params callback function
> >> same as drm_connecto
Hi Dmitry,
On 9/12/2025 7:05 PM, Dmitry Baryshkov wrote:
On Fri, Sep 12, 2025 at 04:58:42PM +0800, Damon Ding wrote:
There may be the panel or bridge after &analogix_dp_device.bridge.
Add rockchip_dp_attach() to support the next bridge attachment for
the Rockchip side.
Signed-off-by: Damon Din
On Wed, Sep 24, 2025 at 04:57:43PM +0800, Jianfeng Liu wrote:
> After reusing drm_hdmi_audio_* helpers and drm_bridge_connector
> integration in drm/msm/dp, we have dropped msm_dp_audio_hw_params and
> use msm_dp_audio_prepare instead. While userspace is still calling
> hw_params to do audio initia
On Wednesday, September 24, 2025 7:24 PM Svyatoslav Ryhel wrote:
> ср, 24 вер. 2025 р. о 07:47 Mikko Perttunen пише:
> >
> > On Tuesday, September 23, 2025 3:50 PM Svyatoslav Ryhel wrote:
> > > вт, 23 вер. 2025 р. о 09:11 Svyatoslav Ryhel пише:
> > > >
> > > > вт, 23 вер. 2025 р. о 09:04 Mikko Pe
On 2025-09-16 at 22:21 +1000, Balbir Singh wrote...
> Extend core huge page management functions to handle device-private THP
> entries. This enables proper handling of large device-private folios in
> fundamental MM operations.
>
> The following functions have been updated:
>
> - copy_huge_pmd
On 2025-09-25 at 03:36 +1000, Zi Yan wrote...
> On 24 Sep 2025, at 6:55, David Hildenbrand wrote:
>
> > On 18.09.25 04:49, Zi Yan wrote:
> >> On 16 Sep 2025, at 8:21, Balbir Singh wrote:
> >>
> >>> Add routines to support allocation of large order zone device folios
> >>> and helper functions for
Introduces support for new DSP IOVA formatting and hardware-specific
configuration required to enable ADSP and CDSP functionality on the
Kaanapali SoC.
Add support for a new IOVA formatting scheme by adding an `iova_format
flag to the DSP driver. This flag standardizes the placement of the stream
Hi Jyothi,
I'm sorry, but this is not a resend, but this is a v8. Other
than:
1. commit log in patch 1: removed duplicate sentence
2. use proper types when calling geni_i2c_gpi_unmap() inside
geni_i2c_gpi_multi_desc_unmap()
is there anything else?
Please, next increase the version even for t
Convert the NVIDIA GPU binding to DT schema format.
Add undocumented "interconnects" and "interconnect-names" properties for
gp10b and gv11b. Drop all but one example.
Signed-off-by: Rob Herring (Arm)
---
.../devicetree/bindings/gpu/nvidia,gk20a.txt | 115
.../devicetree/bindings/
On 9/22/25 4:30 AM, Alistair Popple wrote:
> +// Match what Nouveau does here:
Silly nit: can we please delete the above comment? (And if you'd
like to keep the note, then it can go in the commit log instead.)
I might be the one who actually added that comment at some point,
but have sin
Reviewed-by: Lyude Paul
On Mon, 2025-09-22 at 21:30 +1000, Alistair Popple wrote:
> Boot the GSP to the RISC-V active state. Completing the boot requires
> running the CPU sequencer which will be added in a future commit.
>
> Signed-off-by: Alistair Popple
>
> ---
>
> Changes for v2:
> - Reb
Reviewed-by: Lyude Paul
On Mon, 2025-09-22 at 21:30 +1000, Alistair Popple wrote:
> From: Joel Fernandes
>
> Add definition for RISCV_CPUCTL register and use it in a new falcon API
> to check if the RISC-V core of a Falcon is active. It is required by
> the sequencer to know if the GSP's RISCV
Reviewed-by: Lyude Paul
On Mon, 2025-09-22 at 21:30 +1000, Alistair Popple wrote:
> Add the RM registry and system information commands that enable the host
> driver to configure GSP firmware parameters during initialization.
>
> The RM registry is serialized into a packed format and sent via th
e-commit: a3306041f55d0f86c40d06eaad1d4e8f06e4483d
change-id: 20250924-dsi-dual-panel-upstream-4aded63bd2d5
Best regards,
--
Jun Nie
Reviewed-by: Lyude Paul
On Mon, 2025-09-22 at 21:30 +1000, Alistair Popple wrote:
> Initialise the GSP resource manager arguments (rmargs) which provide
> initialisation parameters to the GSP firmware during boot. The rmargs
> structure contains arguments to configure the GSP message/command queu
M_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC,
> };
>
> static const struct drm_display_mode et028013dma_mode = {
>
> ---
> base-commit: 07e27ad16399afcd693be20211b0dfae63e0615f
> change-id: 20250924-t28cp45tn89-fix-0931500ee88a
--
Regards,
Laurent Pinchart
LAG_PVSYNC | DRM_MODE_FLAG_NVSYNC,
+ .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC,
};
static const struct drm_display_mode et028013dma_mode = {
---
base-commit: 07e27ad16399afcd693be20211b0dfae63e0615f
change-id: 20250924-t28cp45tn89-fix-0931500ee88a
Best regards,
--
Sebastian Reichel
Applied to drm-misc-next
On 9/23/25 08:29, Karol Wachowski wrote:
Reviewed-by: Karol Wachowski
On 9/23/2025 5:22 PM, Lizhi Hou wrote:
Currently, pm_runtime_resume_and_get() is invoked in the driver's open
callback, and pm_runtime_put_autosuspend() is called in the close
callback. As a result,
On Wed, Sep 24, 2025 at 04:36:00AM +0200, Marek Vasut wrote:
> On 9/24/25 3:18 AM, Sebastian Reichel wrote:
>
> Hello Sebastian,
>
> > On Tue, Sep 23, 2025 at 04:26:16PM +0300, Laurent Pinchart wrote:
> >> I wonder if the DRM_MODE_FLAG_P[HV]SYNC flags are always the exact
> >> opposite of DRM_MOD
Op 05-09-2025 om 17:49 schreef Badal Nilawar:
Extract and print version info of the late binding binary.
v2: Some refinements (Daniele)
Signed-off-by: Badal Nilawar
Reviewed-by: Daniele Ceraolo Spurio
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/xe/xe_late_bind_fw.c | 124
On 9/23/25 04:18, Karol Wachowski wrote:
Split firmware boot parameters (4KB) and FW version (4KB) into dedicated
buffer objects, separating them from the FW runtime memory buffer. This
creates three distinct buffers with independent allocation control.
This enables future modifications, parti
On Mon, 2025-09-22 at 21:30 +1000, Alistair Popple wrote:
> From: Joel Fernandes
>
> A data structure that can be used to write across multiple slices which
> may be out of order in memory. This lets SBuffer user correctly and
> safely write out of memory order, without error-prone tracking of
>
Some comments down below
On Mon, 2025-09-22 at 21:30 +1000, Alistair Popple wrote:
> The GSP requires several areas of memory to operate. Each of these have
> their own simple embedded page tables. Set these up and map them for DMA
> to/from GSP using CoherentAllocation's. Return the DMA handle de
From: Dongwon Kim
When the host KVM/QEMU resumes from hibernation, it loses all graphics
resources previously submitted by the guest OS, as the QEMU process is
terminated during the suspend-resume cycle. This leads to invalid resource
errors when the guest OS attempts to interact with the host us
From: Dongwon Kim
Register a PM notifier in virtio-gpu to handle suspend/hibernate
events. On PM_POST_HIBERNATION, it resubmits all GPU objects
so that resources can properly recovered in QEMU after resume.
Suggested-by: Dmitry Osipenko
Cc: Vivek Kasireddy
Signed-off-by: Dongwon Kim
---
driv
On Wed, Sep 24, 2025 at 11:08:12PM +0800, Jun Nie wrote:
> Support a hardware configuration where two independent DSI panels are
> driven by a single, synchronous CRTC. This configuration uses a bonded
> DSI link to provide a unified vblank for both displays.
>
> This allows application software t
On Wed, Sep 24, 2025 at 11:08:10PM +0800, Jun Nie wrote:
> Some panels support multiple slice to be sent in a single DSC packet. And
s/support/require/
If the panel supports something, then we can omit that and send 1 slice
as we currently do. If the panel requires multiple slices, it's
mandatory
> > > > Verisilicon has a series of display controllers prefixed with DC
> > > > and
> > > > with self-identification facility like their GC series GPUs.
> > > >
> > > > Add a device tree binding for it.
> > > >
> > > > Depends on the specific DC model, it can have either one or two
> > > > display
On Wed, Sep 24, 2025 at 7:44 AM <2564278...@qq.com> wrote:
>
> From: Wang Jiang
>
> The audio detection process in the Radeon driver is as follows:
> radeon_dvi_detect/radeon_dp_detect -> radeon_audio_detect ->
> radeon_audio_enable -> radeon_audio_component_notify ->
> radeon_audio_component_ge
On 9/24/2025 4:38 PM, Yury Norov wrote:
> On Wed, Sep 24, 2025 at 12:52:41PM +0200, Greg KH wrote:
>> On Sun, Sep 21, 2025 at 03:47:55PM +0200, Danilo Krummrich wrote:
>>> On Sun Sep 21, 2025 at 2:45 PM CEST, Greg KH wrote:
Again, regmap handles this all just fine, why not just make binding
On Wed Sep 24, 2025 at 4:38 PM CEST, Yury Norov wrote:
> I didn't ask explicitly, and maybe it's a good time to ask now: Joel,
> Danilo and everyone, have you considered adopting this project in
> kernel?
>
> The bitfield_struct builds everything into the structure:
>
> use bitfield_struct:
Add helpers to query the DP branch device's per-slice throughput as well
as overall throughput and line-width capabilities.
Cc: dri-devel@lists.freedesktop.org
Suggested-by: Ville Syrjälä
Signed-off-by: Imre Deak
---
drivers/gpu/drm/display/drm_dp_helper.c | 133
includ
Some Synaptics MST branch devices have a problem decompressing a stream
with a compressed link-bpp higher than 12, if the pixel clock is higher
than ~50 % of the maximum throughput capability reported by the branch
device. The screen remains blank, or for some - mostly black content -
gets enabled,
last_bridge_state = drm_atomic_get_new_bridge_state(crtc_state->state,
last_bridge);
---
base-commit: 90315cd293f321ada7bbd43a59636716e102d68a
change-id:
20250924-b4-drm-bridge-alloc-getput-drm_atomic_bridge_chain_select_bus_fmts-8e3b6004cbe2
Best regards,
--
Luca Ceresoli
Some panels support multiple slice to be sent in a single DSC packet. And
this feature is a must for specific panels, such as JDI LPM026M648C. Add a
dsc_slice_per_pkt member into struct mipi_dsi_device and support the
feature in msm mdss driver.
Co-developed-by: Jonathan Marek
Signed-off-by: Jona
Hi Krzysztof Karas,
Ignored (unchecked) return values from functions that can fail.
While a single unchecked return may look harmless, in aggregate they create
a broad
attack surface — a latent, easily-exploitable category of vulnerabilities
that can lead to data corruption,
denial-of-service, or
On 2025-09-24 03:50, Michel Dänzer wrote:
> On 15.09.25 12:01, Michel Dänzer wrote:
>> On 12.09.25 15:45, Derek Foreman wrote:
>>> On 9/12/25 2:33 AM, Chuanyu Tseng wrote:
This is done through 2 new CRTC properties, along with a client
cap. See the docstrings in patch for details.
On Wed, Sep 24, 2025 at 12:52:41PM +0200, Greg KH wrote:
> On Sun, Sep 21, 2025 at 03:47:55PM +0200, Danilo Krummrich wrote:
> > On Sun Sep 21, 2025 at 2:45 PM CEST, Greg KH wrote:
> > > Again, regmap handles this all just fine, why not just make bindings to
> > > that api here instead?
> >
> > Th
On Sun, Sep 21, 2025 at 03:47:55PM +0200, Danilo Krummrich wrote:
> On Sun Sep 21, 2025 at 2:45 PM CEST, Greg KH wrote:
> > Again, regmap handles this all just fine, why not just make bindings to
> > that api here instead?
>
> The idea is to use this for the register!() macro, e.g.
>
> regi
The product page referenced in the FB_RADEON is no longer valid.
Remove it to avoid pointing to an invalid link.
Signed-off-by: Sukrut Heroorkar
---
Changes since v1:
- Dropped the link entirely as suggested
(See:
https://lore.kernel.org/all/CADnq5_NHu5=esjzrgy_s80jf68zaprryx4_l70dwddsn3vx...@ma
Return value of function drm_vma_node_allow_once(),
called at i915_gem_mman.c:672, is not checked.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Signed-off-by: Alexandr Sapozhnikov
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 7 +--
1 file changed, 5 insertions(+), 2
Hi Madhur,
On Wed, Sep 24, 2025 at 01:20:51AM +0530, Madhur Kumar wrote:
> Follow the advice in Documentation/filesystems/sysfs.rst:
> show() should only use sysfs_emit() or sysfs_emit_at() when formatting
> the value to be returned to user space.
>
> Signed-off-by: Madhur Kumar
Reviewed-by: An
On Wed, Sep 24, 2025 at 01:28:18PM +0200, Danilo Krummrich wrote:
> On Wed Sep 24, 2025 at 12:52 PM CEST, Greg KH wrote:
> > Ok, great, but right now it's not doing that from what I am seeing when
> > reading the code. Shouldn't IoMem::new() take that as an argument?
>
> That's correct, neither I
On Wed, 2025-09-03 at 11:18 +0100, Tvrtko Ursulin wrote:
> Now that the run queue to scheduler relationship is always 1:1 we can
> embed it (the run queue) directly in the scheduler struct and save on
> some allocation error handling code and such.
Looks reasonable to me.
What I suggest is to do
Il 23/09/25 13:39, Nicolas Frattaroli ha scritto:
The MT8196 SoC uses an embedded MCU to control frequencies and power of
the GPU. This controller is referred to as "GPUEB".
It communicates to the application processor, among other ways, through
a mailbox.
The mailbox exposes one interrupt, whi
Il 23/09/25 13:39, Nicolas Frattaroli ha scritto:
On the MT8196 and MT6991 SoCs, the GPU power and frequency is controlled
by some integration logic, referred to as "MFlexGraphics" by MediaTek,
which comes in the form of an embedded controller running
special-purpose firmware.
This controller ta
On Wed Sep 24, 2025 at 12:52 PM CEST, Greg KH wrote:
> Ok, great, but right now it's not doing that from what I am seeing when
> reading the code. Shouldn't IoMem::new() take that as an argument?
That's correct, neither IoMem nor pci::Bar do consider it yet; it's on the list
of things that still
Il 23/09/25 17:23, Johan Hovold ha scritto:
This series fixes various probe resource leaks in the mediatek drm
drivers that were found through inspection.
Johan
Whole series is
Reviewed-by: AngeloGioacchino Del Regno
During probe, this driver is registering two platform devices: one
for the HDMI Codec driver and one for the DisplayPort PHY driver.
In the probe function, none of the error cases are unregistering
any of the two platform devices and this may cause registration
of multiple instances of those in ca
On 19/09/2025 17:43, Adrián Larumbe wrote:
> Commit de8548813824 ("drm/panthor: Add the scheduler logical block")
> handled destruction of a group's queues' drm scheduler entities early
> into the group destruction procedure.
>
> However, that races with the group submit ioctl, because by the time
ср, 24 вер. 2025 р. о 07:47 Mikko Perttunen пише:
>
> On Tuesday, September 23, 2025 3:50 PM Svyatoslav Ryhel wrote:
> > вт, 23 вер. 2025 р. о 09:11 Svyatoslav Ryhel пише:
> > >
> > > вт, 23 вер. 2025 р. о 09:04 Mikko Perttunen пише:
> > > >
> > > > On Monday, September 22, 2025 4:36 PM Svyatosl
On Tue, Sep 23, 2025 at 01:32:23PM +0300, Laurent Pinchart wrote:
> On Tue, Sep 23, 2025 at 01:28:57PM +0300, Dmitry Baryshkov wrote:
> > On Tue, Sep 23, 2025 at 11:38:17AM +0200, Maxime Ripard wrote:
> > > On Mon, Sep 15, 2025 at 09:38:44PM +0300, Dmitry Baryshkov wrote:
> > > > On Mon, Sep 15, 20
When fixing up a device reference leak in the tve drivers I noticed it
had an unused platform alias. This series drops unused aliases from the
imx drm drivers.
Johan
Johan Hovold (4):
drm/imx/dw-hdmi: drop unused module alias
drm/imx/ldb: drop unused module alias
drm/imx/tve: drop unused m
onfig-r073-20250924
(https://download.01.org/0day-ci/archive/20250924/202509241654.qjk1h5kr-...@intel.com/config)
compiler: alpha-linux-gcc (GCC) 8.5.0
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20250924/202509241654.qjk1h5kr-...@intel.com/reproduce)
If you fix the
On 24.09.25 10:34, Ville Syrjälä wrote:
> On Mon, Sep 15, 2025 at 03:37:07PM +, Derek Foreman wrote:
>> On 9/15/25 5:01 AM, Michel Dänzer wrote:
>>> On 12.09.25 15:45, Derek Foreman wrote:
On 9/12/25 2:33 AM, Chuanyu Tseng wrote:
> Introduce a DRM interface for DRM clients to further r
LCD_CLASS_DEVICE is the user-controlled option that enables the LCD
display subsystem. Do not select it from fbdev drivers. Selecting it
from drivers can lead to cyclic dependencies within the config.
Some guidelines for using select can be found in the kernel docs at [1].
Signed-off-by: Thomas Z
On Mon, Sep 15, 2025 at 03:37:07PM +, Derek Foreman wrote:
> On 9/15/25 5:01 AM, Michel Dänzer wrote:
> > On 12.09.25 15:45, Derek Foreman wrote:
> >> On 9/12/25 2:33 AM, Chuanyu Tseng wrote:
> >>> Introduce a DRM interface for DRM clients to further restrict the
> >>> VRR Range within the pane
On 24.09.25 01:02, Matthew Brost wrote:
What Simona agreed on is exactly what I proposed as well, that you
get a private interface for exactly that use case.
>
> Do you have a link to the conversation with Simona? I'd lean towards a
> kernel-wide generic interface if possible.
Oh, findi
On Wed, 2025-09-03 at 11:18 +0100, Tvrtko Ursulin wrote:
> To implement fair scheduling we will need as accurate as possible view
> into per entity GPU time utilisation. Because sched fence execution time
> are only adjusted for accuracy in the free worker we need to process
> completed jobs as soo
add support for Yhgc BMC soc chipset
Signed-off-by: Chu Guangqing
---
MAINTAINERS | 5 +
drivers/gpu/drm/Kconfig | 2 +
drivers/gpu/drm/Makefile | 1 +
drivers/gpu/drm/yhgch/yhgch-drm/Kconfig | 11 +
driver
Sorry, Thomas. The changes have been made this time.
>Hi
>
>Am 10.09.25 um 04:23 schrieb Chu Guangqing:
>> +select DRM_VRAM_HELPER
>> +select DRM_TTM_HELPER
>
>I told you twice that VRAM helpers are obsolete and what to use instead.
>
It has been modified.
>> +
>> +struct yhgch_vdac {
>> +
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