[PATCHv4 5/7] drm/i915/histogram: Add crtc properties for global histogram

2024-09-25 Thread Arun R Murthy
ents on patch 1 Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/display/intel_atomic.c | 5 + drivers/gpu/drm/i915/display/intel_crtc.c | 169 +- drivers/gpu/drm/i915/display/intel_crtc.h | 5 + drivers/gpu/drm/i915/display/intel_display.c | 13 ++ .../drm/i915

[PATCHv4 0/7] Display Global Histogram

2024-09-25 Thread Arun R Murthy
am is also pushed for review at https://patchwork.freedesktop.org/series/135789/ Test-with: 20240705091333.328322-1-mohammed.thasl...@intel.com Arun R Murthy (7): drm/i915/histogram: Define registers for histogram drm/i915/histogram: Add support for histogram drm/xe: Add histogram support to

[PATCHv4 7/7] drm/i915/histogram: Histogram changes for Display 20+

2024-09-25 Thread Arun R Murthy
In Display 20+, new registers are added for setting index, reading histogram and writing the IET. v2: Removed duplicate code (Jani) v3: Moved histogram core changes to earlier patches (Jani/Suraj) v4: Rebased after addressing comments on patch 1 Signed-off-by: Arun R Murthy --- .../gpu/drm

[PATCH 6/7] drm/i915/histogram: histogram delay counter doesnt reset

2024-09-25 Thread Arun R Murthy
The delay counter for histogram does not reset and as a result the histogram bin never gets updated. Workaround would be to use save and restore histogram register. Wa: 14014889975 Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/display/intel_histogram.c | 17 + .../gpu

[PATCHv4 4/7] drm/i915/histogram: histogram interrupt handling

2024-09-25 Thread Arun R Murthy
ani) v3: Replaced drm_i915_private with intel_display (Suraj) Refactored the histogram read code (Jani) v4: Rebased after addressing comments on patch 1 Signed-off-by: Arun R Murthy --- .../gpu/drm/i915/display/intel_display_irq.c | 6 +- .../gpu/drm/i915/display/intel_histogram.c|

[PATCH 3/7] drm/xe: Add histogram support to Xe builds

2024-09-25 Thread Arun R Murthy
Histogram added as part of i915/display driver. Adding the same for xe as well. Signed-off-by: Arun R Murthy Reviewed-by: Suraj Kandpal --- drivers/gpu/drm/xe/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index

[PATCHv2 2/7] drm/i915/histogram: Add support for histogram

2024-09-25 Thread Arun R Murthy
) Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/Makefile | 1 + .../drm/i915/display/intel_display_types.h| 2 + .../gpu/drm/i915/display/intel_histogram.c| 187 ++ .../gpu/drm/i915/display/intel_histogram.h| 35 4 files changed, 225

[PATCH 1/7] drm/i915/histogram: Define registers for histogram

2024-09-25 Thread Arun R Murthy
Add the register/bit definitions for global histogram. Signed-off-by: Arun R Murthy --- .../drm/i915/display/intel_histogram_reg.h| 54 +++ 1 file changed, 54 insertions(+) create mode 100644 drivers/gpu/drm/i915/display/intel_histogram_reg.h diff --git a/drivers/gpu/drm

[PATCHv3 4/6] drm/i915/histogram: Add crtc properties for global histogram

2024-09-19 Thread Arun R Murthy
togram data. "Global IET" is a crtc property to write the IET binary LUT data. v2: Read the histogram blob data before sending uevent (Jani) v3: use drm_property_replace_blob_from_id (Vandita) Add substruct for histogram in intel_crtc_state (Jani) Signed-off-by: Arun R Murthy ---

[PATCH 0/6] Display Global Histogram

2024-09-19 Thread Arun R Murthy
am is also pushed for review at https://patchwork.freedesktop.org/series/135789/ Test-with: 20240705091333.328322-1-mohammed.thasl...@intel.com Arun R Murthy (6): drm/i915/histogram: Add support for histogram drm/xe: Add histogram support to Xe builds drm/i915/histogram: histogram interrupt hand

[PATCHv3 6/6] drm/i915/histogram: Histogram changes for Display 20+

2024-09-19 Thread Arun R Murthy
In Display 20+, new registers are added for setting index, reading histogram and writing the IET. v2: Removed duplicate code (Jani) v3: Moved histogram core changes to earlier patches (Jani/Suraj) Signed-off-by: Arun R Murthy --- .../gpu/drm/i915/display/intel_histogram.c| 111

[PATCHv3 5/6] drm/i915/histogram: histogram delay counter doesnt reset

2024-09-19 Thread Arun R Murthy
The delay counter for histogram does not reset and as a result the histogram bin never gets updated. Workaround would be to use save and restore histogram register. HSD: 14014889975 Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/display/intel_histogram.c | 17 + .../gpu

[PATCHv3 3/6] drm/i915/histogram: histogram interrupt handling

2024-09-19 Thread Arun R Murthy
ani) v3: Replaced drm_i915_private with intel_display (Suraj) Refactored the histogram read code (Jani) Signed-off-by: Arun R Murthy --- .../gpu/drm/i915/display/intel_display_irq.c | 6 +- .../gpu/drm/i915/display/intel_histogram.c| 93 +++ .../gpu/drm/i915/disp

[PATCHv3 2/6] drm/xe: Add histogram support to Xe builds

2024-09-19 Thread Arun R Murthy
Histogram added as part of i915/display driver. Adding the same for xe as well. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/xe/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index edfd812e0f41..2a5e3ed5ea17 100644

[PATCHv3 1/6] drm/i915/histogram: Add support for histogram

2024-09-19 Thread Arun R Murthy
enhancement factor can be multiplied/added with the incoming pixel data frame. v2: forward declaration in header file along with error handling (Jani) v3: Replaced i915 with intel_display (Suraj) Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/Makefile | 1 + .../drm/i915

[PATCH] RFC: drm/drm_plane: Expose the plane capability and interoperability

2024-07-09 Thread Arun R Murthy
might a challenge. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ include/drm/drm_plane.h | 8 include/uapi/drm/drm_mode.h | 20 3 files changed, 31 insertions(+) =Option 2 diff

[PATCHv2 1/2] drm/display/dp: Check for MSTM_CAP before MSTM_CTRL write

2024-01-31 Thread Arun R Murthy
be confused by a corresponding dpcd write. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/display/drm_dp_mst_topology.c | 38 +++ 1 file changed, 22 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display

[PATCHv2 2/2] drm/i915/display/dp: 128/132b DP-capable with SST

2024-01-31 Thread Arun R Murthy
With a value of '0' read from MSTM_CAP register MST to be enabled. DP2.1 SCR updates the spec for 128/132b DP capable supporting only one stream and not supporting single stream sideband MSG. The underlying protocol will be MST to enable use of MTP. Signed-off-by: Arun R Murthy --- d

[PATCH 2/2] drm/i915/display/dp: 128/132b DP-capable with SST

2024-01-26 Thread Arun R Murthy
With a value of '0' read from MSTM_CAP register MST to be enabled. DP2.1 SCR updates the spec for 128/132b DP capable supporting only one stream and not supporting single stream sideband MSG. The underlying protocol will be MST to enable use of MTP. Signed-off-by: Arun R Murthy --- d

[PATCH 1/2] drm/display/dp: Check for MSTM_CAP before MSTM_CTRL write

2024-01-26 Thread Arun R Murthy
be confused by a corresponding dpcd write. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/display/drm_dp_mst_topology.c | 26 +++ 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c b/drivers/gpu/drm/display

[PATCHv4 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-03-02 Thread Arun R Murthy
this write. Corrective actions on SDP corruption is yet to be defined. v2: Moved the CRC enable to link training init(Jani N) v3: Moved crc enable to ddi pre enable v4: Separate function for SDP CRC16 (Jani N) Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/display/intel_ddi.c | 4

[RESEND PATCHv2 1/2] drm: Add SDP Error Detection Configuration Register

2023-03-02 Thread Arun R Murthy
DP2.0 E11 defines a new register to facilitate SDP error detection by a 128B/132B capable DPRX device. v2: Update the macro name to reflect the DP spec(Harry) Signed-off-by: Arun R Murthy Reviewed-by: Harry Wentland --- include/drm/display/drm_dp.h | 3 +++ 1 file changed, 3 insertions

[PATCHv3 0/2] DP2.0 SDP CRC16 for 128/132b link layer

2023-03-02 Thread Arun R Murthy
*** BLURB HERE *** Arun R Murthy (2): drm: Add SDP Error Detection Configuration Register i915/display/dp: SDP CRC16 for 128b132b link layer .../gpu/drm/i915/display/intel_dp_link_training.c| 12 include/drm/display/drm_dp.h | 3 +++ 2 files changed

[RESEND PATCHv2 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-02-14 Thread Arun R Murthy
this write. Corrective actions on SDP corruption is yet to be defined. v2: Moved the CRC enable to link training init(Jani N) v3: Moved crc enable to ddi pre enable Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/display/intel_ddi.c | 12 1 file changed, 12 insertions(+) diff

[PATCHv2 1/2] drm: Add SDP Error Detection Configuration Register

2023-02-14 Thread Arun R Murthy
DP2.0 E11 defines a new register to facilitate SDP error detection by a 128B/132B capable DPRX device. v2: Update the macro name to reflect the DP spec(Harry) Signed-off-by: Arun R Murthy Reviewed-by: Harry Wentland --- include/drm/display/drm_dp.h | 3 +++ 1 file changed, 3 insertions

[PATCHv3 0/2] DP2.0 SDP CRC16 for 128/132b link layer

2023-02-14 Thread Arun R Murthy
*** BLURB HERE *** Arun R Murthy (2): drm: Add SDP Error Detection Configuration Register i915/display/dp: SDP CRC16 for 128b132b link layer .../gpu/drm/i915/display/intel_dp_link_training.c| 12 include/drm/display/drm_dp.h | 3 +++ 2 files changed

[PATCHv3 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-02-06 Thread Arun R Murthy
this write. Corrective actions on SDP corruption is yet to be defined. v2: Moved the CRC enable to link training init(Jani N) v3: Moved crc enable to ddi pre enable Signed-off-by: Arun R Murthy --- .../gpu/drm/i915/display/intel_dp_link_training.c| 12 1 file changed, 12

[PATCHv2 1/2] drm: Add SDP Error Detection Configuration Register

2023-02-06 Thread Arun R Murthy
DP2.0 E11 defines a new register to facilitate SDP error detection by a 128B/132B capable DPRX device. v2: Update the macro name to reflect the DP spec(Harry) Signed-off-by: Arun R Murthy Reviewed-by: Harry Wentland --- include/drm/display/drm_dp.h | 3 +++ 1 file changed, 3 insertions

[PATCHv3 0/2] DP2.0 SDP CRC16 for 128/132b link layer

2023-02-06 Thread Arun R Murthy
*** BLURB HERE *** Arun R Murthy (2): drm: Add SDP Error Detection Configuration Register i915/display/dp: SDP CRC16 for 128b132b link layer .../gpu/drm/i915/display/intel_dp_link_training.c| 12 include/drm/display/drm_dp.h | 3 +++ 2 files changed

[RESEND PATCHv2 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-01-19 Thread Arun R Murthy
this write. Corrective actions on SDP corruption is yet to be defined. v2: Moved the CRC enable to link training init(Jani N) Signed-off-by: Arun R Murthy --- .../gpu/drm/i915/display/intel_dp_link_training.c| 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915

[PATCHv2 0/2] DP2.0 SDP CRC16 for 128/132b link layer

2023-01-19 Thread Arun R Murthy
*** BLURB HERE *** Arun R Murthy (2): drm: Add SDP Error Detection Configuration Register i915/display/dp: SDP CRC16 for 128b132b link layer .../gpu/drm/i915/display/intel_dp_link_training.c| 12 include/drm/display/drm_dp.h | 3 +++ 2 files changed

[RESEND PATCHv2 1/2] drm: Add SDP Error Detection Configuration Register

2023-01-19 Thread Arun R Murthy
DP2.0 E11 defines a new register to facilitate SDP error detection by a 128B/132B capable DPRX device. v2: Update the macro name to reflect the DP spec(Harry) Signed-off-by: Arun R Murthy Reviewed-by: Harry Wentland --- include/drm/display/drm_dp.h | 3 +++ 1 file changed, 3 insertions

[RESEND PATCHv2 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-01-19 Thread Arun R Murthy
this write. Corrective actions on SDP corruption is yet to be defined. v2: Moved the CRC enable to link training init(Jani N) Signed-off-by: Arun R Murthy --- .../gpu/drm/i915/display/intel_dp_link_training.c| 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915

[PATCHv2 1/2] drm: Add SDP Error Detection Configuration Register

2023-01-19 Thread Arun R Murthy
DP2.0 E11 defines a new register to facilitate SDP error detection by a 128B/132B capable DPRX device. v2: Update the macro name to reflect the DP spec(Harry) Signed-off-by: Arun R Murthy Reviewed-by: Harry Wentland --- include/drm/display/drm_dp.h | 3 +++ 1 file changed, 3 insertions

[PATCHv2 1/2] drm: Add SDP Error Detection Configuration Register

2023-01-19 Thread Arun R Murthy
DP2.0 E11 defines a new register to facilitate SDP error detection by a 128B/132B capable DPRX device. v2: Update the macro name to reflect the DP spec(Harry) Signed-off-by: Arun R Murthy --- include/drm/display/drm_dp.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/drm

[PATCHv2 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-01-19 Thread Arun R Murthy
this write. Corrective actions on SDP corruption is yet to be defined. v2: Moved the CRC enable to link training init(Jani N) Signed-off-by: Arun R Murthy --- .../gpu/drm/i915/display/intel_dp_link_training.c| 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915

[PATCH 2/2] i915/display/dp: SDP CRC16 for 128b132b link layer

2023-01-12 Thread Arun R Murthy
. Corrective actions on SDP corruption is yet to be defined. Signed-off-by: Arun R Murthy --- drivers/gpu/drm/i915/display/intel_dp.c | 13 + drivers/gpu/drm/i915/i915_reg.h | 1 + 2 files changed, 14 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b

[PATCH 1/2] drm: Add SDP Error Detection Configuration Register

2023-01-12 Thread Arun R Murthy
DP2.0 E11 defines a new register to facilitate SDP error detection by a 128B/132B capable DPRX device. Signed-off-by: Arun R Murthy --- include/drm/display/drm_dp.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index