On Fri, 2023-12-08 at 22:47:03 UTC, "Matthew Wilcox (Oracle)" wrote:
> As far as anybody can tell, this product never shipped. If it did,
> it shipped in 2007 and nobody has access to one any more. Remove the
> mtd NOR driver.
>
> Signed-off-by: Matthew Wilcox (Oracle)
Applied to
Hi Pekka,
pekka.paala...@haloniitty.fi wrote on Fri, 2 Feb 2024 17:49:13 +0200:
> On Fri, 2 Feb 2024 13:13:22 +0100
> Miquel Raynal wrote:
>
> > Hello Maxime,
> >
> > + Arthur
> >
> > mrip...@kernel.org wrote on Fri, 2 Feb 2024 10:53:37 +0100:
> >
Hello Maxime,
+ Arthur
mrip...@kernel.org wrote on Fri, 2 Feb 2024 10:53:37 +0100:
> Hi Miquel,
>
> On Fri, Feb 02, 2024 at 10:26:01AM +0100, Miquel Raynal wrote:
> > pekka.paala...@haloniitty.fi wrote on Fri, 2 Feb 2024 10:55:22 +0200:
> >
> > > On T
Hi Pekka,
pekka.paala...@haloniitty.fi wrote on Fri, 2 Feb 2024 10:55:22 +0200:
> On Thu, 01 Feb 2024 18:31:32 +0100
> Louis Chauvet wrote:
>
> > Change the composition algorithm to iterate over pixels instead of lines.
> > It allows a simpler management of rotation and pixel access for
r RAM consuming subsystem)
> also matter, it may be relevant to apply this workaround in order to
> help them fetching from RAM more reliably.
>
> Signed-off-by: Miquel Raynal
> ---
>
> Hello,
>
> This really is an RFC as the bug was also observed on v6.5 but t
subsystem)
also matter, it may be relevant to apply this workaround in order to
help them fetching from RAM more reliably.
Signed-off-by: Miquel Raynal
---
Hello,
This really is an RFC as the bug was also observed on v6.5 but the fix
proposed here was written and tested on a v4.14 kernel. I want
Hi Boris,
s...@ravnborg.org wrote on Thu, 10 Aug 2023 19:31:25 +0200:
> > I queued it to drm-misc-next this morning.
Yeah, thanks a lot!
Cheers,
Miquèl
Hi Sam,
s...@ravnborg.org wrote on Mon, 7 Aug 2023 18:52:45 +0200:
> Hi Miquel,
>
> On Mon, Aug 07, 2023 at 11:12:46AM +0200, Miquel Raynal wrote:
> > Hi Sam,
> >
> > s...@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200:
> >
> > > On Fri
Add Mitsubishi AA084XE01 8.4" XGA TFT LCD panel compatible string.
Link: https://www.mouser.fr/datasheet/2/274/aa084xe01_e-364171.pdf
Signed-off-by: Miquel Raynal
Acked-by: Krzysztof Kozlowski
---
Changes in v4:
* Add datasheet link.
* Supplement Cc: list.
Changes in v3:
* None.
Ch
From: Thomas Weber
Add support for the Mitsubishi AA084XE01 panel which is an 8.4 inch XGA
TFT-LCD module for industrial use.
Link: https://www.mouser.fr/datasheet/2/274/aa084xe01_e-364171.pdf
Signed-off-by: Thomas Weber
Signed-off-by: Miquel Raynal
---
Changes in v4:
* None.
Changes in v3
Hi Sam,
s...@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200:
> On Fri, Jun 09, 2023 at 04:48:43PM +0200, Miquel Raynal wrote:
> > On the SoC host controller, the pixel clock can be:
> > * standard: data is launched on the rising edge
> > * inverted: data is launche
engineering. I also appended the series
> from Miquel Raynal adding EDT ET028013DMA panel support, so that I could
> easily test it with my SPI_NO_RX setup. They are slightly different due
> to rebasing.
Thanks a lot! I'll continue following the series and provide my help
when required.
Chee
Hi Sebastian,
+ Thomas
s...@kernel.org wrote on Sat, 22 Apr 2023 22:49:59 +0200:
> Hi,
>
> This adds panel support for Inanbo T28CP45TN89, which I found inside of a
> handheld thermal camera. The panel is based on the st7789v controller. All
> information is based on reverse engineering.
I
> Miquèl
>
> Changes in v3:
> * Fixed the dev->parent referencing in the host1x driver.
> * Collected Rob's Acked-by.
>
> Changes in v2:
> * Dropped all the of_device.h/of_module.h changes
> * Directly used of_device_uevent() from the host1x driver
>
>
> Mi
Hello,
s...@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200:
> On Fri, Jun 09, 2023 at 04:48:43PM +0200, Miquel Raynal wrote:
> > On the SoC host controller, the pixel clock can be:
> > * standard: data is launched on the rising edge
> > * inverted: data is launche
off-by: Miquel Raynal
---
drivers/gpu/host1x/bus.c | 29 ++---
1 file changed, 6 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus.c
index 4d16a3396c4a..84d042796d2e 100644
--- a/drivers/gpu/host1x/bus.c
+++ b/drivers/gpu/host1x/bu
sed of_device_uevent() from the host1x driver
Miquel Raynal (2):
of: module: Export of_device_uevent()
gpu: host1x: Stop open-coding of_device_uevent()
drivers/gpu/host1x/bus.c | 29 ++---
drivers/of/device.c | 1 +
2 files changed, 7 insertions(+), 23 deletions(-)
--
2.34.1
only useful in drivers/base, which is built-in anyway.
With the idea of getting rid of the hardcoded implementation of
of_device_uevent() in other places in the kernel, let's export it to GPL
modules (very much like its cousins in the same file).
Signed-off-by: Miquel Raynal
Acked-by: Rob Herring
Hi Rob,
r...@kernel.org wrote on Thu, 22 Jun 2023 08:31:40 -0600:
> On Fri, Jun 09, 2023 at 05:56:34PM +0200, Miquel Raynal wrote:
> > There is apparently no reasons to open-code of_device_uevent() besides:
> > - The helper receives a struct device while we want to use the of_no
Add Mitsubishi AA084XE01 8.4" XGA TFT LCD panel compatible string.
Signed-off-by: Miquel Raynal
Acked-by: Krzysztof Kozlowski
---
Changes in v3:
* None.
Changes in v2:
* Collected tag.
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 inser
From: Thomas Weber
Add support for the Mitsubishi AA084XE01 panel which is an 8.4 inch XGA
TFT-LCD module for industrial use.
Link: https://www.mouser.fr/datasheet/2/274/aa084xe01_e-364171.pdf
Signed-off-by: Thomas Weber
Signed-off-by: Miquel Raynal
---
Changes in v3:
* Fix connector type
1.pdf
> Signed-off-by: Thomas Weber
> Signed-off-by: Miquel Raynal
> ---
>
> Changes in v2:
> * Lowered the clock to match the typical 65MHz frequency.
> * Added the connector type and the missing bus flags.
> * Collected an A-by tag.
>
> drivers/gpu/drm/panel/panel
, in case
the DT description would be lacking the Rx bus width (which is likely on
old descriptions) in order to avoid breaking existing devices.
Signed-off-by: Miquel Raynal
Acked-by: Sam Ravnborg
Acked-by: Maxime Ripard
---
.../gpu/drm/panel/panel-sitronix-st7789v.c| 81
. Correct the
definition to ease the comparison with the datasheet.
Signed-off-by: Miquel Raynal
Acked-by: Maxime Ripard
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
b/drivers
of the following situation
occurs:
* Pixel clock is above 3MHz
* Pixel clock is not inverted
I could not properly identify the reasons behind these failures, scope
captures show valid input signals.
Signed-off-by: Miquel Raynal
Acked-by: Maxime Ripard
---
.../gpu/drm/panel/panel-sitronix-st7789v.c
The Sitronix controller expects 9-bit words, provide this as default at
probe time rather than specifying this in each and every access.
Signed-off-by: Miquel Raynal
Reviewed-by: Sam Ravnborg
Acked-by: Maxime Ripard
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 6 +-
1 file changed
The ST7789V LCD controller supports regular SPI wiring, as well as no Rx
data line at all. The operating system needs to know whether it can read
registers from the device or not. Let's detail this specific design
possibility by bounding the spi-rx-bus-width property.
Signed-off-by: Miquel Raynal
if there is no MISO line.
* Used dev_err_probe() when relevant.
* Sorted the IDs in the tables.
* Renamed the panel mode.
* Fixed typos.
Miquel Raynal (6):
dt-bindings: display: st7789v: Add the edt,et028013dma panel
compatible
dt-bindings: display: st7789v: bound the number of Rx data lines
drm/panel
The ST7789V LCD controller is also embedded in the ET028013DMA
panel. Add a compatible string to describe this other panel.
Signed-off-by: Miquel Raynal
Acked-by: Krzysztof Kozlowski
Acked-by: Maxime Ripard
---
.../devicetree/bindings/display/panel/sitronix,st7789v.yaml | 1 +
1 file
Hi Maxime,
max...@cerno.tech wrote on Mon, 19 Jun 2023 11:39:56 +0200:
> On Sun, Jun 18, 2023 at 07:37:32PM +0200, Miquel Raynal wrote:
> > Hello Maxime,
> >
> > max...@cerno.tech wrote on Sun, 18 Jun 2023 16:37:58 +0200:
> >
> > > Hi,
> > >
&
Add Mitsubishi AA084XE01 8.4" XGA TFT LCD panel compatible string.
Signed-off-by: Miquel Raynal
Acked-by: Krzysztof Kozlowski
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/di
From: Thomas Weber
Add support for the Mitsubishi AA084XE01 panel which is an 8.4 inch XGA
TFT-LCD module for industrial use.
Link: https://www.mouser.fr/datasheet/2/274/aa084xe01_e-364171.pdf
Signed-off-by: Thomas Weber
Signed-off-by: Miquel Raynal
---
Changes in v2:
* Lowered the clock
Hello Maxime,
max...@cerno.tech wrote on Sun, 18 Jun 2023 16:37:58 +0200:
> Hi,
>
> On Fri, Jun 16, 2023 at 06:32:51PM +0200, Miquel Raynal wrote:
> > The ST7789V LCD controller supports regular SPI wiring, as well as no Rx
> > data line at all. The operating system needs t
From: Thomas Weber
Add support for the Mitsubishi AA084XE01 panel which is an 8.4 inch XGA
TFT-LCD module for industrial use.
Link: https://www.mouser.fr/datasheet/2/274/aa084xe01_e-364171.pdf
Signed-off-by: Thomas Weber
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm/panel/panel-simple.c
Add Mitsubishi AA084XE01 8.4" XGA TFT LCD panel compatible string.
Signed-off-by: Miquel Raynal
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.ya
of the following situation
occurs:
* Pixel clock is above 3MHz
* Pixel clock is not inverted
I could not properly identify the reasons behind these failures, scope
captures show valid input signals.
Signed-off-by: Miquel Raynal
---
.../gpu/drm/panel/panel-sitronix-st7789v.c| 25
The Sitronix controller expects 9-bit words, provide this as default at
probe time rather than specifying this in each and every access.
Signed-off-by: Miquel Raynal
Reviewed-by: Sam Ravnborg
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 6 +-
1 file changed, 5 insertions(+), 1
. Correct the
definition to ease the comparison with the datasheet.
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
b/drivers/gpu/drm/panel/panel
The ST7789V LCD controller supports regular SPI wiring, as well as no Rx
data line at all. The operating system needs to know whether it can read
registers from the device or not. Let's detail this specific design
possibility by bounding the spi-rx-bus-width property.
Signed-off-by: Miquel Raynal
a read helper and use it to verify the communication with the panel
is working as soon as possible in order to fail early if this is not the
case.
As this panel may work with no MISO line, the check is discarded in this
case.
Signed-off-by: Miquel Raynal
Acked-by: Sam Ravnborg
---
.../gpu/drm
already added.
* Collected tags.
* Prevented the ID check to fail if there is no MISO line.
* Used dev_err_probe() when relevant.
* Sorted the IDs in the tables.
* Renamed the panel mode.
* Fixed typos.
Miquel Raynal (6):
dt-bindings: display: st7789v: Add the edt,et028013dma panel
compatible
The ST7789V LCD controller is also embedded in the ET028013DMA
panel. Add a compatible string to describe this other panel.
Signed-off-by: Miquel Raynal
---
.../devicetree/bindings/display/panel/sitronix,st7789v.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation
Hi Sebastian,
s...@kernel.org wrote on Thu, 15 Jun 2023 01:27:24 +0200:
> Hi,
>
> On Sat, Jun 10, 2023 at 10:45:25PM +0200, Sam Ravnborg wrote:
> > Hi Miquel,
> >
> > On Fri, Jun 09, 2023 at 04:59:51PM +0200, Miquel Raynal wrote:
> > > A very basic debug
Hi Maxime,
mrip...@kernel.org wrote on Mon, 12 Jun 2023 10:51:09 +0200:
> On Fri, Jun 09, 2023 at 04:59:50PM +0200, Miquel Raynal wrote:
> > This panel from Emerging Display Technologies Corporation features an
> > ST7789V2 panel inside which is almost identical to what the Sit
Hi Sam,
s...@ravnborg.org wrote on Sat, 10 Jun 2023 22:12:46 +0200:
> On Fri, Jun 09, 2023 at 04:59:47PM +0200, Miquel Raynal wrote:
> > The LCD controller supports RGB444, RGB565 and RGB888. The value that is
> > written in the COLMOD register indicates using RGB888, s
Hi liao,
jaimeliao...@gmail.com wrote on Wed, 14 Jun 2023 17:06:16 +0800:
> Hi Miquel
>
>
> >
> > Hello,
> >
> > avkras...@sberdevices.ru wrote on Tue, 23 May 2023 13:16:34 +0300:
> >
> > > This adds support for OTP area access on MX30LFxG18AC chip series.
> >
> > Jaime, any feedback on
Hi Michael,
michael.rie...@wolfvision.net wrote on Tue, 13 Jun 2023 08:15:26 +0200:
> Hi Miquel,
>
> On 6/9/23 16:59, Miquel Raynal wrote:
> > The spi core warns us about using an of_device_id table without a
>
> s/spi/SPI ?
Actually both are accepted in the kernel, II
Hello,
avkras...@sberdevices.ru wrote on Tue, 23 May 2023 13:16:34 +0300:
> This adds support for OTP area access on MX30LFxG18AC chip series.
Jaime, any feedback on this? Will you test it?
How are we supposed to test the OTP is locked? I see this is still an
open point.
>
> Signed-off-by:
only useful in drivers/base, which is built-in anyway.
With the idea of getting rid of the hardcoded implementation of
of_device_uevent() in other places in the kernel, let's export it to GPL
modules (very much like its cousins in the same file).
Signed-off-by: Miquel Raynal
---
drivers/of/device.c
off-by: Miquel Raynal
---
This patch depends on the changes performed earlier in the series under
the drivers/of/ folder.
---
drivers/gpu/host1x/bus.c | 29 ++---
1 file changed, 6 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus.c
in
they are, alone.
Link: https://lore.kernel.org/all/20230608184903.ga3200973-r...@kernel.org/
Thanks,
Miquèl
Changes in v2:
* Dropped all the of_device.h/of_module.h changes
* Directly used of_device_uevent() from the host1x driver
Miquel Raynal (2):
of: module: Export of_device_uevent()
gpu
On the SoC host controller, the pixel clock can be:
* standard: data is launched on the rising edge
* inverted: data is launched on the falling edge
Some panels may need the inverted option to be used so let's support
this DRM flag.
Signed-off-by: Miquel Raynal
---
Hello, this change
a read helper and use it to verify the communication with the panel
is working as soon as possible in order to fail early if this is not the
case.
Signed-off-by: Miquel Raynal
---
.../gpu/drm/panel/panel-sitronix-st7789v.c| 78 +++
1 file changed, 78 insertions(+)
diff --git
The Sitronix controller expects 9-bit words, provide this as default at
probe time rather than specifying this in each and every access.
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git
The LCD controller supports RGB444, RGB565 and RGB888. The value that is
written in the COLMOD register indicates using RGB888, so let's clearly
specify the in-use bus format.
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 4
1 file changed, 4 insertions
,st7789v" valid alone for backward compatibility,
but we should definitely provide two compatibles to fully describe such
panel, so let's expect to have both when describing a panel such as the
EDT ET028013DMA.
Signed-off-by: Miquel Raynal
---
.../bindings/display/panel/sitronix,st7789
situation
occurs:
* Pixel clock is above 3MHz
* Pixel clock is not inverted
I could not properly identify the reasons behind these failures, scope
captures show valid input signals.
Signed-off-by: Miquel Raynal
---
.../gpu/drm/panel/panel-sitronix-st7789v.c| 34 +--
1 file changed
The spi core warns us about using an of_device_id table without a
spi_device_id table aside for module utilities in orter to not rely on
OF modaliases. Just add this table using the device name without the
vendor prefix (as it is usually done).
Signed-off-by: Miquel Raynal
---
drivers/gpu/drm
as platform data.
There is no functional change.
Signed-off-by: Miquel Raynal
---
.../gpu/drm/panel/panel-sitronix-st7789v.c| 30 +++
1 file changed, 24 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
b/drivers/gpu/drm/panel/panel
patch
actually adds a read helper and uses it to perform a sanity check at
probe time by verifying the Sitronix controller IDs. If deemed
irrelevant, this patch may be discarded.
Thanks,
Miquèl
Miquel Raynal (7):
drm/panel: sitronix-st7789v: Prevent core spi warnings
drm/panel: sitronix-st7789v
Hi Arseniy,
avkras...@sberdevices.ru wrote on Mon, 15 May 2023 12:49:50 +0300:
> Hello @Miquel!
>
> Sorry, but who could review this patch? :) IIUC this logic is very hw
> specific and we need
> someone who knows it well? I tested this patch on our devices (with already
> known Meson NAND
>
off-by: Miquel Raynal
---
This patch depends on the changes performed earlier in the series under
the drivers/of/ folder.
---
drivers/gpu/host1x/bus.c | 31 ++-
1 file changed, 6 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bu
of int.
Signed-off-by: Miquel Raynal
---
drivers/of/device.c | 25 -
drivers/of/module.c | 19 +++
include/linux/of.h| 8
include/linux/of_device.h | 13 ++---
4 files changed, 37 insertions(+), 28 deletions(-)
diff
Let's move the logic of the former helper into module.c and use it from
an inline helper located under of_device.c. This way there is no change
for users while the logic gets moved to an OF-only file.
Signed-off-by: Miquel Raynal
---
drivers/of/device.c | 23
idea: here they are.
Link:
https://lore.kernel.org/lkml/20230307165359.225361-1-miquel.ray...@bootlin.com/
The last step of this series is to actually remove a copy of one of
these helpers which I think is not needed. This drivers/gpu/ patch
depends on the previous changes.
Thanks, Miquèl
Miquel
in drivers/base, which is built-in anyway.
With the idea of getting rid of the hardcoded implementation of
of_uevent() in other places in the kernel, let's export it to GPL
modules (very much like its cousins in the same file).
Signed-off-by: Miquel Raynal
---
drivers/of/module.c | 1 +
1 file changed
Move the OF related logic inside of/module.c and use it from of_device.h
with an inline helper so there is no visible change from the users point
of view.
Signed-off-by: Miquel Raynal
---
drivers/of/device.c | 42 ---
drivers/of/module.c | 41
bit.
+ * That single bit affects all sub-clocks, and therefore needs to change the
+ * active gate (and turn the others off) and force a recalculation of the
rates.
I don't know how much of this file has been upstreamed (under a
different form) but this might very well be related to the fa
On Mon, 2022-09-05 at 06:30:55 UTC, Dmitry Torokhov wrote:
> I would like to stop exporting OF-specific devm_gpiod_get_from_of_node()
> so that gpiolib can be cleaned a bit, so let's switch to the generic
> fwnode property API.
>
> Signed-off-by: Dmitry Torokhov
Applied to
5l.c | 4 +---
For MTD devices:
Acked-by: Miquel Raynal
Thanks,
Miquèl
untime PM
> and OPP support to the NAND driver.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/mtd/nand/raw/tegra_nand.c | 62 +++
> 1 file changed, 54 insertions(+), 8 deletions(-)
>
Acked-by: Miquel Raynal
Thanks,
Miquèl
/hisi-sfc.c:328: warning: Function parameter
> or member 'host' not described in 'hisi_spi_nor_register'
>
> Cc: Tudor Ambarus
> Cc: Miquel Raynal
> Cc: Richard Weinberger
> Cc: Vignesh Raghavendra
> Cc: Sumit Semwal
> Cc: "Christian König"
> Cc: linux-...@l
Hi Lee,
Lee Jones wrote on Fri, 6 Nov 2020 21:36:32
+:
> This set is part of a larger effort attempting to clean-up W=1
> kernel builds, which are currently overwhelmingly riddled with
> niggly little warnings.
>
> v1 => v2:
> - Added tags
> - Satisfied Miquel's review comments
>
rn ret;
>
> - phy_set_mode(lvds->dphy, PHY_MODE_LVDS);
> + ret = phy_set_mode(lvds->dphy, PHY_MODE_LVDS);
> if (ret)
> return ret;
>
I thought I (or Heiko) already sent a patch for that but apparently
not...
Reviewed-by: Mi
t = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
> .connector_type = DRM_MODE_CONNECTOR_LVDS,
> };
>
Reviewed-by: Miquel Raynal
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
Hi Laurent,
[...]
> >
> > +static const struct display_timing satoz_sat050at40h12r2_timing = {
> > + .pixelclock = {3330, 3330, 5000},
> > + .hactive = {800, 800, 800},
> > + .hfront_porch = {16, 210, 354},
> > + .hback_porch = {46, 46, 46},
> > + .hsync_len = {1, 1, 40},
On Tue, 2020-05-12 at 07:57:32 UTC,
=?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= wrote:
> First 2 bytes are used in large-page nand.
>
> Fixes: ef5eeea6e911 ("mtd: nand: brcm: switch to mtd_ooblayout_ops")
> Cc: sta...@vger.kernel.org
> Signed-off-by: Álvaro Fernández Rojas
Applied to
Álvaro Fernández Rojas wrote on Sun, 24 May 2020
21:13:41 +:
> Thanks for merging the patches :).
>
> BTW, is there something wrong with patch 5?
> I can see patches 1-4 applied in
> https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git/log/?h=nand/next,
> but I can’t see patch
On Fri, 2020-05-22 at 12:15:20 UTC,
=?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= wrote:
> These registers are also used on v3.3.
>
> Signed-off-by: Álvaro Fernández Rojas
> Reviewed-by: Miquel Raynal
> Acked-by: Florian Fainelli
Applied to https://git.kernel.org/pub/scm/linux
On Fri, 2020-05-22 at 12:15:22 UTC,
=?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= wrote:
> Current pages sizes apply to controllers after v3.4
>
> Signed-off-by: Álvaro Fernández Rojas
> Acked-by: Florian Fainelli
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
On Tue, 2020-05-12 at 08:24:51 UTC,
=?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= wrote:
> The current code checks that the whole OOB area is erased.
> This is a problem when JFFS2 cleanmarkers are added to the OOB, since it will
> fail due to the usable OOB bytes not being 0xff.
> Correct this by
On Fri, 2020-05-22 at 12:15:24 UTC,
=?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= wrote:
> v2.1: tested on Netgear DGND3700v1 (BCM6368)
> v2.2: tested on Netgear DGND3700v2 (BCM6362)
>
> Signed-off-by: Álvaro Fernández Rojas
> Acked-by: Florian Fainelli
Applied to
On Tue, 2020-05-12 at 07:57:33 UTC,
=?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= wrote:
> The current code generates 8 oob sections:
> S11-5
> ECC 6-8
> S29-15
> S316-21
> ECC 22-24
> S425-31
> S532-37
> ECC 38-40
> S641-47
> S748-53
> ECC 54-56
> S857-63
>
On Fri, 2020-05-22 at 12:15:21 UTC,
=?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= wrote:
> Only v3.3-v5.0 have a different CS0 layout.
> Controllers before v3.3 use the same layout for every CS.
>
> Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB
> NAND controller")
>
On Fri, 2020-05-22 at 12:15:23 UTC,
=?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= wrote:
> Added brcm,brcmnand-v2.1 and brcm,brcmnand-v2.2 as possible compatible
> strings to support brcmnand controllers v2.1 and v2.2.
>
> Signed-off-by: Álvaro Fernández Rojas
> Acked-by: Florian Fainelli
Miquel Raynal wrote on Sun, 24 May 2020
21:25:50 +0200:
> On Fri, 2020-05-22 at 12:15:23 UTC,
> =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= wrote:
> > Added brcm,brcmnand-v2.1 and brcm,brcmnand-v2.2 as possible compatible
> > strings to support brcmnand control
Hi Álvaro,
Álvaro Fernández Rojas wrote on Fri, 22 May 2020
09:25:25 +0200:
> v2.1: tested on Netgear DGND3700v1 (BCM6368)
> v2.2: tested on Netgear DGND3700v2 (BCM6362)
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v3: fix page size shift for v2.1 controllers.
You changed the subject
Hi Álvaro,
Álvaro Fernández Rojas wrote on Tue, 12 May 2020
09:24:32 +0200:
> Hi Miquèl
>
> > El 12 may 2020, a las 9:16, Miquel Raynal
> > escribió:
> >
> > Hi Álvaro,
> >
> > Álvaro Fernández Rojas wrote on Tue, 12 May 2020
> > 08:
Hi Álvaro,
Álvaro Fernández Rojas wrote on Tue, 12 May 2020
09:12:10 +0200:
> Hi Miquel,
>
> I also had a hard time understanding your email.
> It was quite misleading.
>
> > El 12 may 2020, a las 9:08, Miquel Raynal
> > escribió:
> >
> > Hi Álvaro,
Hi Álvaro,
Álvaro Fernández Rojas wrote on Tue, 12 May 2020
08:51:11 +0200:
> The current code checks that the whole OOB area is erased.
> This is a problem when JFFS2 cleanmarkers are added to the OOB, since it will
> fail due to the usable OOB bytes not being 0xff.
> Correct this by only
Hi Álvaro,
Álvaro Fernández Rojas wrote on Tue, 12 May 2020
09:26:23 +0200:
> Hi Miquèl,
>
> > El 12 may 2020, a las 9:19, Miquel Raynal
> > escribió:
> >
> > Hi Álvaro,
> >
> > Álvaro Fernández Rojas wrote on Tue, 12 May 2020
> > 09:12:10
Hi Álvaro,
Álvaro Fernández Rojas wrote on Tue, 12 May 2020
08:00:23 +0200:
> The current code generates 8 oob sections:
> S11-5
> ECC 6-8
> S29-15
> S316-21
> ECC 22-24
> S425-31
> S532-37
> ECC 38-40
> S641-47
> S748-53
> ECC 54-56
> S857-63
>
> Change
On Wed, 2020-01-22 at 21:33:13 UTC, Kamal Dasu wrote:
> Legacy mips soc platforms that have controller v5.0 and 6.0 use
> flash-edu block for dma transfers. This change adds support for
> nand dma transfers using the EDU block.
>
> Signed-off-by: Kamal Dasu
Applied to
On Wed, 2020-01-22 at 21:33:11 UTC, Kamal Dasu wrote:
> Adding support for EBI DMA unit (EDU).
>
> Signed-off-by: Kamal Dasu
> Reviewed-by: Rob Herring
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git
nand/next, thanks.
Miquel
Ulf Hansson wrote on Wed, 11 Mar 2020 15:20:59
+0100:
> On Wed, 11 Mar 2020 at 08:40, Miquel Raynal wrote:
> >
> > Hi Joe,
> >
> > Joe Perches wrote on Tue, 10 Mar 2020 21:51:27 -0700:
> >
> > > Convert the various uses of fallthrough comments t
On Wed, 2020-01-22 at 21:33:12 UTC, Kamal Dasu wrote:
> Nand controller v5.0 and v6.0 have nand edu blocks that enable
> dma nand flash transfers. This allows for faster read and write
> access.
>
> Signed-off-by: Kamal Dasu
> Acked-by: Paul Burton
> Reviewed-by: Florian Fainelli
Applied to
Hi Joe,
Joe Perches wrote on Tue, 10 Mar 2020 21:51:27 -0700:
> Convert the various uses of fallthrough comments to fallthrough;
>
> Done via script
> Link:
> https://lore.kernel.org/lkml/b56602fcf79f849e733e7b521bb0e17895d390fa.1582230379.git.joe.com/
>
> Signed-off-by: Joe Perches
> ---
>
dpoint_is_subdriver(endpoint) > 0)
> + /* if subdriver (> 0) or error case (< 0), ignore entry */
> + if (rockchip_drm_endpoint_is_subdriver(endpoint) != 0)
> continue;
>
> child_count++;
Reviewed-by: Miquel Raynal
Th
Heiko Stübner wrote on Mon, 02 Mar 2020 17:29:02
+0100:
> Am Montag, 2. März 2020, 16:58:07 CET schrieb Miquel Raynal:
> > Rockchip PX30 SoCs feature a Bifrost Mali GPU.
> >
> > Signed-off-by: Miquel Raynal
> > ---
> > Documentation/devicetree/bindi
Rockchip PX30 SoCs feature a Bifrost Mali GPU.
Signed-off-by: Miquel Raynal
---
Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
b/Documentation/devicetree/bindings/gpu
1 - 100 of 157 matches
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