can be
> accomodated.
>
> Signed-off-by: Thierry Reding
> ---
> .../nvidia,tegra-video-protection-region.yaml | 55 +++
> 1 file changed, 55 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/reserved-memory/nvidia,tegra-video-protection-region.yaml
>
Reviewed-by: Rob Herring (Arm)
On Wed, 03 Sep 2025 05:38:24 -0700, syyang wrote:
> - New device tree binding documentation at
> Documentation/devicetree/bindings/display/bridge/lontium,lt9611c.yaml
>
> Signed-off-by: syyang
> ---
> .../display/bridge/lontium,lt9611c.yaml | 123 ++
> 1 file changed, 1
On Sat, Aug 30, 2025 at 09:16:20AM +0200, Janne Grunau wrote:
> On Fri, Aug 29, 2025 at 02:51:19PM -0500, Rob Herring wrote:
> > On Thu, Aug 28, 2025 at 04:01:19PM +0200, Janne Grunau wrote:
> > > This series adds device trees for Apple's M2 Pro, Max and Ultra based
&g
On Sat, 30 Aug 2025 13:32:39 +0200, Krzysztof Kozlowski wrote:
> Samsung S3C24xx family of SoCs was removed from Linux kernel in the
> commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January
> 2023. There are no in-kernel users of remaining S3C24xx compatibles.
>
> Signed-off-b
Convert the ASpeed GFX Display Controller binding to DT schema format.
There was a duplicate, incomplete binding in mfd which can be dropped.
Signed-off-by: Rob Herring (Arm)
---
.../bindings/gpu/aspeed,ast2400-gfx.yaml | 58 +++
.../devicetree/bindings/gpu/aspeed-gfx.txt
On Thu, Aug 28, 2025 at 04:01:19PM +0200, Janne Grunau wrote:
> This series adds device trees for Apple's M2 Pro, Max and Ultra based
> devices. The M2 Pro (t6020), M2 Max (t6021) and M2 Ultra (t6022) SoCs
> follow design of the t600x family so copy the structure of SoC *.dtsi
> files.
>
> t6020 i
On Thu, Aug 28, 2025 at 12:01:18PM +0800, Pet Weng wrote:
> This chip receives MIPI DSI input and outputs HDMI, and is commonly
> connected to SoCs via I2C and DSI.
>
> Signed-off-by: Pet Weng
> ---
> .../bindings/display/bridge/ite,it61620.yaml | 143
> +
> 1 file cha
On Wed, 27 Aug 2025 16:55:39 +0530, Harikrishna Shenoy wrote:
> Extend the DSI controller schema to allow bridge child nodes.
> This makes it possible to describe external bridge devices directly
> connected as DSI peripherals.
>
> Signed-off-by: Harikrishna Shenoy
> ---
> Changelog v1 --> v2:
On Thu, 28 Aug 2025 16:06:58 +0800, Paul Chen wrote:
> From: Paul-pl Chen
>
> Add mediatek,exdma.yaml to support EXDMA for MT8196.
> The MediaTek display overlap extended DMA engine, namely
> OVL_EXDMA or EXDMA, primarily functions as a DMA engine
> for reading data from DRAM with various DRAM
On Wed, 27 Aug 2025 04:47:16 +, Kisung Lee wrote:
> This patch series adds device tree bindings and driver support
> for the ExynosAuto scaler hardware. It adds YAML binding docs,
> updates Kconfig and Makefile, and provides initial driver
> code to register the Scaler device as a V4L2 video
On Fri, Aug 22, 2025 at 11:53:52PM +0530, Harikrishna Shenoy wrote:
> This patch extends the binding schema by adding a new `bridge@[0-3]` to
Use imperative mood. See submitting-patches.rst.
> represent any bridge devices attached as DSI peripheral.
>
> Signed-off-by: Harikrishna Shenoy
> ---
>
-by: Steffen Trumtrar
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring (Arm)
ml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring (Arm)
On Thu, 21 Aug 2025 09:55:29 +0200, Steffen Trumtrar wrote:
> Add the JuTouch Technology Co. 10" JT101TM023 LVDS panel.
>
> Signed-off-by: Steffen Trumtrar
> ---
> Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
> 1 file changed, 2 insertio
ema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MELFAS MIP4 Touchscreen
> +
> +maintainers:
> + - Ariel D'Alessandro
> +
> +properties:
> + compatible:
> +const: "melfas,mip4_ts"
Drop quotes. With that,
Reviewed-by: Rob Herring (Arm)
: Ariel D'Alessandro
> ---
> .../bindings/soc/mediatek/mediatek,pwrap.yaml | 15 +++
> 1 file changed, 15 insertions(+)
>
Acked-by: Rob Herring (Arm)
On Wed, Aug 20, 2025 at 02:12:53PM -0300, Ariel D'Alessandro wrote:
> Convert the existing text-based DT bindings for Mediatek MT8173 RT5650
> codecs to a YAML schema.
>
> Signed-off-by: Ariel D'Alessandro
> ---
> .../sound/mediatek,mt8173-rt5650.yaml | 73 +++
> .../bind
icetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml| 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring (Arm)
On Wed, 20 Aug 2025 16:17:38 +0200, Krzysztof Kozlowski wrote:
> The binding allows in top-level from one to four clocks and each variant
> narrows the choice, but rockchip,rk3288-mipi-dsi missed the minItems.
>
> Reviewed-by: Heiko Stuebner
> Signed-off-by: Krzysztof Kozlowski
>
> ---
>
> C
On Wed, 20 Aug 2025 16:17:37 +0200, Krzysztof Kozlowski wrote:
> Device can be used over I2C bus, so it documents 'reg' property, however
> it misses to constrain it to actual I2C address.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> Documentation/devicetree/bindings/display/bridge/ti,tdp158
On Wed, 20 Aug 2025 16:17:36 +0200, Krzysztof Kozlowski wrote:
> The binding references synopsys,dw-hdmi.yaml schema which defines both
> 'clocks' and 'clock-names' with variable length, therefore we need here
> also same constraint for 'clock-names' as for 'clocks'.
>
> Signed-off-by: Krzysztof
On Wed, Aug 20, 2025 at 05:34:44PM +0800, Xiangxu Yin wrote:
> Add device tree binding documentation for the Qualcomm QMP USB3+DP PHY
> on QCS615 Platform. This PHY supports both USB3 and DP functionality
> over USB-C, with PHY mode switching capability. It does not support
> combo mode.
>
> Signe
On Wed, Aug 20, 2025 at 08:39:36AM +0300, Svyatoslav Ryhel wrote:
> вт, 19 серп. 2025 р. о 23:30 Rob Herring пише:
> >
> > On Tue, Aug 19, 2025 at 03:16:29PM +0300, Svyatoslav Ryhel wrote:
> > > Document CSI hw block found in Tegra20 and Tegra30 SoC.
> > >
>
On Tue, Aug 19, 2025 at 03:16:14PM +0300, Svyatoslav Ryhel wrote:
> Tegra30 has CSI PAD clock enable bits embedded into PLLD/PLLD2 registers.
> Add ids for these clocks.
>
> Signed-off-by: Svyatoslav Ryhel
> ---
> include/dt-bindings/clock/tegra30-car.h | 4 +++-
> 1 file changed, 3 insertions(+
On Thu, 21 Aug 2025 09:55:27 +0200, Steffen Trumtrar wrote:
> Add a new board variant for the Skov i.MX8MP based family of boards.
>
> This variant uses a different 10" panel than the existing ones.
>
> Signed-off-by: Steffen Trumtrar
> ---
> Steffen Trumtrar (5):
> dt-bindings: vendor-p
On Wed, Aug 20, 2025 at 12:15 PM Ariel D'Alessandro
wrote:
>
> Convert the existing text-based DT bindings for Marvell 8897/8997
> (sd8897/sd8997) bluetooth devices controller to a YAML schema.
>
> While here, bindings for "usb1286,204e" (USB interface) are dropped from
> the YAML definition as th
On Wed, 20 Aug 2025 14:12:52 -0300, Ariel D'Alessandro wrote:
> Convert the existing text-based DT bindings for Marvell 8897/8997
> (sd8897/sd8997) bluetooth devices controller to a YAML schema.
>
> While here, bindings for "usb1286,204e" (USB interface) are dropped from
> the YAML definition as
On Tue, Aug 19, 2025 at 11:22:42AM +0530, Kumar, Udit wrote:
>
> On 8/19/2025 10:46 AM, Raghavendra, Vignesh wrote:
> >
> > On 8/19/2025 10:24 AM, Kumar, Udit wrote:
> > > On 8/18/2025 9:17 PM, Harikrishna Shenoy wrote:
> > > > Add RPi DSI panel[0] as a valid compatible for simple-panel.
> > > >
75p-mdss.yaml| 20 +--
> .../bindings/display/msm/qcom,sar2130p-mdss.yaml | 10 ++--
> .../bindings/display/msm/qcom,sm8750-mdss.yaml | 10 ++--
> .../bindings/display/msm/qcom,x1e80100-mdss.yaml | 10 ++--
> 5 files changed, 99 insertions(+), 14 deletions(-)
>
Reviewed-by: Rob Herring (Arm)
On Wed, 20 Aug 2025 14:12:48 -0300, Ariel D'Alessandro wrote:
> This patch series continues the effort to address Device Tree validation
> warnings for MediaTek platforms, with a focus on MT8173. It follows the
> initial
> cleanup series by Angelo
> (https://www.spinics.net/lists/kernel/msg5780
On Wed, Aug 20, 2025 at 02:13:02PM -0300, Ariel D'Alessandro wrote:
> Commit 14176e94bb35d ("arm64: dts: mediatek: mt8195: Fix ranges for jpeg
That commit is not in any upstream tree.
> enc/decoder nodes") redefined jpeg encoder/decoder children node ranges.
> Update the related device tree bindi
On Tue, Aug 19, 2025 at 08:26:43PM +0530, Kaustabh Chakraborty wrote:
> Synaptics' Touch and Display Driver Integration (TDDI) technology [1]
> employs a single chip for both touchscreen and display capabilities.
> Such designs reportedly help reducing costs and power consumption.
>
> Although the
On Tue, Aug 19, 2025 at 03:16:29PM +0300, Svyatoslav Ryhel wrote:
> Document CSI hw block found in Tegra20 and Tegra30 SoC.
>
> Signed-off-by: Svyatoslav Ryhel
> ---
> .../display/tegra/nvidia,tegra210-csi.yaml| 78 +++
> 1 file changed, 63 insertions(+), 15 deletions(-)
>
>
On Tue, Aug 19, 2025 at 03:16:16PM +0300, Svyatoslav Ryhel wrote:
> Parallel VI interface found in Tegra30 is exactly the same as Tegra20 has.
That's not what the compatible schema says. 'exactly the same' implies a
fallback to whatever it is exactly the same as.
>
> Signed-off-by: Svyatoslav R
On Tue, Aug 19, 2025 at 12:58:59PM +0200, Maud Spierings wrote:
> The Maxim MAX25014 is a 4-channel automotive grade backlight driver IC
> with intgrated boost controller.
>
> Signed-off-by: Maud Spierings
> ---
> .../bindings/leds/backlight/maxim,max25014.yaml| 79
> ++
to the list of compatible string.
>
> Signed-off-by: Raphael Gallais-Pou
> ---
> .../devicetree/bindings/display/st,stm32-ltdc.yaml | 30
> --
> 1 file changed, 28 insertions(+), 2 deletions(-)
>
Reviewed-by: Rob Herring (Arm)
On Tue, Aug 19, 2025 at 03:17:46PM +0200, Raphael Gallais-Pou wrote:
>
>
> On 8/19/25 13:01, Rob Herring (Arm) wrote:
> > On Tue, 19 Aug 2025 11:15:54 +0200, Raphael Gallais-Pou wrote:
> >> The new STMicroelectronics SoC features a display controller similar to
> >&
On Tue, 19 Aug 2025 12:58:59 +0200, Maud Spierings wrote:
> The Maxim MAX25014 is a 4-channel automotive grade backlight driver IC
> with intgrated boost controller.
>
> Signed-off-by: Maud Spierings
> ---
> .../bindings/leds/backlight/maxim,max25014.yaml| 79
> ++
> M
rs to reach the peripheral and gate the
> clock accordingly.
>
> Reviewed-by: Rob Herring (Arm)
> Signed-off-by: Raphael Gallais-Pou
> ---
> .../bindings/arm/stm32/st,stm32-syscon.yaml| 31
> +++---
> 1 file changed, 21 insertions(+), 10 deletions(-
. It allows an accurate representation of the hardware, where
> the peripheral is connected to a firewall bus. The firewall can then
> check the peripheral accesses before allowing its device to probe.
>
> Acked-by: Rob Herring (Arm)
> Signed-off-by: Raphael Gallais-Pou
> ---
>
On Tue, 19 Aug 2025 11:15:58 +0200, Raphael Gallais-Pou wrote:
> STM32 LVDS peripheral may be in a power domain. Allow an optional
> single 'power-domains' entry for STM32 LVDS devices.
>
> Acked-by: Rob Herring (Arm)
> Signed-off-by: Raphael Gallais-Pou
> ---
On Tue, 19 Aug 2025 11:15:56 +0200, Raphael Gallais-Pou wrote:
> Update the compatible to accept both "st,stm32mp255-lvds" and
> st,stm32mp25-lvds" respectively. Default will fall back to
> "st,stm32mp25-lvds".
>
> Acked-by: Krzysztof Kozlowski
> Signed-off-by: Raphael Gallais-Pou
> ---
> Do
On Tue, 19 Aug 2025 11:15:54 +0200, Raphael Gallais-Pou wrote:
> The new STMicroelectronics SoC features a display controller similar to
> the one used in previous SoCs. Because there is additional registers,
> it is incompatible with existing IPs.
>
> Add the new name to the list of compatible
. It allows an accurate representation of the hardware, where
> the peripheral is connected to a firewall bus. The firewall can then check
> the peripheral accesses before allowing its device to probe.
>
> Acked-by: Rob Herring (Arm)
> Signed-off-by: Raphael Gallais-Pou
> ---
>
On Tue, 19 Aug 2025 07:31:14 +0200, Mike Looijmans wrote:
> Add DT binding document for TI TMDS181 and SN65DP159 HDMI retimers.
>
> Signed-off-by: Mike Looijmans
>
> ---
>
> Changes in v2:
> Document driver specific bindings like slew-rate and threshold
>
> .../bindings/display/bridge/ti,tm
> are affected.
>
> Fixes: 385c8ac763b3 ("dt-bindings: display/msm: convert MDP5 schema to YAML
> format")
> Signed-off-by: Dmitry Baryshkov
> ---
> Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml | 1 -
> 1 file changed, 1 deletion(-)
>
Acked-by: Rob Herring (Arm)
On Sat, Aug 09, 2025 at 12:16:19PM +0300, Dmitry Baryshkov wrote:
> From: Abhinav Kumar
>
> On a vast majority of Qualcomm chipsets DisplayPort controller can
> support several MST streams (up to 4x). To support MST these chipsets
> use up to 4 stream pixel clocks for the DisplayPort controller.
d-by: Krzysztof Kozlowski
> Signed-off-by: Abhinav Kumar
> Signed-off-by: Jessica Zhang
> Signed-off-by: Dmitry Baryshkov
> ---
> .../devicetree/bindings/display/msm/dp-controller.yaml | 10
> ----------
> 1 file changed, 10 deletions(-)
>
Acked-by: Rob Herring (Arm)
; Signed-off-by: Jessica Zhang
> Signed-off-by: Dmitry Baryshkov
> ---
> Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
Acked-by: Rob Herring (Arm)
On Fri, Aug 15, 2025 at 12:40:42AM +0800, Icenowy Zheng wrote:
> Verisilicon has a series of display controllers prefixed with DC and
> with self-identification facility like their GC series GPUs.
>
> Add a device tree binding for it.
>
> Depends on the specific DC model, it can have either one o
On Fri, 15 Aug 2025 00:40:44 +0800, Icenowy Zheng wrote:
> T-Head TH1520 SoC contains a Synopsys DesignWare HDMI controller paired
> with DesignWare HDMI PHY, with an extra clock gate for HDMI pixel clock
> and two reset controls.
>
> Add a device tree binding to it.
>
> Signed-off-by: Icenowy
On Fri, 15 Aug 2025 00:40:42 +0800, Icenowy Zheng wrote:
> Verisilicon has a series of display controllers prefixed with DC and
> with self-identification facility like their GC series GPUs.
>
> Add a device tree binding for it.
>
> Depends on the specific DC model, it can have either one or tw
On Thu, Aug 14, 2025 at 11:51:44AM +0100, Daniel Stone wrote:
> Hi Rob,
Thanks for the review.
>
> On Tue, 12 Aug 2025 at 13:53, Daniel Stone wrote:
> > On Mon, 11 Aug 2025 at 22:05, Rob Herring (Arm) wrote:
> > > +static int ethos_ioctl_submit_job(struct
On Thu, Aug 14, 2025 at 02:36:47PM +0200, Raphael Gallais-Pou wrote:
>
>
> On 8/14/25 11:09, Krzysztof Kozlowski wrote:
> > On Tue, Aug 12, 2025 at 03:49:00PM +0200, Raphael Gallais-Pou wrote:
> >> Update the compatible to accept both "st,stm32mp255-lvds" and
> >> st,stm32mp25-lvds" respectively.
On Tue, Aug 12, 2025 at 6:01 AM Thomas Zimmermann wrote:
>
> Hi
>
> Am 11.08.25 um 23:05 schrieb Rob Herring (Arm):
> > Add a driver for Arm Ethos-U65/U85 NPUs. The Ethos-U NPU has a
> > relatively simple interface with single command stream to describe
> > bu
tform (U65) with WIP Mesa Teflon support.
Signed-off-by: Rob Herring (Arm)
---
v2:
- Rebase on v6.17-rc1 adapting to scheduler changes
- scheduler: Drop the reset workqueue. According to the scheduler docs,
we don't need it since we have a single h/w queue.
- scheduler: Rework the time
Add a binding schema for Arm Ethos-U65/U85 NPU. The Arm Ethos-U NPUs are
designed for edge AI inference applications.
Signed-off-by: Rob Herring (Arm)
---
.../devicetree/bindings/npu/arm,ethos.yaml | 79 ++
1 file changed, 79 insertions(+)
diff --git a/Documentation
/mesa/mesa/-/merge_requests/36699/
[2] https://gitlab.arm.com/artificial-intelligence/ethos-u/
[3] git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git ethos-v2
Signed-off-by: Rob Herring (Arm)
---
Changes in v2:
- Rebase on v6.17-rc1 adapting to scheduler changes
- scheduler: Drop the reset
The "ti,opa362" binding is already supported in simple-bridge.yaml, so
remove the old binding doc.
Signed-off-by: Rob Herring (Arm)
---
.../bindings/display/ti/ti,opa362.txt | 38 ---
1 file changed, 38 deletions(-)
delete mode 100644 Documentation/devicetre
bindings/display/sprd/sprd,sharkl3-dpu.yaml | 17
> +++--
> .../bindings/display/sprd/sprd,sharkl3-dsi-host.yaml| 11 ---
> 2 files changed, 19 insertions(+), 9 deletions(-)
>
Reviewed-by: Rob Herring (Arm)
.../devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml| 4 +++-
> 2 files changed, 9 insertions(+), 2 deletions(-)
>
Acked-by: Rob Herring (Arm)
On Wed, Jul 30, 2025 at 07:02:46PM +0200, Louis Chauvet wrote:
> For am62 processors, we need to use the newly created clk-ctrl property to
> properly handle data edge sampling configuration. Add them in the main
> device tree.
>
> Fixes: 32a1795f57ee ("drm/tidss: New driver for TI Keystone platfo
On Wed, Jul 30, 2025 at 07:02:44PM +0200, Louis Chauvet wrote:
> The dt-bindings for the display, specifically ti,am65x-dss, need to
> include a clock property for data edge synchronization. The current
> implementation does not correctly apply the data edge sampling property.
>
> To address this,
On Wed, 30 Jul 2025 17:42:28 +0800, Yongxing Mou wrote:
> Document the MDSS hardware found on the Qualcomm QCS8300 platform.
>
> Signed-off-by: Yongxing Mou
> ---
> .../bindings/display/msm/qcom,qcs8300-mdss.yaml| 284
> +
> 1 file changed, 284 insertions(+)
>
My bot
rs to reach the peripheral and gate the
> clock accordingly.
>
> Signed-off-by: Raphael Gallais-Pou
> ---
> .../bindings/arm/stm32/st,stm32-syscon.yaml| 31
> +++---
> 1 file changed, 21 insertions(+), 10 deletions(-)
>
Reviewed-by: Rob Herring (Arm)
indings/display/st,stm32mp25-lvds.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
Acked-by: Rob Herring (Arm)
ree/bindings/display/st,stm32mp25-lvds.yaml | 3 +++
> 1 file changed, 3 insertions(+)
Acked-by: Rob Herring (Arm)
On Sun, Jul 27, 2025 at 03:15:55PM +0800, Jay Liu wrote:
> Add a compatible string for the CCORR IP found in the MT8196 SoC.
> Each CCORR IP of this SoC is fully compatible with the ones found
> in MT8192.
>
> Reviewed-by: AngeloGioacchino Del Regno
>
> Signed-off-by: Jay Liu
> Signed-off-by: 2
On Sun, 27 Jul 2025 15:15:54 +0800, Jay Liu wrote:
> Add disp-tdshp hardware description for MediaTek MT8196 SoC
>
> Signed-off-by: Jay Liu
> Signed-off-by: 20220315152503 created
> ---
> .../display/mediatek/mediatek,disp-tdshp.yaml | 50 +++
> 1 file changed, 50 insertions(+
On Sun, 27 Jul 2025 15:15:57 +0800, Jay Liu wrote:
> Add a compatible string for the GAMMA IP found in the MT8196 SoC.
> Each GAMMA IP of this SoC is fully compatible with the ones found
> in MT8195.
>
> Reviewed-by: AngeloGioacchino Del Regno
>
> Signed-off-by: Jay Liu
> Signed-off-by: 20220
On Sun, 27 Jul 2025 15:15:55 +0800, Jay Liu wrote:
> Add a compatible string for the CCORR IP found in the MT8196 SoC.
> Each CCORR IP of this SoC is fully compatible with the ones found
> in MT8192.
>
> Reviewed-by: AngeloGioacchino Del Regno
>
> Signed-off-by: Jay Liu
> Signed-off-by: 20220
On Sun, 27 Jul 2025 15:15:56 +0800, Jay Liu wrote:
> Add a compatible string for the DITHER IP found in the MT8196 SoC.
> Each DITHER IP of this SoC is fully compatible with the ones found
> in MT8183.
>
> Reviewed-by: AngeloGioacchino Del Regno
>
> Signed-off-by: Jay Liu
> Signed-off-by: 202
bindings for MT6331 regulator")
> Signed-off-by: AngeloGioacchino Del Regno
>
> ---
> .../bindings/regulator/mediatek,mt6331-regulator.yaml | 7 +++
> 1 file changed, 7 insertions(+)
>
Acked-by: Rob Herring (Arm)
ames of various regulators.
>
> Fixes: 6385e21692bb ("regulator: Add bindings for MT6331 regulator")
> Signed-off-by: AngeloGioacchino Del Regno
>
> ---
> .../regulator/mediatek,mt6331-regulator.yaml | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
Acked-by: Rob Herring (Arm)
bindings for MT6332 regulator")
> Signed-off-by: AngeloGioacchino Del Regno
>
> ---
> .../bindings/regulator/mediatek,mt6332-regulator.yaml | 7 +++
> 1 file changed, 7 insertions(+)
>
Acked-by: Rob Herring (Arm)
2-pinctrl.yaml| 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Rob Herring (Arm)
chino Del Regno
>
> ---
> Documentation/devicetree/bindings/timer/mediatek,timer.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring (Arm)
op requiring to specify clock-names on all non-MT8195 GCEs.
>
> Signed-off-by: AngeloGioacchino Del Regno
>
> ---
> .../bindings/mailbox/mediatek,gce-mailbox.yaml| 11 ---
> 1 file changed, 11 deletions(-)
>
Acked-by: Rob Herring (Arm)
On Thu, 24 Jul 2025 10:38:38 +0200, AngeloGioacchino Del Regno wrote:
> Like others, the MediaTek DisplayPort controller provides an
> auxiliary bus: import the common dp-aux-bus.yaml in this binding
> to allow specifying an aux-bus subnode.
>
> Signed-off-by: AngeloGioacchino Del Regno
>
> --
On Thu, Jul 24, 2025 at 05:16:21PM +0800, Chen-Yu Tsai wrote:
> On Thu, Jul 24, 2025 at 4:39 PM AngeloGioacchino Del Regno
> wrote:
> >
> > Even though the DPI IP has a reset bit on all MediaTek SoCs, it
> > is optional, and has always been unused until MT8195; specifically:
> > on older SoCs, lik
On Fri, Jul 25, 2025 at 04:06:45PM +0200, Maud Spierings wrote:
>
>
> On 7/25/25 15:27, Rob Herring (Arm) wrote:
> >
> > On Fri, 25 Jul 2025 13:09:23 +0200, Maud Spierings wrote:
> > > The Maxim MAX25014 is a 4-channel automotive grade backlight driver IC
> &g
gs/display/st,stm32-ltdc.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
Acked-by: Rob Herring (Arm)
On Fri, Jul 25, 2025 at 12:03:53PM +0200, Raphael Gallais-Pou wrote:
> The new STMicroelectronics SoC features a display controller similar to
> the one used in previous SoCs. Because there is additional registers,
> it is incompatible with existing IPs.
>
> Add the new name to the list of compat
On Thu, Jul 24, 2025 at 3:39 AM AngeloGioacchino Del Regno
wrote:
>
> As Rob pointed out, MediaTek devicetrees are *poor* in the dtbs_check
> tests, and got an infinite load of warnings.
>
> This series starts attacking this situation.
>
> I didn't really count how many warnings I have resolved -
On Fri, 25 Jul 2025 13:09:23 +0200, Maud Spierings wrote:
> The Maxim MAX25014 is a 4-channel automotive grade backlight driver IC
> with intgrated boost controller.
>
> Signed-off-by: Maud Spierings
> ---
> .../bindings/leds/backlight/maxim,max25014.yaml| 78
> ++
> M
On Fri, 25 Jul 2025 12:03:54 +0200, Raphael Gallais-Pou wrote:
> access-controllers is an optional property that allows a peripheral to
> refer to one or more domain access controller(s).
>
> This property is added when the peripheral is under the STM32 firewall
> controller. It allows an accur
On Fri, 25 Jul 2025 12:03:53 +0200, Raphael Gallais-Pou wrote:
> The new STMicroelectronics SoC features a display controller similar to
> the one used in previous SoCs. Because there is additional registers,
> it is incompatible with existing IPs.
>
> Add the new name to the list of compatible
On Thu, 24 Jul 2025 10:38:36 +0200, AngeloGioacchino Del Regno wrote:
> As Rob pointed out, MediaTek devicetrees are *poor* in the dtbs_check
> tests, and got an infinite load of warnings.
>
> This series starts attacking this situation.
>
> I didn't really count how many warnings I have resolv
On Thu, Jun 26, 2025 at 4:02 AM Konrad Dybcio wrote:
>
> From: Konrad Dybcio
>
> Add a file that will serve as a single source of truth for UBWC
> configuration data for various multimedia blocks.
>
> Reviewed-by: Dmitry Baryshkov
> Signed-off-by: Konrad Dybcio
> ---
> drivers/soc/qcom/Kconfig
On Thu, 24 Jul 2025 10:38:49 +0200, AngeloGioacchino Del Regno wrote:
> Even though the MT8188 SoC's Dual-Core SCP IP is practically the
> same as the one found on MT8195, it doesn't have a dedicated L1
> TCM and relies only on SRAM.
>
> Set reg/reg-names minItems to 1 globally and override it i
On Thu, 24 Jul 2025 10:38:44 +0200, AngeloGioacchino Del Regno wrote:
> The pin controller for both MT7622 and MT7629 need both a "base"
> and an "eint" MMIO like the ones found on other MediaTek SoCs:
> while devicetrees have always been correct, the binding is not,
> as it only allows an "eint"
On Thu, 24 Jul 2025 10:38:45 +0200, AngeloGioacchino Del Regno wrote:
> Allow node names like "uart0-pins" for the main nodes and "pins-bus"
> for the children to make this binding consistent with the majority
> of the other MediaTek pinctrl bindings.
>
> Signed-off-by: AngeloGioacchino Del Regn
On Thu, 24 Jul 2025 10:38:40 +0200, AngeloGioacchino Del Regno wrote:
> Both clocks and clock-names are missing (a lot of) entries: add
> all the used audio clocks and their description and also fix the
> example node.
>
> Signed-off-by: AngeloGioacchino Del Regno
>
> ---
> .../bindings/sound
On Wed, 23 Jul 2025 16:52:08 +0200, Alicja Michalska wrote:
> Add bindings for Samsung EA8076 LCD panel.
> This panel was usually used in mid-high end smartphones manufactured by
> Xiaomi in 2018 and 2019 (Mi 9 Lite and Mi Mix 3, with codenames
> "xiaomi-pyxis" and "xiaomi-perseus", respectively)
On Sun, 20 Jul 2025 14:30:05 +0200, Krzysztof Kozlowski wrote:
> 'minItems' alone does not impose upper bound, unlike 'maxItems' which
> implies lower bound. Add missing clock constraint so the list will have
> exact number of items (clocks).
>
> Fixes: 2295bbd35edb ("dt-bindings: display: add
On Sun, 20 Jul 2025 14:30:04 +0200, Krzysztof Kozlowski wrote:
> 'minItems' alone does not impose upper bound, unlike 'maxItems' which
> implies lower bound. Add missing clock constraint so the list will have
> exact number of items (clocks).
>
> Fixes: 8cae15c60cf0 ("dt-bindings: display: add
On Mon, Jun 16, 2025 at 02:24:38PM -0400, Frank Li wrote:
> Convert fsl,dcu.txt to yaml format.
>
> Additional changes:
> - remove label in example.
> - change node to display-controller in example.
> - use 32bit address in example.
> - add interrupts property.
>
> Reviewed-by: Krzysztof Kozlowsk
tform (U65) with WIP Mesa Teflon support.
Signed-off-by: Rob Herring (Arm)
---
Open issues/TODO:
- Fix "Memory manager not clean during takedown." warning
- U85 support (minor changes and testing needed)
- Improve AXI bus config. This needs to be per platform probably and is
also di
] https://gitlab.arm.com/artificial-intelligence/ethos-u/
[3] git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git ethos
Signed-off-by: Rob Herring (Arm)
---
Rob Herring (Arm) (2):
dt-bindings: npu: Add Arm Ethos-U65/U85
accel: Add Arm Ethos-U NPU driver
.../devicetree/bindings
Add a binding schema for Arm Ethos-U65/U85 NPU. The Arm Ethos-U NPUs are
designed for edge AI inference applications.
Signed-off-by: Rob Herring (Arm)
---
.../devicetree/bindings/npu/arm,ethos.yaml | 79 ++
1 file changed, 79 insertions(+)
diff --git a/Documentation
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