from Javier
- Add this patch in v3
- Add this patch in v3
Yakir Yang (11):
drm/rockchip: analogix_dp: split the lcdc select setting into device
data
drm/bridge: analogix_dp: correct the register bit define error in
ANALOGIX_DP_PLL_REG_1
drm/bridge: analogix_dp: some rockchip chips ne
Sean,
On 06/23/2016 09:27 PM, Sean Paul wrote:
> On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote:
>> As vendor document indicate, when REF_CLK bit set 0, then DP
>> phy's REF_CLK should switch to 24M source clock.
>>
>> But due to IC PHY layout mistaken, some chi
Sean,
On 06/23/2016 10:33 PM, Sean Paul wrote:
> On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote:
>> There're an register define error in ANALOGIX_DP_PLL_REG_1 which introduced
>> by commit bcec20fd5ad6 ("drm: bridge: analogix/dp: add some rk3288 special
>> register
Heiko & Sean
On 06/24/2016 12:16 AM, Heiko Stuebner wrote:
> Am Donnerstag, 23. Juni 2016, 10:32:53 schrieb Sean Paul:
>> On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote:
>>> eDP controller need to declare which vop provide the video source,
>>> an
Sean,
On 06/23/2016 10:10 PM, Sean Paul wrote:
> On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote:
>> Some boards don't need to declare a panel device node, like the
>> display interface is DP monitors, so it's necessary to make the
>> panel detect to an optional act
Sean,
On 06/23/2016 10:22 PM, Sean Paul wrote:
> On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote:
>> The hardware IC designed that VOP must output the RGB10 video format to
>> eDP contoller, and if eDP panel only support RGB8, then eDP contoller
>> should cut down the vi
Sean,
On 06/23/2016 10:19 PM, Sean Paul wrote:
> On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote:
>> Rockchip VOP couldn't output YUV video format for eDP controller, so
>> when driver detect connector support YUV video format, we need to hack
>> it down to RGB888.
>&
Sean,
On 06/23/2016 10:24 PM, Sean Paul wrote:
> On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang wrote:
>> The enum value of DP_IRQ_TYPE_HP_CABLE_IN is zero, but driver only
>> send drm hp event when the irq_type and the enum value is true.
>>
>> if (irq_typ
Doug,
On 06/23/2016 01:16 PM, Doug Anderson wrote:
> Yakir,
>
> On Wed, Jun 22, 2016 at 6:58 PM, Yakir Yang wrote:
>> For RK3399's GRF module, if we want to operate the graphic related grf
>> registers, we need to enable the pclk_vio_grf which supply power for VIO
>&
Doug,
On 06/23/2016 01:17 PM, Doug Anderson wrote:
> Hi,
>
> On Wed, Jun 22, 2016 at 6:47 PM, Yakir Yang wrote:
>> The document about rockchip platform make a mistaken in available
>> compatible name of "rk3288-edp", we should correct it to "rk3288-dp"
&
Rob,
On 06/29/2016 04:59 AM, Rob Herring wrote:
> On Tue, Jun 28, 2016 at 12:51:12PM +0800, Yakir Yang wrote:
>> The LG LP079QX1-SP0V is an 7.9" QXGA TFT with LED Backlight unit and
>> 32 pins eDP interface. This module supports 1536x2048 mode.
>>
&g
Panel regulator is controller by a normal GPIO, so we need to
write a regulator-fixed node for it.
Signed-off-by: Yakir Yang
---
arch/arm/boot/dts/rk3288-evb-rk808.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts
b/arch/arm/boot/dts/rk3288-evb
Panel regulator is controller by a normal GPIO, so we need to
write a regulator-fixed node for it.
Signed-off-by: Yakir Yang
---
arch/arm/boot/dts/rk3288-evb-act8846.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts
b/arch/arm/boot/dts/rk3288
The default eDP panel on RK3288 EVB board is LG LP079QX1-SP0V TFT LCD,
we haven't declared the panel regulator in the 'panel-simple' device
node here, so the specific board like ACT8846 / RK8080 need to support
the panel power supply.
Signed-off-by: Yakir Yang
---
arch/arm/boot/dts/rk3288
The LG LP079QX1-SP0V is an 7.9" QXGA TFT with LED Backlight unit and
32 pins eDP interface. This module supports 1536x2048 mode.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/panel/panel-simple.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gp
The LG LP079QX1-SP0V is an 7.9" QXGA TFT with LED Backlight unit and
32 pins eDP interface. This module supports 1536x2048 mode.
Signed-off-by: Yakir Yang
---
.../devicetree/bindings/display/panel/lg,lp079qx1-sp0v.txt | 7 +++
1 file changed, 7 insertions(+)
create mode 1
Hi Heiko,
This series just want to enable the graphic support on RK3288 EVB
boards, most of them are DTS changes, but still have one change about
new eDP panel support.
Thanks,
- Yakir
Yakir Yang (5):
dt-bindings: Add support for LG LP079QX1-SP0V 1536x2048 panel
drm/panel: simple: Add
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.
Signed-off-by: Yakir Yang
---
Hi all,
This is an external patch for analogix_dp
ment for rockchip variant of analogix_dp").
Reported-by: Tomasz Figa
Signed-off-by: Yakir Yang
---
Hi all,
This is an external patch for analogix_dp misc cleanup thread [0]
[0]: https://patchwork.kernel.org/patch/9175613/
BR,
- Yakir
Changes in v4: None
Changes in v3:
- Add this patch in v3
.
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.
Signed-off-by: Yakir Yang
---
Hi all,
This is an external patch for analogix_dp
ment for rockchip variant of analogix_dp").
Reported-by: Tomasz Figa
Signed-off-by: Yakir Yang
---
Hi all,
This is an external patch for analogix_dp misc cleanup thread [0]
[0]: https://patchwork.kernel.org/patch/9175613/
BR,
- Yakir
.../devicetree/bindings/display/rockchip/analogix_dp-rockchip.tx
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.
Signed-off-by: Yakir Yang
---
Hi all,
This is an external patch for analogix_dp
Archit,
On 06/21/2016 09:46 PM, Archit Taneja wrote:
>
>
> On 6/14/2016 5:15 PM, Yakir Yang wrote:
>> RK3399 and RK3288 shared the same eDP IP controller, only some light
>> difference with VOP configure and GRF configure.
>>
>> Also same misc fix to analogix_dp d
Tomasz,
On 06/15/2016 05:25 PM, Tomasz Figa wrote:
> Hi Yakir,
>
> Yakir Yang rock-chips.com> writes:
>>>>Required properties:
>>>> -- compatible: "rockchip,rk3288-edp";
>>>> +- compatible: "rockchip,rk3288-edp",
>>&g
Tomasz,
On 06/15/2016 05:27 PM, Tomasz Figa wrote:
> Hi Yakir,
>
> Yakir Yang rock-chips.com> writes:
>> RK3399 and RK3288 shared the same eDP IP controller, only some light
>> difference with VOP configure and GRF configure.
>>
>> Also same misc fix to anal
Enable the basic hdmi audio function on rk3036 kylin board.
Signed-off-by: Yakir Yang
---
arch/arm/boot/dts/rk3036-kylin.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rk3036-kylin.dts
b/arch/arm/boot/dts/rk3036-kylin.dts
index 1df1557..070cfe1 100644
--- a/arch
Using I2S as the audio input source, and force the mclk_fs to 256.
Signed-off-by: Yakir Yang
---
arch/arm/boot/dts/rk3036.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 843d2be..ecff071 100644
Using the common hdmi-codec driver to support hdmi audio function.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/rockchip/inno_hdmi.c | 237 ++-
drivers/gpu/drm/rockchip/inno_hdmi.h | 2 +
2 files changed, 237 insertions(+), 2 deletions(-)
diff --git a/drivers
On 06/15/2016 12:28 AM, Daniel Vetter wrote:
> On Tue, Jun 14, 2016 at 06:26:56PM +0200, Daniel Vetter wrote:
>> On Tue, Jun 14, 2016 at 07:46:29PM +0800, Yakir Yang wrote:
>>> It's better to pass the connector to platform driver in .get_modes()
>>> callback, just like w
Doug,
On 06/14/2016 11:24 PM, Doug Anderson wrote:
> Yakir,
>
> On Tue, Jun 14, 2016 at 4:46 AM, Yakir Yang wrote:
>> RK3399 and RK3288 shared the same eDP IP controller, only some light
>> difference with VOP configure and GRF configure.
>>
>> Signed-off-by:
at
just need to assign all hotplug enum with no-zero values.
Reported-by: Dan Carpenter
Signed-off-by: Yakir Yang
Reviewed-by: Stéphane Marchesin
Tested-by: Javier Martinez Canillas
---
Changes in v3:
- Add reviewed flag from Stéphane.
[https://chromium-review.googlesource.com/#/c/346319/15
The hardware IC designed that VOP must output the RGB10 video format to
eDP contoller, and if eDP panel only support RGB8, then eDP contoller
should cut down the video data, not via VOP contoller, that's why we need
to hardcode the VOP output mode to RGA10 here.
Signed-off-by: Yakir Yang
Acked
Rockchip VOP couldn't output YUV video format for eDP controller, so
when driver detect connector support YUV video format, we need to hack
it down to RGB888.
Signed-off-by: Yakir Yang
Acked-by: Mark Yao
---
Changes in v3:
- Hook the connector's color_formats in .get_modes directly. (Tomasz
It's better to pass the connector to platform driver in .get_modes()
callback, just like what the .get_modes() helper function designed.
Signed-off-by: Yakir Yang
---
Changes in v3:
- Avoid to change any internal driver state in .mode_valid interface. (Tomasz,
reviewed at Google Gerrit
Some boards don't need to declare a panel device node, like the
display interface is DP monitors, so it's necessary to make the
panel detect to an optional action.
Signed-off-by: Yakir Yang
Acked-by: Mark Yao
---
Changes in v3:
- Add the acked flag from Mark.
Changes in v2: None
drivers/gpu
RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.
Signed-off-by: Yakir Yang
Acked-by: Mark Yao
---
Changes in v3:
- Give the "rk3399-edp" a separate line for clarity in document (Tomasz,
reviewed at Google Gerrit)
hack.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v3:
- Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
reg = ~reg & REF_CLK_MASK; ---> reg ^= REF_CLK_MASK;
[https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm
There're an register define error in ANALOGIX_DP_PLL_REG_1 which introduced
by commit bcec20fd5ad6 ("drm: bridge: analogix/dp: add some rk3288 special
registers setting").
The PHY PLL input clock source is selected by ANALOGIX_DP_PLL_REG_1
BIT 0, not BIT 1.
Signed-off-by: Yakir Yang
eDP controller need to declare which vop provide the video source,
and it's defined in GRF registers.
But different chips have different GRF register address, so we need to
create a device data to declare the GRF messages for each chips.
Signed-off-by: Yakir Yang
Acked-by: Mark Yao
---
Changes
Rename RK3288_DP macros to ROCKCHIP_DP, prepare to add eDP
support for more Rockchip chips.
Signed-off-by: Yakir Yang
Reviewed-by: Stéphane Marchesin
Tested-by: Javier Martinez Canillas
---
Changes in v3:
- Correct the misspell of "marcos" in commit message (Dominik, reviewed
from Javier
Changes in v2:
- new patch in v2
- rebase with drm-next, fix some conflicts
- new patch in v2
Yakir Yang (10):
drm/bridge: analogix_dp: rename RK3288_DP to ROCKCHIP_DP
drm/rockchip: analogix_dp: split the lcdc select setting into device
data
drm/bridge: analogix_dp: correct th
The Sharp LQ123P1JX31 is an 12.3", 2400x1600 TFT-LCD panel connected
using eDP interfaces.
Signed-off-by: Yakir Yang
Reviewed-by: Doug Anderson
Tested-by: Doug Anderson
---
Changes in v3:
- Correct the size of panel_desc to active area 259mmx173mm (Doug)
- Add the reviewed/tested flag
The Sharp LQ123P1JX31 is an 12.3" 2400x1600 TFT-LCD panel
connected using eDP interfaces.
Signed-off-by: Yakir Yang
Reviewed-by: Douglas Anderson
---
Changes in v3:
- Drop the extra comma in compatible name (Rob)
- Add the reviewed flag from Doug
Changes in v2:
- Add dt-bindings of
The Samsung LSN122DL01-C01 is an 12.2" 2560x1600 (WQXGA) TFT-LCD panel
connected using eDP interfaces.
Signed-off-by: Yakir Yang
---
Changes in v3:
- Correct the size of panel_desc to active area 262mmx164mm (Emil, Stéphane)
Changes in v2: None
drivers/gpu/drm/panel/panel-simple.c
The Samsung LSN122DL01-C01 is an 12.2" 2560x1600 (WQXGA) TFT-LCD
panel connected using eDP interfaces.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
---
Changes in v3: None
Changes in v2:
- Add Rob's acked for dt-bindings of Samsung LSN122DL01 panel
.../devicetree/bindings/display/
The LG LP097QX1-SPA1 is an 9.7", 2048x1536 (QXGA) TFT-LCD panel
connected using eDP interfaces.
Signed-off-by: Yakir Yang
---
Changes in v3:
- Correct the size of panel_desc to active area 208mmx147mm (Emil, Stéphane)
- Sort the lg_lp097qx1_spa1 before lg_lp120up1 (Emil)
Changes in v2:
The LG LP097QX1-SPA1 is an 9.7", 2048x1536 (QXGA) TFT-LCD panel
connected using eDP interfaces.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
---
Changes in v3: None
Changes in v2:
- Add Rob's acked for dt-bindings of LG LP097QX1-SPA1 panel
.../devicetree/bindings/display/panel/lg,lp0
On 06/11/2016 12:40 AM, Doug Anderson wrote:
> Rob,
>
> On Fri, Jun 10, 2016 at 6:42 AM, Rob Herring wrote:
>> On Wed, Jun 08, 2016 at 07:52:45PM +0800, Yakir Yang wrote:
>>> The Sharp LQ123P1JX31 is an 12.3" 2400x1600 TFT-LCD panel
>>> connected us
Doug,
On 06/11/2016 12:11 AM, Doug Anderson wrote:
> Hi,
>
> On Wed, Jun 8, 2016 at 9:35 AM, Doug Anderson
> wrote:
>> Yakir,
>>
>> On Wed, Jun 8, 2016 at 4:52 AM, Yakir Yang wrote:
>>> The Sharp LQ123P1JX31 is an 12.3", 2400x1600 TFT-
Emil,
On 06/08/2016 08:20 PM, Emil Velikov wrote:
> Hi Yakir,
>
> On 8 June 2016 at 12:52, Yakir Yang wrote:
>> The LG LP097QX1-SPA1 is an 9.7", 2048x1536 (QXGA) TFT-LCD panel
>> connected using eDP interfaces.
>>
>> Signed-off-by: Yakir Yang
>> --
Stéphane,
On 06/10/2016 08:04 AM, Stéphane Marchesin wrote:
> On Wed, Jun 8, 2016 at 4:52 AM, Yakir Yang wrote:
>> The Samsung LSN122DL01-C01 is an 12.2" 2560x1600 (WQXGA) TFT-LCD panel
>> connected using eDP interfaces.
>>
>> Signed-off-by: Yakir Yan
The Sharp LQ123P1JX31 is an 12.3", 2400x1600 TFT-LCD panel connected
using eDP interfaces.
Signed-off-by: Yakir Yang
---
Changes in v2:
- Add detail timing of Sharp LQ123P1JX31 panel in v2
drivers/gpu/drm/panel/panel-simple.c | 26 ++
1 file changed, 26 inser
The Sharp LQ123P1JX31 is an 12.3" 2400x1600 TFT-LCD panel
connected using eDP interfaces.
Signed-off-by: Yakir Yang
---
Changes in v2:
- Add dt-bindings of Sharp LQ123P1JX31 panel in v2
.../devicetree/bindings/display/panel/sharp,lq123p1jx31.txt| 7 +++
1 file changed, 7 inser
The Samsung LSN122DL01-C01 is an 12.2" 2560x1600 (WQXGA) TFT-LCD panel
connected using eDP interfaces.
Signed-off-by: Yakir Yang
---
Changes in v2: None
drivers/gpu/drm/panel/panel-simple.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/
The Samsung LSN122DL01-C01 is an 12.2" 2560x1600 (WQXGA) TFT-LCD
panel connected using eDP interfaces.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
---
Changes in v2:
- Add Rob's acked for dt-bindings of Samsung LSN122DL01 panel
.../devicetree/bindings/display/panel/samsung,lsn122dl0
The LG LP097QX1-SPA1 is an 9.7", 2048x1536 (QXGA) TFT-LCD panel
connected using eDP interfaces.
Signed-off-by: Yakir Yang
---
Changes in v2: None
drivers/gpu/drm/panel/panel-simple.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/panel/
The LG LP097QX1-SPA1 is an 9.7", 2048x1536 (QXGA) TFT-LCD panel
connected using eDP interfaces.
Signed-off-by: Yakir Yang
Acked-by: Rob Herring
---
Changes in v2:
- Add Rob's acked for dt-bindings of LG LP097QX1-SPA1 panel
.../devicetree/bindings/display/panel/lg,lp097qx1-spa1.txt
platform. And Mark also have reviewed the
Rockchip side code, so it would be very nice that i could get some
reviewed/acked from Samsung before i start to prepare my pull request ;)
BR,
- Yakir
[1]: https://patchwork.freedesktop.org/patch/83406/
On 05/24/2016 01:01 PM, Yakir Yang wrote:
> Hi
Mark,
On 06/01/2016 09:57 AM, Mark yao wrote:
> On 2016å¹´05æ24æ¥ 13:02, Yakir Yang wrote:
>> eDP controller need to declare which vop provide the video source,
>> and it's defined in GRF registers.
>>
>> But different chips have different GRF register address, so we
Marc, Javier
On 06/08/2016 03:44 PM, Marc Zyngier wrote:
> On Wed, 8 Jun 2016 09:28:32 +0800
> Yakir Yang wrote:
>
>> Hi Javier,
>>
>> On 06/08/2016 01:06 AM, Javier Martinez Canillas wrote:
>>> Hello Yakir,
>>>
>>> On 03/17/2016 05:47 PM, He
Hi Javier,
On 06/08/2016 01:06 AM, Javier Martinez Canillas wrote:
> Hello Yakir,
>
> On 03/17/2016 05:47 PM, Heiko Stübner wrote:
>> Split the dp core driver from exynos directory to bridge directory,
>> and rename the core driver to analogix_dp_*, rename the platform
_w * 2;
cbcr_yscale = dst_h / src_h;
* In YUV444 data format
cbcr_xscale = dst_w / src_w;
cbcr_yscale = dst_h / src_h;
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/ro
The WIN0 of RK3036 VOP could support YUV data format, but driver
forget to add the uv_vir register field for it.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
b/drivers
Hi Thierry,
Ping... Could you help to review/ack the panel changes :)
BR,
- Yakir
On 05/23/2016 08:54 PM, Yakir Yang wrote:
> The LG LP097QX1-SPA1 is an 9.7", 2048x1536 (QXGA) TFT-LCD panel
> connected using eDP interfaces.
>
> Signed-off-by: Yakir Yang
> ---
> driv
Hi Rob,
On 05/24/2016 05:35 AM, Rob Herring wrote:
> On Mon, May 23, 2016 at 08:55:37PM +0800, Yakir Yang wrote:
>> The Samsung LSN122DL01-C01 is an 12.2" 2560x1600 (WQXGA) TFT-LCD
>> panel connected using eDP interfaces.
>>
>> Signed-off-by: Yakir Yang
>
Hi Rob,
On 05/24/2016 05:34 AM, Rob Herring wrote:
> On Mon, May 23, 2016 at 08:55:15PM +0800, Yakir Yang wrote:
>> The LG LP097QX1-SPA1 is an 9.7", 2048x1536 (QXGA) TFT-LCD panel
>> connected using eDP interfaces.
>>
>> Signed-off-by: Yakir Yang
>> ---
>
Hi Daniel,
On 06/02/2016 10:19 PM, Daniel Vetter wrote:
> On Wed, Jun 01, 2016 at 10:54:09AM +0800, Yakir Yang wrote:
>> Hi Daniel,
>>
>> On 05/31/2016 10:38 PM, Daniel Vetter wrote:
>>> On Tue, May 31, 2016 at 09:37:36PM +0800, Yakir Yang wrote:
>>>>
Hi all,
Sorry about the CC list, I lose some guys here, just add them back.
On 06/02/2016 08:57 PM, Yakir Yang wrote:
> The full name of PSR is Panel Self Refresh, panel device could refresh
> itself with the hardware framebuffer in panel, this would make lots of
> sense to save
Hi Daniel,
Thanks for your fast respond.
On 06/02/2016 09:18 PM, Daniel Vetter wrote:
> On Thu, Jun 02, 2016 at 08:57:38PM +0800, Yakir Yang wrote:
>> Let VOP vblank status decide whether panle should enter into or
>> exit from PSR status. Before eDP start to change PSR sta
Let VOP vblank status decide whether panle should enter into or
exit from PSR status. Before eDP start to change PSR status, it
need to wait for VOP vact_end event. In order to listen vact_end
event, I create a new file about PSR notify between eDP and VOP.
Signed-off-by: Yakir Yang
---
Changes
VOP could use line flag interrupt to detect some target timing.
For example, eDP PSR is interesting in vact_end, then VOP could
configure the line number to vact_end, and wait for line flag
interrupt coming.
Signed-off-by: Yakir Yang
---
Changes in v2:
- introduce in v2, split VOP line flag
()
Signed-off-by: Yakir Yang
---
Changes in v2:
- Introduce in v2, splite the common Analogix DP changes out
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 69 ++
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 4 ++
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
enable/disable event driver the PSR.
This thread is based on Mark's RK3399 VOP thread[0] and my RK3399 eDP
thread[1].
[0]: https://patchwork.kernel.org/patch/8886041/
[1]: https://patchwork.kernel.org/patch/9132713/
BR.
- Yakir
Changes in v2:
- Introduce in v2, splite the common Analogix DP changes
On 06/01/2016 11:19 PM, Thierry Reding wrote:
> On Wed, Jun 01, 2016 at 05:19:12PM +0800, Yakir Yang wrote:
>> There is a bug in RK3399 VOP, when bootloader/kernel only enable
>> VOP Big or VOP Little to display, then VOP IOMMU would failed to
>> reset at the initial
There is a bug in RK3399 VOP, when bootloader/kernel only enable
VOP Big or VOP Little to display, then VOP IOMMU would failed to
reset at the initial time and VOP register couldn't write rightly.
After do the pure reset of VOP module, then things back to right.
Signed-off-by: Yakir Yang
Hi Daniel,
On 05/31/2016 10:38 PM, Daniel Vetter wrote:
> On Tue, May 31, 2016 at 09:37:36PM +0800, Yakir Yang wrote:
>> The full name of PSR is Panel Self Refresh, panel device could refresh
>> itself with the hardware framebuffer in panel, this would make a lots
>> of se
Hi Daniel,
On 05/31/2016 10:36 PM, Daniel Vetter wrote:
> On Tue, May 31, 2016 at 09:39:19PM +0800, Yakir Yang wrote:
>> EDP PSR function is interesting in vblank enable or disable event,
>> so it would be great introduce a way to notify encoder about this
>> event.
>&
Hi Daniel,
On 05/31/2016 10:38 PM, Daniel Vetter wrote:
> On Tue, May 31, 2016 at 09:37:36PM +0800, Yakir Yang wrote:
>> The full name of PSR is Panel Self Refresh, panel device could refresh
>> itself with the hardware framebuffer in panel, this would make a lots
>> of se
Javier, Mark, Inki, Jingoo
On 06/01/2016 04:01 AM, Javier Martinez Canillas wrote:
> Hello Yakir,
>
> On 05/27/2016 02:16 AM, Yakir Yang wrote:
>> Hi Javier,
>>
>> On 05/26/2016 08:48 PM, Javier Martinez Canillas wrote:
>>> Hello Yakir,
>>>
>>
framebuffer of panel,
and then let panel enter into PSR mode. After that system could poweroff
the LCDC controller and eDP controller, just let panel refresh the screen
by itself.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 69
drivers/gpu
EDP PSR function is interesting in vblank enable or disable event,
so it would be great introduce a way to notify encoder about this
event.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/rockchip/Makefile | 2 +-
drivers/gpu/drm/rockchip/rockchip_drm_notify.c | 66
enable/disable event driver the PSR.
This thread is based on Mark's RK3399 VOP thread[0] and my RK3399 eDP
thread[1].
[0]: https://patchwork.kernel.org/patch/8886041/
[1]: https://patchwork.kernel.org/patch/9132713/
- Yakir
Thanks,
Yakir Yang (2):
drm/rockchip: add a notify event about vblank
Hi Javier,
On 05/26/2016 08:48 PM, Javier Martinez Canillas wrote:
> Hello Yakir,
>
> On 05/26/2016 05:34 AM, Yakir Yang wrote:
>> Hi Javier,
>>
>> On 05/24/2016 01:01 PM, Yakir Yang wrote:
>>> Hi all,
>>>
>>> This series have bee
Hi Javier,
On 05/24/2016 01:01 PM, Yakir Yang wrote:
> Hi all,
>
> This series have been posted about one month, still no comments, help here :(
This series works rightly on Rockchip platform, and most of them haven't
touch the
common analogix_dp driver (except for the hotplug fixed). S
On 05/24/2016 06:17 PM, Heiko Stuebner wrote:
> Am Dienstag, 24. Mai 2016, 14:57:23 schrieb Yakir Yang:
> []
>> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
>> b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c index 29c4105..d5d4e04
>> 100644
On 05/25/2016 02:23 AM, Heiko Stuebner wrote:
> Am Dienstag, 24. Mai 2016, 11:12:20 schrieb Doug Anderson:
>> Hi,
>>
>> On Tue, May 24, 2016 at 3:17 AM, Heiko Stuebner wrote:
--- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
+++
RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.
Signed-off-by: Yakir Yang
---
Changes in v2:
- rebase with drm-next, fix some conflicts
.../bindings/display/bridge/analogix_dp.txt| 1 +
.../display/rockchip
at
just need to assign all hotplug enum with no-zero values.
Reported-by: Dan Carpenter
Signed-off-by: Yakir Yang
---
Changes in v2: None
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/a
The hardware IC designed that VOP must output the RGB10 video format to
eDP contoller, and if eDP panel only support RGB8, then eDP contoller
should cut down the video data, not via VOP contoller, that's why we need
to hardcode the VOP output mode to RGA10 here.
Signed-off-by: Yakir Yang
Rockchip VOP couldn't output YUV video format for eDP controller, so
when driver detect connector support YUV video format, we need to hack
it down to RGB888.
Signed-off-by: Yakir Yang
---
Changes in v2: None
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 19 +++
1 file
It's helpful to expand the mode_valid callback to platform driver,
so they could valid the display mode or information.
Signed-off-by: Yakir Yang
---
Changes in v2: None
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 15 +++
include/drm/bridge/analogix_dp.h
Some boards don't need to declare a panel device node, like the
display interface is DP monitors, so it's necessary to make the
panel detect to an optional action.
Signed-off-by: Yakir Yang
---
Changes in v2: None
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 48
RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.
Signed-off-by: Yakir Yang
---
Changes in v2:
- rebase with drm-next, fix some conflicts
.../bindings/display/bridge/analogix_dp.txt| 1 +
.../display/rockchip
hack.
Signed-off-by: Yakir Yang
---
Changes in v2:
- new patch in v2
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 6 +-
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 1 +
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 3 +++
include/drm/bridge/analogix_dp.h
There're an register define error in ANALOGIX_DP_PLL_REG_1 which introduced
by commit bcec20fd5ad6 ("drm: bridge: analogix/dp: add some rk3288 special
registers setting").
The PHY PLL input clock source is selected by ANALOGIX_DP_PLL_REG_1
BIT 0, not BIT 1.
Signed-off-by: Yakir Yang
-
eDP controller need to declare which vop provide the video source,
and it's defined in GRF registers.
But different chips have different GRF register address, so we need to
create a device data to declare the GRF messages for each chips.
Signed-off-by: Yakir Yang
---
Changes in v2: None
Rename RK3288_DP marcos to ROCKCHIP_DP, prepare to add eDP
support for more Rockchip chips.
Signed-off-by: Yakir Yang
---
Changes in v2: None
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 4 ++--
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 6 +++---
drivers/gpu/drm/rockchip
- Make panel detect to an optional action
- correct the register bit define error in ANALOGIX_DP_PLL_REG_1
Changes in v2:
- new patch in v2
- rebase with drm-next, fix some conflicts
- new patch in v2
Yakir Yang (10):
drm/bridge: analogix_dp: rename RK3288_DP to ROCKCHIP_DP
drm/rockchip
The Samsung LSN122DL01-C01 is an 12.2" 2560x1600 (WQXGA) TFT-LCD
panel connected using eDP interfaces.
Signed-off-by: Yakir Yang
---
.../devicetree/bindings/display/panel/samsung,lsn122dl01-c01.txt | 7 +++
1 file changed, 7 insertions(+)
create mode 100644
Documentation/devic
The Samsung LSN122DL01-C01 is an 12.2" 2560x1600 (WQXGA) TFT-LCD panel
connected using eDP interfaces.
Signed-off-by: Yakir Yang
---
drivers/gpu/drm/panel/panel-simple.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple
101 - 200 of 777 matches
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