From: Evan Quan <evan.q...@amd.com>

[ Upstream commit 7be3be2b027c12e84833b3dc9597d3bb7e4c5464 ]

By setting mp1_state as PP_MP1_STATE_UNLOAD, MP1 will do some proper cleanups 
and
put itself into a state ready for PNP. That can workaround some random resuming
failure observed on BOCO capable platforms.

Signed-off-by: Evan Quan <evan.q...@amd.com>
Acked-by: Alex Deucher <alexander.deuc...@amd.com>
Reviewed-by: Guchun Chen <guchun.c...@amd.com>
Reviewed-by: Lijo Lazar <lijo.la...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index ada083fbc052b..6e682bf8c2d6a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -1578,12 +1578,27 @@ static int amdgpu_pmops_runtime_suspend(struct device 
*dev)
        if (amdgpu_device_supports_px(drm_dev))
                drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 
+       /*
+        * By setting mp1_state as PP_MP1_STATE_UNLOAD, MP1 will do some
+        * proper cleanups and put itself into a state ready for PNP. That
+        * can address some random resuming failure observed on BOCO capable
+        * platforms.
+        * TODO: this may be also needed for PX capable platform.
+        */
+       if (amdgpu_device_supports_boco(drm_dev))
+               adev->mp1_state = PP_MP1_STATE_UNLOAD;
+
        ret = amdgpu_device_suspend(drm_dev, false);
        if (ret) {
                adev->in_runpm = false;
+               if (amdgpu_device_supports_boco(drm_dev))
+                       adev->mp1_state = PP_MP1_STATE_NONE;
                return ret;
        }
 
+       if (amdgpu_device_supports_boco(drm_dev))
+               adev->mp1_state = PP_MP1_STATE_NONE;
+
        if (amdgpu_device_supports_px(drm_dev)) {
                /* Only need to handle PCI state in the driver for ATPX
                 * PCI core handles it for _PR3.
-- 
2.34.1

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