From: Paul Boddie <p...@boddie.org.uk>

The jz4780 has some more features which should be initialized
according to the vendor kernel.

Signed-off-by: Paul Boddie <p...@boddie.org.uk>
Signed-off-by: H. Nikolaus Schaller <h...@goldelico.com>
---
 drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 34 +++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c 
b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
index dcf44cb00821f..fb2cdb188b993 100644
--- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
+++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
@@ -66,6 +66,9 @@ struct jz_soc_info {
        bool needs_dev_clk;
        bool has_osd;
        bool has_alpha;
+       bool has_pcfg;
+       bool has_recover;
+       bool has_rgbc;
        bool map_noncoherent;
        bool use_extended_hwdesc;
        bool plane_f0_not_working;
@@ -732,6 +735,9 @@ static void ingenic_drm_encoder_atomic_mode_set(struct 
drm_encoder *encoder,
                    | JZ_LCD_CFG_SPL_DISABLE | JZ_LCD_CFG_REV_DISABLE;
        }
 
+       if (priv->soc_info->has_recover)
+               cfg |= JZ_LCD_CFG_RECOVER_FIFO_UNDERRUN;
+
        if (priv->soc_info->use_extended_hwdesc)
                cfg |= JZ_LCD_CFG_DESCRIPTOR_8;
 
@@ -1320,6 +1326,22 @@ static int ingenic_drm_bind(struct device *dev, bool 
has_components)
                osdc |= JZ_LCD_OSDC_ALPHAEN;
        regmap_write(priv->map, JZ_REG_LCD_OSDC, osdc);
 
+       /* Magic values from the vendor kernel for the priority thresholds. */
+       if (soc_info->has_pcfg)
+               regmap_write(priv->map, JZ_REG_LCD_PCFG,
+                            JZ_LCD_PCFG_PRI_MODE |
+                            JZ_LCD_PCFG_HP_BST_16 |
+                            (511 << JZ_LCD_PCFG_THRESHOLD2_OFFSET) |
+                            (400 << JZ_LCD_PCFG_THRESHOLD1_OFFSET) |
+                            (256 << JZ_LCD_PCFG_THRESHOLD0_OFFSET));
+
+       /* RGB output control may be superfluous. */
+       if (soc_info->has_rgbc)
+               regmap_write(priv->map, JZ_REG_LCD_RGBC,
+                            JZ_LCD_RGBC_RGB_FORMAT_ENABLE |
+                            JZ_LCD_RGBC_ODD_RGB |
+                            JZ_LCD_RGBC_EVEN_RGB);
+
        mutex_init(&priv->clk_mutex);
        priv->clock_nb.notifier_call = ingenic_drm_update_pixclk;
 
@@ -1483,6 +1505,9 @@ static const struct jz_soc_info jz4740_soc_info = {
        .needs_dev_clk = true,
        .has_osd = false,
        .map_noncoherent = false,
+       .has_pcfg = false,
+       .has_recover = false,
+       .has_rgbc = false,
        .max_width = 800,
        .max_height = 600,
        .formats_f1 = jz4740_formats,
@@ -1494,6 +1519,9 @@ static const struct jz_soc_info jz4725b_soc_info = {
        .needs_dev_clk = false,
        .has_osd = true,
        .map_noncoherent = false,
+       .has_pcfg = false,
+       .has_recover = true,
+       .has_rgbc = true,
        .max_width = 800,
        .max_height = 600,
        .formats_f1 = jz4725b_formats_f1,
@@ -1506,6 +1534,9 @@ static const struct jz_soc_info jz4770_soc_info = {
        .needs_dev_clk = false,
        .has_osd = true,
        .map_noncoherent = true,
+       .has_pcfg = false,
+       .has_recover = true,
+       .has_rgbc = true,
        .max_width = 1280,
        .max_height = 720,
        .formats_f1 = jz4770_formats_f1,
@@ -1518,6 +1549,9 @@ static const struct jz_soc_info jz4780_soc_info = {
        .needs_dev_clk = true,
        .has_osd = true,
        .has_alpha = true,
+       .has_pcfg = true,
+       .has_recover = true,
+       .has_rgbc = true,
        .use_extended_hwdesc = true,
        .plane_f0_not_working = true,   /* REVISIT */
        .max_width = 4096,
-- 
2.33.0

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