Hi,
Dne sreda, 28. februar 2018 ob 08:34:40 CET je Maxime Ripard napisal(a):
> Hi,
>
> On Tue, Feb 27, 2018 at 11:26:46PM +0100, Jernej Skrabec wrote:
> > Some NM PLLs doesn't work well when their output clock rate is set below
> > certain rate.
> >
> > Add support for that constrain.
> >
> > S
Some NM PLLs doesn't work well when their output clock rate is set below
certain rate.
Add support for that constrain.
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu_nm.c | 11 +++
drivers/clk/sunxi-ng/ccu_nm.h | 27 +++
2 files changed, 34 insertions
Hi,
On Tue, Feb 27, 2018 at 11:26:46PM +0100, Jernej Skrabec wrote:
> Some NM PLLs doesn't work well when their output clock rate is set below
> certain rate.
>
> Add support for that constrain.
>
> Signed-off-by: Jernej Skrabec
> ---
> drivers/clk/sunxi-ng/ccu_nm.c | 11 +++
> drivers