From: Paul Boddie <p...@boddie.org.uk>

We need to hook up
* HDMI connector
* HDMI power regulator
* JZ4780_CLK_HDMI @ 27 MHz
* DDC pinmux
* HDMI and LCDC endpoint connections

Signed-off-by: Paul Boddie <p...@boddie.org.uk>
Signed-off-by: H. Nikolaus Schaller <h...@goldelico.com>
---
 arch/mips/boot/dts/ingenic/ci20.dts | 83 +++++++++++++++++++++++++++--
 1 file changed, 80 insertions(+), 3 deletions(-)

diff --git a/arch/mips/boot/dts/ingenic/ci20.dts 
b/arch/mips/boot/dts/ingenic/ci20.dts
index b249a4f0f6b62..15cf03670693f 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -78,6 +78,18 @@ eth0_power: fixedregulator@0 {
                enable-active-high;
        };
 
+       hdmi_out: connector {
+               compatible = "hdmi-connector";
+               label = "HDMI OUT";
+               type = "a";
+
+               port {
+                       hdmi_con: endpoint {
+                               remote-endpoint = <&dw_hdmi_out>;
+                       };
+               };
+       };
+
        ir: ir {
                compatible = "gpio-ir-receiver";
                gpios = <&gpe 3 GPIO_ACTIVE_LOW>;
@@ -102,6 +114,17 @@ otg_power: fixedregulator@2 {
                gpio = <&gpf 14 GPIO_ACTIVE_LOW>;
                enable-active-high;
        };
+
+       hdmi_power: fixedregulator@3 {
+               compatible = "regulator-fixed";
+
+               regulator-name = "hdmi_power";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+
+               gpio = <&gpa 25 0>;
+               enable-active-high;
+       };
 };
 
 &ext {
@@ -114,11 +137,13 @@ &cgu {
         * precision.
         */
        assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>,
-                         <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>;
+                         <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>,
+                         <&cgu JZ4780_CLK_HDMI>;
        assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,
                                 <&cgu JZ4780_CLK_MPLL>,
-                                <&cgu JZ4780_CLK_SSIPLL>;
-       assigned-clock-rates = <48000000>, <0>, <54000000>;
+                                <&cgu JZ4780_CLK_SSIPLL>,
+                                <0>;
+       assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>;
 };
 
 &tcu {
@@ -509,6 +534,19 @@ pins_i2c4: i2c4 {
                bias-disable;
        };
 
+       pins_hdmi_ddc: hdmi_ddc {
+               function = "hdmi-ddc";
+               groups = "hdmi-ddc";
+               bias-disable;
+       };
+
+       /* switch to PF25 as gpio driving DDC_SDA low */
+       pins_hdmi_ddc_unwedge: hdmi_ddc {
+               function = "hdmi-ddc";
+               groups = "hdmi-ddc";
+               bias-disable;
+       };
+
        pins_nemc: nemc {
                function = "nemc";
                groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", 
"nemc-frd-fwe";
@@ -539,3 +577,42 @@ pins_mmc1: mmc1 {
                bias-disable;
        };
 };
+
+&hdmi {
+       status = "okay";
+
+       pinctrl-names = "default", "unwedge";
+       pinctrl-0 = <&pins_hdmi_ddc>;
+       pinctrl-1 = <&pins_hdmi_ddc_unwedge>;
+
+       hdmi-5v-supply = <&hdmi_power>;
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+                       dw_hdmi_in: endpoint {
+                               remote-endpoint = <&lcd_out>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+                       dw_hdmi_out: endpoint {
+                               remote-endpoint = <&hdmi_con>;
+                       };
+               };
+       };
+};
+
+&lcdc0 {
+       status = "okay";
+
+       port {
+               lcd_out: endpoint {
+                       remote-endpoint = <&dw_hdmi_in>;
+               };
+       };
+};
-- 
2.33.0

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