In FRL mode, the Scrambling is always enabled by the HW.
The High TMDS Char Rate and Scrambing Enable bit of
reg TRANS_DDI_FUNC_CTRL are only set in TMDS mode and not
in FRL mode.
Signed-off-by: Ankit Nautiyal <ankit.k.nauti...@intel.com>
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 1dd0b0f2e2f1..1eadf77dc819 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2292,7 +2292,13 @@ int intel_hdmi_compute_config(struct intel_encoder
*encoder,
pipe_config->lane_count = 4;
- if (scdc->scrambling.supported && DISPLAY_VER(dev_priv) >= 10) {
+ /*
+ * Enable scrambing for only for TMDS mode.
+ * For FRL mode, scrambling is always enabled by HW, and
+ * scrambling enable and high tmds clock bits are not used.
+ */
+ if (scdc->scrambling.supported && DISPLAY_VER(dev_priv) >= 10 &&
+ !pipe_config->frl.enable) {
if (scdc->scrambling.low_rates)
pipe_config->hdmi_scrambling = true;
--
2.25.1
