On 1/18/13 11:58 AM, "Gert-Jan Roskam" wrote:
>
>We have a design with an intel 82576, this chip should be able to
>generate a hardware 1pps signal on SDP0.
>I have studied the igb driver, but there's no support for this in the
>drivers.
>The ixgbe driver can do this, and I can understand from th
We have a design with an intel 82576, this chip should be able to
generate a hardware 1pps signal on SDP0.
I have studied the igb driver, but there's no support for this in the
drivers.
The ixgbe driver can do this, and I can understand from the driver how
this is done. This method is not useab
This topic came up before when Khalid posted a similar patch -
https://lkml.org/lkml/2012/6/6/278. I don't know that consensus was ever
reached but the thread does present a lot of opinions and experiences in
this area so probably worth reading/noting.
Myron
On Fri, Jan 18, 2013 at 9:16 AM, Don
On 01/18/2013 06:42 AM, Konstantin Khlebnikov wrote:
> comment in commit b566a22c23327f18ce941ffad0ca907e50a53d41
> ("PCI: disable Bus Master on PCI device shutdown") says:
>
> | Disable Bus Master bit on the device in pci_device_shutdown() to ensure PCI
> | devices do not continue to DMA data afte
From: Bjorn Helgaas
Use the standard #defines for PCIe Capability ASPM fields.
Previously we used PCIE_LINK_STATE_L0S and PCIE_LINK_STATE_L1 directly, but
these are defined for the Linux ASPM interfaces, e.g.,
pci_disable_link_state(), and only coincidentally match the actual register
bits. PCI
__e1000_shutdown() calls pci_disable_device() at the end, thus __e1000_resume()
should call pci_enable_device_mem() to keep enable counter in balance.
Bug was introduced in commit 23606cf5d1192c2b17912cb2ef6e62f9b11de133
("e1000e / PCI / PM: Add basic runtime PM support (rev. 4)") in v2.6.35
Sign
This patch adds single WARN_ONCE() check for catching 'enable_cnt' imbalances.
Signed-off-by: Konstantin Khlebnikov
Cc: linux-...@vger.kernel.org
Cc: Bjorn Helgaas
---
drivers/pci/pci.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 5cb5820
Bug was introduced in commit 23606cf5d1192c2b17912cb2ef6e62f9b11de133
("e1000e / PCI / PM: Add basic runtime PM support (rev. 4)") in v2.6.35
Signed-off-by: Konstantin Khlebnikov
Cc: e1000-devel@lists.sourceforge.net
Cc: Jeff Kirsher
Cc: Bruce Allan
---
drivers/net/ethernet/intel/e1000e/netdev
comment in commit b566a22c23327f18ce941ffad0ca907e50a53d41
("PCI: disable Bus Master on PCI device shutdown") says:
| Disable Bus Master bit on the device in pci_device_shutdown() to ensure PCI
| devices do not continue to DMA data after shutdown. This can cause memory
| corruption in case of a k
This patchset contains some fixes for e1000e diver (broken since v2.6.35)
and some related fixes for PCI code (more fresh bugs).
Last patch adds simple debug for catching device-enable-cointer underflows.
All together this fixes my regression report for v3.8-rc1:
https://lkml.org/lkml/2013/1/1/25
This patch effectively reverts commit 42eca2302146fed51335b95128e949ee6f54478f
("PCI: Don't touch card regs after runtime suspend D3")
| This patch checks whether the pci state is saved and doesn't attempt to hit
| any registers after that point if it is.
This seems completely wrong. Yes, PCI con
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