Thank you for your reply.
First, please forgive my poor understanding and poor English.
According to device driver source code, DCA seems a component of I/OAT
QuickData Technology.
and It seems work on DCA. so, DCA should be enabled. Is it right?
I'm not sure about relationship between DCA
I've also disabled two of BIOS option.
that are adjacent cache line prefetcher and hardware prefetch queue.
What's wrong with me?
and I'd like to know what is the best way to know that feature is
working properly.
thanks a lot.
Best Regards.
Rich wrote:
Hi there.
I'm evaluating DCA feature
Hi there.
I'm evaluating DCA feature of 82598EB 10G NIC.
But It seems not work properly, I think.
Please, help me out.
FYI, My configuration work flows are like below.
1. First, my evaluation system consist of
Intel S5000PSL STAT mainboard
Intel Quad-Core Xeon processor * 2
Intel 10G XF
First, thank you for your concern.
Is it true that only I/OAT Enabling in BIOS can enable DCA feature?
After I read your reply, I tried insmod ioatdma.ko, of cause I've
enabled I/OAT in BIOS.
but dmesg is like below. Please check this out.
--
[ 484.797798] dca service started,
HI there.
As you maybe know, I've evaluated RSS feature of Intel 82598EB AF 10G
Interface.
and I got satisfactory result. (I'd like to thanks some of you helped me.)
At this time, I have to another important feature of the Intel NIC. That
is DCA(Direct Cache Access).
But, It request supporting
Brandeburg, Jesse 쓴 글:
On Wed, 1 Jul 2009, 배영부 wrote:
I'm still evaluating RSS feature of Intel 82598EB AF 10G ethernet card.
I think this is my last problem.
that is computed hash value of NIC.
Before the evaluation, I wrote a simulation code to simulate ComputeHash
function according
Hi there,
I'm still evaluating RSS feature of Intel 82598EB AF 10G ethernet card.
I think this is my last problem.
that is computed hash value of NIC.
Before the evaluation, I wrote a simulation code to simulate ComputeHash
function according to datasheet.
and I checked it by RSS verification
there is a problem that is every RX queue index number is
different with entry value of indirection table.
I'm investigating the reason.
Thanks.
배영부 쓴 글:
Hi there.
I'm evaluating RSS(Receive-Side Scaling) feature of Intel 82598EB NIC.
I'm evaluating it with two of Quad core Xeon CPUs - as a result
Hi there.
I'm evaluating RSS(Receive-Side Scaling) feature of Intel 82598EB NIC.
I'm evaluating it with two of Quad core Xeon CPUs - as a result, there
are 4 cpu cores - and ixgbe device driver
version 1.3.56. (Yes, I know that there is newest version 2.0.34.3.)
If you know about RSS, then you
Hi there,
According to Intel 82598EB datasheet,
RSS is a mechanism to post each received packet into one of several
descriptor queues.
but there isn't any description about algorithm to select descriptor queue.
I'm inspecting about it. But, I can't find what is it, even digging into
ixgbe
table entry value and rx qeueu index.
I mean if source and destination IP address is the same, posting rx
queue have to be fixed.
Thank you.
Best regards.
Brandeburg, Jesse 쓴 글:
http://msdn.microsoft.com/en-us/library/ms795616.aspx
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From: 배영부 [mailto:r
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