Now that GenFw honors the ELF section alignment when placing the
PE/COFF sections in the output, the start of the PE/COFF version of
.data will be aligned to the alignment of .text if its alignment is
higher than the default. So duplicate this behavior in the ELF output,
this will make the memory
Move to the parametrised generic GCC linker script and set 64 KB
alignment, instead of using the AARCH64 specific incremental linker
script for 64 KB alignment which is about to be removed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Move to the parametrised generic GCC linker script and set 64 KB
alignment, instead of using the AARCH64 specific incremental linker
script for 64 KB alignment which is about to be removed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
The .rodata ELF section contains constant non-executable data that
should never be modified by the program itself. Since the risk of
inadvertent modification is typically higher than the risk of
inadvertent execution, it makes sense to put this data in the
R-X .text section rather than in the RW-
Move the .got contents to the PE/COFF .text section. This should be
a no-op, since we typically don't generate position independent code
(i.e., using -fPIC). But since the GOT contains variable addresses that
are updated at relocation time only, its contents are best kept in .text
to prevent them
Remove obsolete ARM and AARCH64 platforms so the maintainers can
focus on the ones that are still supported, which are:
- TC2 (ArmVExpress-CTA15-A7.dsc)
- Foundation model and Fast model emulators (ArmVExpress-FVP-AArch64.dsc)
- Juno (ArmJunoPkg/ArmJuno.dsc)
- Cortex-A15 MPcore RTSM
On 2015-07-28 10:51:38, Leif Lindholm wrote:
Hi Jordan,
Sorry, (metaphorically) snowed under for a few days.
On Fri, Jul 17, 2015 at 02:44:10PM -0700, Jordan Justen wrote:
Does this depend on ArmPkg / EmbeddedPkg, or is this just a generic
PCI based driver?
It could be nice
On 2015-07-29 08:11:59, Ard Biesheuvel wrote:
Move to the parametrised generic GCC linker script and set 64 KB
alignment, instead of using the AARCH64 specific incremental linker
script for 64 KB alignment which is about to be removed.
Contributed-under: TianoCore Contribution Agreement 1.0
Password:
edk2efiacpidump
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Andrew
Fish
Sent: Wednesday, July 29, 2015 1:50 PM
To: Smith, Jonathan D
Cc: edk2-devel@lists.01.org
Subject: Re: [edk2] efi acpidump port
On Jul 29, 2015, at 1:43 PM,
On Jul 29, 2015, at 1:43 PM, Smith, Jonathan D jonathan.d.sm...@intel.com
wrote:
Attaching a zip of the files
Looks like you need to rename the inf, or add a password to the Zip.
cat 0_Warning.txt
BLOCKED FILE ALERTA file has been blocked due to the 'Intel Email File
Filtering Policy'
Subject prefix: BaseTools/X86|IA32 = BaseTools IA32/X64
What about 1 more step? :)
This change starts to make use of the -z common-page-size and
--defsym=PECOFF_HEADER_SIZE params, but the description says 'move to
unified script'.
So, how about first modifying the gcc*-ld-script files to use
On 2015-07-29 16:27:38, Andrew Fish wrote:
On Jul 29, 2015, at 4:11 PM, Jordan Justen jordan.l.jus...@intel.com
wrote:
On 2015-07-29 13:43:43, Smith, Jonathan D wrote:
Attaching a zip of the files
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org
On 2015-07-29 13:43:43, Smith, Jonathan D wrote:
Attaching a zip of the files
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Smith,
Jonathan D
Sent: Wednesday, July 29, 2015 1:37 PM
To: 'Andrew Fish'; 'edk2-devel@lists.01.org'
Subject:
On Jul 29, 2015, at 4:11 PM, Jordan Justen jordan.l.jus...@intel.com wrote:
On 2015-07-29 13:43:43, Smith, Jonathan D wrote:
Attaching a zip of the files
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org
mailto:edk2-devel-boun...@lists.01.org] On
According to the PCI spec, when software writes all-one to BAR for size probing,
the value read back should be 0b1...10...0 after masking the BAR type bits.
But in real world, it's possible that certain device returns 0b0...01...10...0
for MEM64 BAR size probing: some bits in the high 32bit may be
Reviewed-by: Ruiyu Ni ruiyu...@intel.com
-Original Message-
From: Dong, Eric
Sent: Wednesday, July 29, 2015 4:59 PM
To: Ni, Ruiyu ruiyu...@intel.com; Gao, Liming liming@intel.com;
edk2-devel@lists.01.org
Subject: [Patch 0/2] Update License Header to use BSD License
Some code
Reviewed-by: Ruiyu Ni ruiyu...@intel.com
Thanks a lot for filling the gap after new BDS driver is added.
-Original Message-
From: Dong, Eric
Sent: Wednesday, July 29, 2015 4:26 PM
To: Ni, Ruiyu ruiyu...@intel.com; Gao, Liming liming@intel.com;
edk2-devel@lists.01.org
Subject:
On Wed, 2015-07-29 at 16:26 +0800, Eric Dong wrote:
After new BdsDxe driver checked in at MdeModulePkg/Universal/BdsDxe, it does
not have an
UI part code to cowork with this new bds code. Now this UiApp and
LegacyBootMaintUiLib is
develop to meet this requirement.
We split the
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong eric.d...@intel.com
---
.../Include/Guid/HiiBootMaintenanceFormset.h | 28 ++
1 file changed, 12 insertions(+), 16 deletions(-)
diff --git
Some code error used intel license, this patch update it to use BSD license.
Eric Dong (2):
Update copyright info, use BDS license.
Update copyright info, use BDS license.
.../LegacyBootMaintUiLib/LegacyBootMaintUi.c | 19 +++---
.../LegacyBootMaintUiLib/LegacyBootMaintUi.h
Reviewed-by: Eric Dong eric.d...@intel.com
-Original Message-
From: Ni, Ruiyu
Sent: Thursday, July 30, 2015 11:11 AM
To: edk2-devel@lists.01.org
Cc: Ni, Ruiyu; Dong, Eric
Subject: [Patch] MdeModulePkg: Enhance PciBusDxe to handle high 32bit of MEM64
BAR returns 0
According to the PCI
Jordan:
I have verified 4K aligned image build.
Test-by: Liming Gao liming.gao@intel
Thanks
Liming
-Original Message-
From: Justen, Jordan L
Sent: Thursday, July 30, 2015 5:16 AM
To: Ard Biesheuvel; edk2-devel@lists.01.org; Liu, Yingke D; Gao, Liming
Cc: ler...@redhat.com;
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