On 05/03/2018 07:44 AM, Ard Biesheuvel wrote:
(add some potentially interested parties to cc)
On 3 May 2018 at 11:24, Alexei Fedorov wrote:
From: Alexei Fedorov
UEFI build fails for ArmVExpress-FVP-AArch64 when using
"-D ARM_FVP_RUN_NORFLASH" build option, which prevents
EDK2_SKIP_PEICORE ma
On 08/29/2017 12:27 PM, Ard Biesheuvel wrote:
Use the proposed BaseTools support for device tree compilation to
build the device tree binary from source at build time. Give it its
own .inf and a build rule so the tools take care of everything.
Contributed-under: TianoCore Contribution Agreement
On 08/21/2017 10:12 AM, Leif Lindholm wrote:
On Sun, Aug 20, 2017 at 03:33:32PM -0400, Alan Ott wrote:
Without the PCD for the second SATA Controller being specified, the boot
will hang. These patches fix it.
Given Ard's RB, I'm happy for this to go in.
However, would you b
The previous implementation used only the lower bits for both the first
and second SATA controller, when the upper bits should have been used for
the second SATA controller.
Also ASSERT that SataChPerSerdes is 2, because the even/odd logic doesn't
work if it's not.
Signed-off-by
The comment indicating that only the first SATA controller is operational
on SoftIron-branded OverDrive 3000 boards is incorrect. Re-enable the
second SATA controller.
Signed-off-by: Alan Ott
Contributed-under: TianoCore Contribution Agreement 1.0
---
Platform/AMD/OverdriveBoard
Without the PCD for the second SATA Controller being specified, the boot
will hang. These patches fix it.
Alan Ott (3):
Silicon/AMD/Styx: Make PcdSataPortMode 32 bits
Silicon/AMD/Styx: Use PcdSataPortMode properly for two controllers
Platform/AMD/OverdriveBoard: Re-enable the second SATA
Extra bits are needed to accomodate all 14 SATA ports
Signed-off-by: Alan Ott
Contributed-under: TianoCore Contribution Agreement 1.0
---
Silicon/AMD/Styx/AmdStyx.dec | 2 +-
Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c | 4 ++--
2 files changed
On 08/20/2017 01:46 PM, Ard Biesheuvel wrote:
On 19 August 2017 at 22:41, Alan Ott wrote:
Extra bits are needed to accomodate all 14 SATA ports
Signed-off-by: Alan Ott
Contributed-under: TianoCore Contribution Agreement 1.0
---
Silicon/AMD/Styx/AmdStyx.dec
The comment indicating that only the first SATA controller is operational
on SoftIron-branded OverDrive 3000 boards is incorrect. Re-enable the
second SATA controller.
Signed-off-by: Alan Ott
Contributed-under: TianoCore Contribution Agreement 1.0
---
Platform/AMD/OverdriveBoard
Extra bits are needed to accomodate all 14 SATA ports
Signed-off-by: Alan Ott
Contributed-under: TianoCore Contribution Agreement 1.0
---
Silicon/AMD/Styx/AmdStyx.dec | 2 +-
Silicon/AMD/Styx/Drivers/StyxSataPlatformDxe/InitController.c | 4 ++--
2 files changed
Without the PCD for the second SATA Controller being specified, the boot
will hang. These patches fix it.
Alan Ott (2):
Silicon/AMD/Styx: Make PcdSataPortMode 32 bits
Platform/AMD/OverdriveBoard: Re-enable the second SATA Controller
Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
On 08/19/2017 06:37 AM, Leif Lindholm wrote:
(Adding linaro-uefi, since this is not official tooling.)
Ok, no problem.
On Fri, Aug 18, 2017 at 07:29:59PM -0400, Alan Ott wrote:
---
edk2-build.sh | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/edk2-build.sh b
---
edk2-build.sh | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/edk2-build.sh b/edk2-build.sh
index 60da4df..fb0cb84 100755
--- a/edk2-build.sh
+++ b/edk2-build.sh
@@ -73,11 +73,13 @@ function do_build
import_openssl
fi
- set_cross_compile
Hi all,
I'm interested in the status of the Marvell Yukon driver mentioned in
this thread:
http://thread.gmane.org/gmane.comp.bios.tianocore.devel/17544/focus=697
It looks like Leif Lindholm expressed an interest in getting it into his
OpenPlatformPkg, but I don't see any evidence of this driver
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