RE: PCB floating area layout

2002-02-26 Thread Robert Wilson
: February 25, 2002 4:14 PM To: Robert Wilson; emc-p...@majordomo.ieee.org Subject: RE: PCB floating area layout Jeeez, I have just the opposite problem GROUNDING a PCB at a certain location. The device is a metal enclosed digital device, about the size of a video cassett tape. Its

RE: PCB floating area layout

2002-02-26 Thread Gary McInturff
PM To: emc-p...@majordomo.ieee.org Subject: RE: PCB floating area layout Floating grounds on PCBs tend to be problematic, especially at high frequencies. Minimizing the effective capacitive reactance between the floating ground and the real ground will ensure that the floating ground is AC Cold

RE: PCB floating area layout

2002-02-26 Thread richwoods
One of the major causes of emissions can be excessive loop areas caused by a long return path for signal currents due to the division of the ground plane. Review the ground return path for signal lines that bridge the gaps. Ideally, the signal return path on the ground plane should be directly

RE: PCB floating area layout

2002-02-25 Thread Robert Wilson
Floating grounds on PCBs tend to be problematic, especially at high frequencies. Minimizing the effective capacitive reactance between the floating ground and the real ground will ensure that the floating ground is AC Cold. I don't just mean bypassing it with (say) a few thousand uF of

Re: PCB floating area layout

2002-02-25 Thread John Woodgate
I read in !emc-pstc that Paolo Peruzzi paolo.peru...@esaote.com wrote (in ofe539db9f.cfbf2fae-onc1256b6b.004b1...@esaote.com) about 'PCB floating area layout', on Mon, 25 Feb 2002: 1) Is it best to minimize the HF capacitive coupling between the earthed ground and the floating ground or to