Are you able to share a core dump with us to be able to see where it's
crashing? It looks like if you do `ulimit -c unlimited` in your shell
before running flashrom, you should get a core dump in `/cores/core.PID`
(where PID is the PID of the flashrom process) when it crashes. If you can
share that
Hi everyone,
As was described in the release notes for version 1.4, I plan to remove the
Makefile soon and make Meson the only supported buildsystem for flashrom:
the proposed change is https://review.coreboot.org/c/flashrom/+/83673
If you haven't tried using meson before, now would be a good tim
I would expect this system should already work, since ChromeOS uses
flashrom itself. Have you tried it? If it failed, what did it say?
On Tue, Jul 2, 2024 at 11:02 PM Jason Whitaker
wrote:
> Unsure of board URL, this is an Asus Chromebox for Google Meet:
>
> https://www.asus.com/displays-desktop
I found this patch by searching gerrit for the part number:
https://review.coreboot.org/c/flashrom/+/58025
On Tue, Apr 30, 2024 at 6:54 PM Munduru, Avinash via flashrom <
flashrom@flashrom.org> wrote:
> [AMD Official Use Only - General]
>
> + attaching the output log
>
> -
For completeness, the proposed change is at
https://review.coreboot.org/c/flashrom/+/81545
I've tested it myself (and added a unit test) and am fairly confident
everything works well, but if anybody has a "weirder" machine than an x86
PC to test on, additional coverage would be helpful.
On Fri, A
ardware tech with 40 yrs experience, so no issue. Just
> unfamiliar with ChromeOS.
> Need to remove the board. But it's the only IT platform I have.
> Learned ChromeOS, Time to go back to linux.
>
>
> On Thu, 10 Aug 2023 at 13:01, Peter Marheine
> wrote:
>
>>
> Note: hardware status register protection is enabled. The chip's WP# pin
must be set to an inactive voltage level to be able to change the WP
settings.
You need to disable hardware write protect:
https://chromium.googlesource.com/chromiumos/docs/+/master/write_protection.md
On Tue, Aug 8, 2023
Please refer attached, chip is Winbond 25Q80BVNIG
flashrom v1.2 on Linux 5.10.0-15-amd64 (x86_64)
flashrom is free software, get the source code at https://flashrom.org
flashrom was built with libpci 3.6.4, GCC 9.2.1 20200224, little endian
Command line (6 args): flashrom -p ch341a_spi -f -w
/me
autoconf hassle)
Peter
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sh proms
other than reprogramming boards with the supplied software.
Thanks for any response.
Kind regards,
Peter Cost
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an two branches where
the purpose of one is to be blindly merged into another.
--
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Hi David,
On Tue, Nov 08, 2016 at 11:22:56AM -0800, David Hendricks wrote:
> Hi Peter,
> Thanks for the patch! However, I suspect this will not be accepted
> since the size check is an important safety measure for the general
> use case.
>
> In general layout files should be
Flashrom restricts an image size to be equal to a ROM capacity. This is
inconvenient in case of large and slow ROM chips, when only part of the ROM
should be updated. This patch removes this restriction in a quick-and-dirty
manner.
Signed-off-by: Peter Mamonov
---
flashrom.c | 26
,
-
Peter Ma | email: peter...@intel.com
Senior Design Engineer | tel: +1 (604) 742 5778
Intel of Canada, Ltd. | fax: +1 (604) 639 1185
#688 - 1333 West Broadway, Vancouver, BC, Canada, V6H 4C1
-Original Message-
From: Stefan Tauner [mailto:stefan.tau
sted (see the man page for details), and mention
which mainboard or programmer you tested in the subject line.
Thanks for your help!
No operations were specified.
Regards,
-----
Peter Ma | email: peter...@intel.com
Senior Design Engi
,
-
Peter Ma | email: peter...@intel.com
Senior Design Engineer | tel: +1 (604) 742 5778
Intel of Canada, Ltd. | fax: +1 (604) 639 1185
#688 – 1333 West Broadway, Vancouver, BC, Canada, V6H 4C1
-Original Message
PGA
bitstreams, etc.
Regards,
-----
Peter Ma | email: peter...@intel.com
Senior Design Engineer | tel: +1 (604) 742 5778
Intel of Canada, Ltd. | fax: +1 (604) 639 1185
#688 – 1333 West Broadway, Vancouver, BC, Canada, V6H
PI chip (RDID), 0 kB: probe_spi_rdid_generic: id1
0x20, id2 0xba15
Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xff,
id2 0xff
Found Unknown flash chip "SFDP-capable chip" (2048 kB, SPI).
No operations were specified.
Regards,
----
anges definitely work, I've test this multiple times on multiple
boards.
Let me know if you want the source
Regards
Peter Hall
Software Development Manager
Raster Vision Ltd. Tel: 01892 78 / +44 1892 78. www.rvl.co.uk
<http://www.rvl.co.uk/>
Raster Vision Ltd is a co
eport
back; I'd love to see this support main-lined.
Peter
On Tue, Apr 5, 2016 at 3:18 AM, Tim Chick wrote:
> Hi David,
>
>
>
> There was a mistake in the logic, which I have corrected.
>
>
>
> I was also asked by someone else on the list if it worked with the
&g
e have something really working. :)
Sorry for bringing up this again but what's the status of this? It
does works on old PPC-based Apple Macs and it still applies cleanly.
Maybe it's time to apply this, otherwise we won't see any potential
users ve
On Tue, Sep 15, 2015 at 3:12 AM, Stefan Tauner <
stefan.tau...@alumni.tuwien.ac.at> wrote:
> On Tue, 15 Sep 2015 02:26:39 -0400
> Peter Martini wrote:
>
> > Hello,
> >
> > I've checked out master from the flashrom svn repo, compiled, and was
> able
some activity around this from January, from this link
http://patchwork.coreboot.org/patch/4272/, but I'm not sure where that
ended up).
Thanks!
Peter
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Hi,
here's the requested flashrom output.
--
Regards,
Peter
flashrom v0.9.8-r1888 on Linux 4.1.2-2-ARCH (x86_64)
flashrom is free software, get the source code at http://www.flashrom.org
flashrom was built with libpci 3.3.0, GCC 4.9.2 20150204 (prerelease), little
endian
Command line (3
=1
Running OPCODE 0x03 failed at address 0x003000 (payload length was 64).
Read operation failed!
FAILED.
Restoring MMIO space at 0x7f3972d958a0
Restoring PCI config space for 00:1f:0 reg 0xdc
--
Peter Eckersleyp...@eff.org
Technology Projects Director Tel +1 415 436
http://forum.ru-board.com/topic.cgi?forum=5&topic=32855&start=8180
> Флешки пробывал 32PLCC, вставлял SST 39SF020A и PMC Pm49FL002T - no
> found.Спасибо
So what's your question/inquiry exactly? Also you should attach
flashrom logs for further investigat
--
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Stefan Tauner wrote:
> Heavily influenced by a discussion with (and based on code from) Peter Stuge.
> ---
> Peter Stuge argued all evening with me that the mandatory -p parameter
> is a regression and should be fixed, because the common case is -p internal
> and that was the def
hardware+firmware design, but so far I haven't
made it beyond the USB protocol. http://git.stuge.se/?p=qiprog.git
//Peter
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ult to access the
on-board flash chip in Windows than in Linux.
> I have been successfully flashed BIOS in CentOS environment on the
> same machine by running ./flashrom -w coreboot.rom.
Maybe you can boot a Linux live-CD, or use that CentOS environment,
to flash again?
Kind rega
werbook G4
and it does read firmware. Didn't try writing so far though.
--
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hear that it works for you!
>
> Thanks a lot for your help. :)
You're welcome, but thank Sven instead, he did the port and pointed
out the flashrom trick! :)
//Peter
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y have worn out.
> 1) booting Linux from USB stick takes for ever. (loading kernel and
> initrd takes >10 minutes). However, USB performance is fine when
> booted from hard drive.
This is a SeaBIOS issue. Recommend to post about this o
Hi!
Motiejus Jakštys wrote:
> I carefully followed the instructions by Peter Stuge:
> http://comments.gmane.org/gmane.linux.bios/69354
..
> Erasing and writing flash chip... spi_block_erase_20 failed during command
> execution at address 0x0
> Reading current flash chip c
e this
order is likely to reach MOQ. I'm happy to help find the most
appropriate sales channel for anyone interested in contributing to
the project in this way.
> Besides good press coverage and improved reputation
It would of course also buy prominent exposure on printed material
Hello All.
This patch simplifies processor_flash_enable function a bit by simplifying the
structure of the processor_enable.c. At least this patch removes more lines
than introdces w/o sacrificing the simplicity.
Signed-off-by: Peter Lemenkov
---
processor_enable.c | 26
http://gamereviews.co.in/wp-post-thumbnail/02efpk.html";>
http://gamereviews.co.in/wp-post-thumbnail/02efpk.html___
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Hi Stefan,
I can confirm the chip is cFeon EN25Q32A
Güße aus den USA
Peter
On Wed, Feb 22, 2012 at 12:32 PM, Stefan Tauner <
stefan.tau...@student.tuwien.ac.at> wrote:
> On Wed, 22 Feb 2012 08:52:08 -0800
> Peter Van Eenoo wrote:
>
> > Here is the output from -V
>
Here is the output from -V
flashrom v0.9.5-r1504 on Linux 3.2.7-1-ARCH (x86_64), built with libpci
3.1.9, GCC 4.6.2 20120120 (prerelease), little endian
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OS timer resolution is 1 usecs, 2394M loops
back to
the old version with the other board. Otherwise I will back up the BIOS of this
test board by a different SW. By the way, does flashrom support backing up the
BIOS?
I hope you and I will find all necessary information.
Best regards, Peter
-Ursprüngliche Nachricht-
Von: Stefan
Best regards,
Peter
flashrom v0.9.4-r1394 on Linux 3.0.0-14-generic-pae (i686), built with libpci
3.1.7, GCC 4.6.1, little endian
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OS timer resolution is 1 usecs, 37
flashrom problem. We must warn users
> about this for all affected boards, IMO.
-1 here. This isn't a flashing issue - flashrom works exactly as
intended. It's the user's job - to provide proper bios image (with
predefined MAC for example)
--
With best regards, Peter Leme
2011/8/14 Carl-Daniel Hailfinger :
> Hi Peter,
>
> thanks for your patch.
> I think your code looks clean.
> It does not work, though:
Yes, I forgot to add bootstrap script, which regenerates all necessary
files. You may invoke the following sequence of commands or simply run
dress space.
> Looking at the Open Firmware forth code inside Apple's own firmware
> updates also suggests this is the case.
>
> I was able to probe, read, write and erase on both machines. Read
> files seem to contain valid data.
>
> Added support for LH28F0
od
shape for MinGW / BSD / DOS / Darwin users (ARM, MIPS users could be
also hurt as well - that's why I didn't touch anything else in this
commit except adding these two files).
--
With best regards, Peter Lemenkov.
___
flashrom
onfirmed on my Mac Mini G4 - it does work as expected. Thanks for
this amazing hack, Mattias!
--
With best regards, Peter Lemenkov.
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that it's better
not to use it at all - it adds more issues than fixes them. I can say
it for sure because I've got very interesting experience of
maintaining compatibility of CMake-based buildsystem for relatively
large project among three major CMake branches - 2.4, 2.6 and 2.8.
--
With bes
eady have (proven) macros for
endianness detection, cpu and architecture and many other good and
useful stuff.
--
With best regards, Peter Lemenkov.
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igned-off-by: Peter Huewe
---
buspirate_spi.c |2 +-
dmi.c|2 +-
serprog-protocol.txt |2 +-
serprog.c| 10 +-
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/buspirate_spi.c b/buspirate_spi.c
index 3b9f487..f872309 100644
--- a/bus
Original report:
http://www.flashrom.org/pipermail/flashrom/2011-May/006594.html
Manufacturer's page:
http://msi.com/product/mb/G31TM-P21.html
Tested-by: Peter Lemenkov
Signed-off-by: Peter Lemenkov
---
print.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/pr
x27;s a bad idea to use anything else. uint_16t
also fits well for the so far only user of this information; the USB
flashing protocol Stefan and I have worked on.
//Peter
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)
> - trailing space after comment (INTEL_28F002T)
>
> i have made this changes already locally and will commit it, when
> carldani gives his ok to me.
That's nonsense.
> thanks a lot for your work!
> Acked-by: Stefan Tauner
There is si
Steven Zakulec wrote:
> Hi, this is the latest version of the patch, taking into account Peter's
> request to me to change the struct to uint16_t and the values to milliwatts.
> Signed-off-by: Steven Zakulec
Acked-by: Peter Stuge
___
fl
OS. Disabling checks.
Erasing and writing flash chip... Done.
Verifying flash... VERIFIED.
work ~/7529v46:
http://msi.com/product/mb/G31TM-P21.html
--
With best regards, Peter Lemenkov.
# dmidecode 2.11
SMBIOS 2.6 present.
58 structures occupying 2067 bytes.
Table at 0x000FD2B0.
Handle 0x, DMI t
he only promising place) I would be very grateful ...
Regards,
Peter
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ection with
problems involving some well-known system from Redmond ...)
Any ideas?
Regards,
Peter
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Hi,
I have a Asus motherboard (p7p55d-e pro) with (I believe) an onboard Marvell
9120 Sata 3 controller. I also have an add on card Sata controller with a
Marvell 9123 chip. When I updated my firmware, both devices were found and
updated but upon reboot the "on board" Marvell Controller is bric
e email that you replied to in the
headers of the message that you send, which creates confusion and
disorder where these headers are relied upon for displaying emails
grouped by thread; ie. discussion topic, as is the case in numerous
email programs, and web-based mailing list archives.
Than
A second flash chip could be handy for offline mode - but what is
supplying the power?
//Peter
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2011/3/15 Paul Menzel :
> (but (unfortunately ;-)) not all
> people are using Git.)
Fortunately that's the only issue in flashrom :)
--
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http://www.f
flashrom: fix sparse warning: Unknown escape %
This patch fixes wrong escaping of %.
In print.c %%2b is correct instead of \%2b ("%%2b"=%2b=+)
In board_enable.c %d is correct instead of \%d.
Signed-off-by: Peter Huewe
---
board_enable.c |2 +-
print.c|2 +-
2 files
flashrom: fix sparse warning: Using plain integer as NULL pointer
This patch fixes the "using plain integer as NULL pointer" warnings
generated by running sparse on the flashrom source.
Flashrom-Version: r1254
Signed-off-by: Peter Huewe
---
cbtable.c|2 +-
chipset_enabl
Hello All!
--
With best regards, Peter Lemenkov.
MX25L8005_write.log
Description: Binary data
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--- David Hendricks schrieb am Mi, 24.11.2010:
> The "00:19:66:97:d7:e2" you're seeing can be encoded in numerous ways and
> probably omits the ':' character. It may also be in a compressed portion
> of the image.
... actually, I already know the position, where the bios stores the MAC
address
seems to work just
fine after flashing the BIOS with flashrom).
Regards,
Peter
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
flashrom v0.9.2-r1141 on Linux 2.6.32-5-686 (i686), built with libpci 3.1.7,
GCC 4.4.5 20100728 (prerelease), little endian
gt; source code at http://www.flashrom.org
Just FYI - I already uploaded pre-0.9.3 (svn ver. 1205) into
updates-testing. You may upgrade by typing:
$ sudo yum upgrade flashrom --enablerepo updates-testing
--
With best regards, Peter Lemenkov.
___
fla
attached: output of "flashrom -p internal:boardenable=force -V"
On Fri, 15 Oct 2010 14:18:22 +0200, wrote:
> Official latest (non-beta) bios:
> http://dlsvr.asus.com/pub/ASUS/mb/sock478/p4b533/1015.zip
> Board name: P4B533flashrom v0.9.3-r1212 on Linux 2.6.31-20-generic (i686), built with libpci
Signed-off-by: Peter Lemenkov
---
hwaccess.h |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/hwaccess.h b/hwaccess.h
index 63a2bf2..d125890 100644
--- a/hwaccess.h
+++ b/hwaccess.h
@@ -163,8 +163,6 @@ cpu_to_be(64)
#if NEED_PCI == 1
#if defined (__i386__) || defined
timing for the bus
where the chip is connected. You mentioned that there are exceptions,
to that, but I think it'll hold in general. A bridge in a PCI chip
that decodes into ROM may or may not ensure correct timing. I think
it would have to be set on a per-chip basis.
//Peter
___
e are some bus master(s) in between, but
that's generally equivalent to parallel vs. all others.)
//Peter
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.
Signed-off-by: Peter Lemenkov
---
hwaccess.c | 85 +--
1 files changed, 30 insertions(+), 55 deletions(-)
diff --git a/hwaccess.c b/hwaccess.c
index 3a61e60..4e87642 100644
--- a/hwaccess.c
+++ b/hwaccess.c
@@ -29,30 +29,47 @@
#endif
tware, with access to the source code I
was able to program my w25q64 flash chip.
--
Peter JAKAB http://jap.hu/
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2010/9/17 Vladimir 'φ-coder/phcoder' Serbinenko :
> On 09/17/2010 06:40 PM, Peter Lemenkov wrote:
>> 2010/9/17 Vladimir 'φ-coder/phcoder' Serbinenko :
>>
>>> Support for Loongson-2F flashing.
>>>
>> + fclose(cpuinfo);
>&
2010/9/17 Vladimir 'φ-coder/phcoder' Serbinenko :
> Support for Loongson-2F flashing.
+ fclose(cpuinfo);
+ return 0;
Should be "return 1;" here, I suppose.
--
With best regards, Peter Leme
doraproject.org/koji/taskinfo?taskID=2472482
http://koji.fedoraproject.org/koji/taskinfo?taskID=2472484
Signed-off-by: Peter Lemenkov
---
internal.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/internal.c b/internal.c
index 8b19692..497ce6c 100644
--- a/interna
t;> + tmp |= 0x40;
>> + OUTB(tmp, 0xc6f);
>> +
>> + return 0;
>> +}
>> +
> Funny. The 0xc6f access looks very similar to parts of the SB400 chipset
> enable. (Side note: we should ask AMD if the SB400 chipset enable is
> correct.)
>
>
2010/9/15 Peter Lemenkov :
> Great work - now I can see the flashchip. Also, please, sed -i
> s,read_memapped,read_memmapped,g in your patch. See flashrom's log
> attached.
This was only probing and here is a log of successful read attempt (attached).
> Tested-by: Peter Le
lease, sed -i
s,read_memapped,read_memmapped,g in your patch. See flashrom's log
attached.
Tested-by: Peter Lemenkov
--
With best regards, Peter Lemenkov.
flashrom v0.9.2-r1171 on Linux 2.6.18-164.15.1.el5 (i686), built with libpci
2.2.3, GCC 4.1.2 20080704 (Red Hat 4.1.2-48), little end
Thanks!
Nope, I cant look inside.
--
With best regards, Peter Lemenkov.
superiotool r5728
Probing for ALi Super I/O at 0x3f0...
Failed. Returned data: id=0x, rev=0xff
Probing for ALi Super I/O at 0x370...
Failed. Returned data: id=0x, rev=0xff
Probing for Fintek Super I/O at 0x2e...
quot;dmidecode" string in dmi.c with full path to dmidecode
would be a much simpler solution than trying to overcome all these
difficulties, so please disregard this particular patch.
--
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___
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fl
rmine full path to dmidecode it just
fallbacks to the default value.
Tested only on Linux.
Signed-off-by: Peter Lemenkov
---
Makefile |5 -
dmi.c|2 +-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile
index e83fc0b..7919e10 100644
--- a/Make
2010/9/3 repository service :
> Author: hailfinger
> Date: Fri Sep 3 05:35:48 2010
> New Revision: 1150
> URL: http://flashrom.org/trac/coreboot/changeset/1150
URL is definitely wrong. It should point to
http://flashrom.org/trac/flashrom/changeset/1150
--
With best regards, Pe
Hello!
Rev. 946 again. I wonder which distribution still ships such old flashrom.
BTW any ETA about 0.9.3?
--
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gmentation fault
omega1 ~/flashrom:
I'm trying to find the cause of this issue.
--
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Hello Again!
2010/8/20 Peter Lemenkov :
> Hello!
> Just FYI - I fetched latest r1145 and got segfault while running:
Sorry for the noise - I just recompiled all and everthing is OK now.
--
With best regards, Peter Lemenkov.
___
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Signed-off-by: Peter Lemenkov
---
flashchips.h | 200 +-
1 files changed, 100 insertions(+), 100 deletions(-)
diff --git a/flashchips.h b/flashchips.h
index a04edef..2e1b0d7 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -40,16 +40,16
Qing Pei Wang wrote:
> hi,
> it's external flash programmer SF100 and SB700
Same problem both with SF100 and onboard flashing?
That could mean that the flash chip is bad.
//Peter
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e flash chip flashed onboard using flashrom, or externally by
another system?
If onboard, what chip is SPI bus master on the board? Is it the SB700
or some LPC->SPI bridge?
//Peter
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Benjamin, great to meet you during LinuxTag!
I committed the attached patch to flashrom as r1049 - it should make
flashrom warn about larger flash chips when using these cards.
I'm sorry that such a stupid bug in flashrom wasted your time. :\
//Peter
Set maximum flash size for 3Com NI
Signed-off-by: Peter Lemenkov
---
print.c | 36 ++--
1 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/print.c b/print.c
index 4f40f44..bf75990 100644
--- a/print.c
+++ b/print.c
@@ -332,24 +332,24 @@ const struct board_info boards_known
loop... OK.
No coreboot table found.
This chipset supports the following protocols: Non-SPI.
WARNING: No chipset found. Flash detection will most likely fail.
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.
dev ~ #
Signed-off-by: Peter Lem
Signed-off-by: Peter Lemenkov
---
print.c | 36 ++--
1 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/print.c b/print.c
index 4f40f44..a8b7828 100644
--- a/print.c
+++ b/print.c
@@ -332,24 +332,24 @@ const struct board_info boards_known
2010/5/31 Michael Karcher :
> Am Montag, den 31.05.2010, 21:19 +0400 schrieb Peter Lemenkov:
>> > New version of patch attached.
>>
>> Rebased against latest flashrom tree.
>
> Sorry I'm interrupting now. And double sorry for requesting to undo a
> patch I sug
It seems that this board is actually a 'Pro' version. At least it's addressed
as 'Pro'
in the list of boards, which requires board_enable.
Signed-off-by: Peter Lemenkov
---
board_enable.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/board_
Signed-off-by: Peter Lemenkov
---
board_enable.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board_enable.c b/board_enable.c
index 4251601..963bf58 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -1402,12 +1402,12 @@ struct board_pciid_enable
o this page so far.
--
With best regards, Peter Lemenkov.
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ersion upgrade (especially
then no bugs were filed against old version of package).
--
With best regards, Peter Lemenkov.
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XE
inflating: 7642v12/How to flash the BIOS.DOC
Workplace ~/work: cd 7642v12/
Workplace ~/work/7642v12: ../bios_extract/bios_extract A7642AMS.120
Using file "A7642AMS.120" (2048kB)
AMI95 Version : 0800 (03/31/10)
0x1F ( 65536 bytes) -> amiboot.ro
date to r930.
I'll update flashrom in Fedora / EPEL asap (until ~16.00 UTS today).
--
With best regards, Peter Lemenkov.
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typo in the previous patch, so this is a fixed one.
Signed-off-by: Peter Lemenkov
---
board_enable.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/board_enable.c b/board_enable.c
index d28490c..e1ad100 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -1285,7 +1
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