On 2021-05-21 14:57, Stephen Boyd wrote:
Quoting Stephen Boyd (2021-05-07 14:25:02)
Here's a few patches that simplify the aux handling code and bubble up
timeouts and nacks to the upper DRM layers. The goal is to get DRM to
know that the other side isn't there or that there's been a timeout,
Quoting Lee Jones (2021-05-20 05:02:37)
> Fixes the following W=1 kernel build warning(s):
>
> drivers/gpu/drm/msm/dp/dp_catalog.c:206: warning: Function parameter or
> member 'dp_catalog' not described in 'dp_catalog_aux_reset'
> drivers/gpu/drm/msm/dp/dp_catalog.c:206: warning: Excess
Quoting Doug Anderson (2021-05-21 15:35:33)
> Hi,
>
> On Fri, May 21, 2021 at 3:02 PM Stephen Boyd wrote:
> >
> > Quoting Douglas Anderson (2021-05-21 13:45:50)
> > > Let's use the newly-added nvmem_cell_read_variable_le_u32() to future
> > > proof ourselves a little bit.
> > >
> > >
Hi,
On Fri, May 21, 2021 at 3:02 PM Stephen Boyd wrote:
>
> Quoting Douglas Anderson (2021-05-21 13:45:50)
> > Let's use the newly-added nvmem_cell_read_variable_le_u32() to future
> > proof ourselves a little bit.
> >
> > Signed-off-by: Douglas Anderson
> > ---
> > The patch that this depends
Quoting Douglas Anderson (2021-05-21 13:45:50)
> Let's use the newly-added nvmem_cell_read_variable_le_u32() to future
> proof ourselves a little bit.
>
> Signed-off-by: Douglas Anderson
> ---
> The patch that this depends on is now in mainline so it can be merged
> at will. I'm just sending this
Quoting Stephen Boyd (2021-05-07 14:25:02)
> Here's a few patches that simplify the aux handling code and bubble up
> timeouts and nacks to the upper DRM layers. The goal is to get DRM to
> know that the other side isn't there or that there's been a timeout,
> instead of saying that everything is
On Fri 21 May 15:51 CDT 2021, Stephen Boyd wrote:
> Quoting Bjorn Andersson (2021-05-21 09:00:29)
> > On Fri 21 May 05:27 CDT 2021, Krishna Manikandan wrote:
> > > diff --git
> > > a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
> > >
Quoting Bjorn Andersson (2021-05-21 09:00:29)
> On Fri 21 May 05:27 CDT 2021, Krishna Manikandan wrote:
> > diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
> > b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
> [..]
> > + ports:
> > +$ref:
Quoting Krishna Manikandan (2021-05-21 03:27:23)
> Add YAML schema for the device tree bindings for DSI PHY.
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v1:
>- Merge dsi-phy.yaml and dsi-phy-10nm.yaml (Stephen Boyd)
>- Remove qcom,dsi-phy-regulator-ldo-mode (Stephen Boyd)
>-
Quoting Krishna Manikandan (2021-05-21 03:27:22)
> Add YAML schema for the device tree bindings for DSI
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v1:
> - Separate dsi controller bindings to a separate patch (Stephen Boyd)
> - Merge dsi-common-controller.yaml and
Quoting Krishna Manikandan (2021-05-21 03:27:21)
> MSM Mobile Display Subsystem (MDSS) encapsulates sub-blocks
> like DPU display controller, DSI etc. Add YAML schema
> for DPU device tree bindings.
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v2:
> - Changed dpu to DPU (Sam Ravnborg)
Quoting Krishna Manikandan (2021-05-21 03:27:24)
> Add bindings for Snapdragon DisplayPort controller driver.
>
> Signed-off-by: Chandan Uddaraju
> Signed-off-by: Vara Reddy
> Signed-off-by: Tanmay Shah
> Signed-off-by: Kuogee Hsieh
> Signed-off-by: Krishna Manikandan
>
> Changes in V2:
>
Let's use the newly-added nvmem_cell_read_variable_le_u32() to future
proof ourselves a little bit.
Signed-off-by: Douglas Anderson
---
The patch that this depends on is now in mainline so it can be merged
at will. I'm just sending this as a singleton patch to make it obvious
that there are no
On Fri, 21 May 2021 15:57:24 +0530, Krishna Manikandan wrote:
> Add bindings for Snapdragon DisplayPort controller driver.
>
> Signed-off-by: Chandan Uddaraju
> Signed-off-by: Vara Reddy
> Signed-off-by: Tanmay Shah
> Signed-off-by: Kuogee Hsieh
> Signed-off-by: Krishna Manikandan
>
>
On Fri, May 21, 2021 at 03:57:22PM +0530, Krishna Manikandan wrote:
> Add YAML schema for the device tree bindings for DSI
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v1:
> - Separate dsi controller bindings to a separate patch (Stephen Boyd)
> - Merge
On Fri, 21 May 2021 15:57:23 +0530, Krishna Manikandan wrote:
> Add YAML schema for the device tree bindings for DSI PHY.
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v1:
>- Merge dsi-phy.yaml and dsi-phy-10nm.yaml (Stephen Boyd)
>- Remove qcom,dsi-phy-regulator-ldo-mode
On Fri, 21 May 2021 15:57:21 +0530, Krishna Manikandan wrote:
> MSM Mobile Display Subsystem (MDSS) encapsulates sub-blocks
> like DPU display controller, DSI etc. Add YAML schema
> for DPU device tree bindings.
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v2:
> - Changed dpu to DPU
On Fri 21 May 05:27 CDT 2021, Krishna Manikandan wrote:
> Add bindings for Snapdragon DisplayPort controller driver.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Chandan Uddaraju
> Signed-off-by: Vara Reddy
> Signed-off-by: Tanmay Shah
> Signed-off-by: Kuogee Hsieh
>
On Fri 21 May 05:27 CDT 2021, Krishna Manikandan wrote:
> Add YAML schema for the device tree bindings for DSI PHY.
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v1:
>- Merge dsi-phy.yaml and dsi-phy-10nm.yaml (Stephen Boyd)
>- Remove qcom,dsi-phy-regulator-ldo-mode (Stephen
On Fri 21 May 05:27 CDT 2021, Krishna Manikandan wrote:
> Add YAML schema for the device tree bindings for DSI
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Krishna Manikandan
>
> Changes in v1:
> - Separate dsi controller bindings to a separate patch (Stephen Boyd)
>
On Fri 21 May 11:00 CDT 2021, Bjorn Andersson wrote:
> On Fri 21 May 05:27 CDT 2021, Krishna Manikandan wrote:
> > diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
> > b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
> [..]
> > + ports:
> > +
On Fri 21 May 05:27 CDT 2021, Krishna Manikandan wrote:
> diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
> b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
[..]
> + ports:
> +$ref: /schemas/graph.yaml#/properties/ports
> +
On Fri, May 21, 2021 at 06:19:30PM +0530, Vinod Koul wrote:
> We required a helper to create and set the dsc_dce_header, so add the
> dsc_dce_header and API drm_dsc_dsi_pps_header_init
>
> Signed-off-by: Vinod Koul
> ---
> drivers/gpu/drm/drm_dsc.c | 11 +++
> include/drm/drm_dsc.h
On Fri 21 May 07:49 CDT 2021, Vinod Koul wrote:
> DSC enables streams to be compressed before we send to panel. This
> requires DSC enabled encoder and a panel to be present. So we add this
> information in board DTS and find if DSC can be enabled and the
> parameters required to configure DSC
On Fri, May 21, 2021 at 09:43:59AM +0200, Christian König wrote:
> Am 20.05.21 um 19:08 schrieb Daniel Vetter:
> > [SNIP]
> > > AH! So we are basically telling the fence backend that we have just
> > > missed an event we waited for.
> > >
> > > So what we want to know is how long the frontend
After the call to to_dpu_encoder_phys_cmd() is made,
'cmd_enc' is not used. Where to_dpu_encoder_phys_cmd() is simply replaced with
container_of(x, struct dpu_encoder_phys_cmd, base) by compiler.
So it had better remove W=1 kernel build warning(s):
On Fri, May 21, 2021 at 6:50 AM Vinod Koul wrote:
>
> Display Stream Compression (DSC) compresses the display stream in host which
> is later decoded by panel. This series enables this for Qualcomm msm driver.
> This was tested on Google Pixel3 phone which use LGE SW43408 panel.
>
> The changes
On 21-05-21, 08:18, Rob Herring wrote:
> On Fri, May 21, 2021 at 7:50 AM Vinod Koul wrote:
> >
> > DSC enables streams to be compressed before we send to panel. This
> > requires DSC enabled encoder and a panel to be present. So we add this
> > information in board DTS and find if DSC can be
On Fri, May 21, 2021 at 7:50 AM Vinod Koul wrote:
>
> DSC enables streams to be compressed before we send to panel. This
> requires DSC enabled encoder and a panel to be present. So we add this
> information in board DTS and find if DSC can be enabled and the
> parameters required to configure
When DSC is enabled, we need to pass the DSC parameters to panel driver
as well, so add a dsc parameter in panel and set it when DSC is enabled
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 5 +
include/drm/drm_panel.h| 7 +++
2 files changed, 12
When DSC is enabled, we need to configure DSI registers accordingly and
configure the respective stream compression registers.
Add support to calculate the register setting based on DSC params and
timing information and configure these registers.
Signed-off-by: Vinod Koul
---
For DSC to work we typically need a 2,2,1 configuration. This should
suffice for resolutions upto 4k. For more resolutions like 8k this won't
work.
Furthermore, we can use 1 DSC encoder in lesser resulutions, but that is
not power efficient according to Abhinav, so it is recommended to always
use
When DSC is enabled in DT, we need to configure the encoder for DSC
configuration, calculate DSC parameters for the given timing.
This patch adds that support by adding dpu_encoder_prep_dsc() which is
invoked when DSC is enabled in DT
Signed-off-by: Vinod Koul
---
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc_mode() to detect dsc
enabled and pass this to .setup_intf_cfg()
Signed-off-by: Vinod Koul
---
We cannot enable mode_3d when we are using the DSC. So pass
configuration to detect DSC is enabled and not enable mode_3d
when we are using DSC
We add a helper dpu_encoder_helper_get_dsc_mode() to detect dsc
enabled and pass this to .setup_intf_cfg()
Signed-off-by: Vinod Koul
---
Later gens of hardware have DSC bits moved to hw_ctl, so configure these
bits so that DSC would work there as well
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
This add SDM845 DSC blocks into hw_catalog
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 22 +++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index
This add the bits in RM to enable the DSC blocks
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 32 +
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 1 +
3 files changed, 34 insertions(+)
diff --git
DSC needs some configuration from device tree, add support to read and
store these params and add DSC structures in msm_drv
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 171 +
drivers/gpu/drm/msm/msm_drv.h | 32 ++
2 files changed, 203
In SDM845, DSC can be enabled by writing to pingpong block registers, so
add support for DSC in hw_pp
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14
2 files changed, 46
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/Makefile | 1 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 26 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
In SDM845, DSC can be enabled by writing to pingpong block registers, so
add support for DSC in hw_pp
Signed-off-by: Vinod Koul
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 32 +++
.../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h | 14
2 files changed, 46
DSC needs some configuration from device tree, add support to read and
store these params and add DSC structures in msm_drv
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 170 +
drivers/gpu/drm/msm/msm_drv.h | 32 ++
2 files changed, 202
Display Stream Compression (DSC) is one of the hw blocks in dpu, so add
support by adding hw blocks for DSC
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/msm/Makefile | 1 +
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h| 26 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
DSC enables streams to be compressed before we send to panel. This
requires DSC enabled encoder and a panel to be present. So we add this
information in board DTS and find if DSC can be enabled and the
parameters required to configure DSC are added to binding document along
with example
We required a helper to create and set the dsc_dce_header, so add the
dsc_dce_header and API drm_dsc_dsi_pps_header_init
Signed-off-by: Vinod Koul
---
drivers/gpu/drm/drm_dsc.c | 11 +++
include/drm/drm_dsc.h | 16
2 files changed, 27 insertions(+)
diff --git
Display Stream Compression (DSC) compresses the display stream in host which
is later decoded by panel. This series enables this for Qualcomm msm driver.
This was tested on Google Pixel3 phone which use LGE SW43408 panel.
The changes include adding DT properties for DSC then hardware blocks
MSM Mobile Display Subsystem (MDSS) encapsulates sub-blocks
like DPU display controller, DSI etc. Add YAML schema
for DPU device tree bindings.
Signed-off-by: Krishna Manikandan
Changes in v2:
- Changed dpu to DPU (Sam Ravnborg)
- Fixed indentation issues (Sam Ravnborg)
- Added
Add YAML schema for the device tree bindings for DSI PHY.
Signed-off-by: Krishna Manikandan
Changes in v1:
- Merge dsi-phy.yaml and dsi-phy-10nm.yaml (Stephen Boyd)
- Remove qcom,dsi-phy-regulator-ldo-mode (Stephen Boyd)
- Add clock cells properly (Stephen Boyd)
- Remove unnecessary
Add YAML schema for the device tree bindings for DSI
Signed-off-by: Krishna Manikandan
Changes in v1:
- Separate dsi controller bindings to a separate patch (Stephen Boyd)
- Merge dsi-common-controller.yaml and dsi-controller-main.yaml to
a single file (Stephen Boyd)
- Drop
Add bindings for Snapdragon DisplayPort controller driver.
Signed-off-by: Chandan Uddaraju
Signed-off-by: Vara Reddy
Signed-off-by: Tanmay Shah
Signed-off-by: Kuogee Hsieh
Signed-off-by: Krishna Manikandan
Changes in V2:
-Provide details about sel-gpio
Changes in V4:
-Provide details about
Am 20.05.21 um 19:08 schrieb Daniel Vetter:
[SNIP]
AH! So we are basically telling the fence backend that we have just
missed an event we waited for.
So what we want to know is how long the frontend wanted to wait instead
of how long the backend took for rendering.
tbh I'm not sure the
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