Re: [PATCH 2/3] LoongArch: Fix instruction costs [PR112936]

在 2023/12/14 上午9:16, chenglulu 写道: 在 2023/12/13 下午9:20, Xi Ruoyao 写道: On Wed, 2023-12-13 at 20:22 +0800, chenglulu wrote: 在 2023/12/10 上午1:03, Xi Ruoyao 写道: Replace the instruction costs in loongarch_rtx_cost_data constructor based on micro-benchmark results on LA464 and LA664. This allows

[Bug target/113030] New: ARM32: option parsing for --march= doesn't work for aliases

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113030 Bug ID: 113030 Summary: ARM32: option parsing for --march= doesn't work for aliases Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal

Re: [PATCH] match.pd: Optimize sign-extension followed by truncation [PR113024]

On Thu, 14 Dec 2023, Jakub Jelinek wrote: > Hi! > > While looking at a bitint ICE, I've noticed we don't optimize > in f1 and f5 functions below the 2 casts into just one at GIMPLE, > even when optimize it in convert_to_integer if it appears in the same > stmt. The large match.pd simplification

[Bug target/111591] ppc64be: miscompilation with -mstrict-align / -O3

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111591 Richard Biener changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|---

Re: [PATCH] lower-bitint: Fix .{ADD,SUB,MUL}_OVERFLOW with _BitInt large/huge INTEGER_CST arguments [PR113003]

On Thu, 14 Dec 2023, Jakub Jelinek wrote: > Hi! > > As shown in the testcase, .{ADD,SUB,MUL}_OVERFLOW calls are another > exception to the middle/large/huge _BitInt discovery through SSA_NAMEs > next to stores of INTEGER_CSTs to memory and their conversions to > floating point. > The calls can

Re: [PATCH 5/6] Allow poly_uint64 for group_size args to vector type query routines

On Thu, 14 Dec 2023, Richard Sandiford wrote: > Richard Biener writes: > > The following changes the unsigned group_size argument to a poly_uint64 > > one to avoid too much special-casing in callers for VLA vectors when > > passing down the effective maximum desirable vector size to vector > >

[Bug tree-optimization/109543] Avoid using BLKmode for unions with a non-BLKmode member when possible

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109543 --- Comment #7 from Richard Biener --- Yeah, guess we still have target code doing ABI decisions based on mode ...

[Bug target/111231] armhf: Miscompilation with -O2/-fno-exceptions level (-fno-tree-vectorize is working)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111231 --- Comment #16 from Mathieu Malaterre --- Could someone from the GCC/armhf team please at least 'confirm' this bug report ? Thanks

[Bug c/80130] Wrong diagnostic: dereferencing type-punned pointer

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80130 Sam James changed: What|Removed |Added CC||sjames at gcc dot gnu.org --- Comment #5

[Bug target/111591] ppc64be: miscompilation with -mstrict-align / -O3

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111591 --- Comment #36 from Mathieu Malaterre --- (In reply to Kewen Lin from comment #32) [...] > So IMHO #c1 test case is problematic, hi @Mathieu, could you have a double > check? I vaguely recall crafting this test-case with cvise with gcc-13.

Re: [PATCH] middle-end: Fix up constant handling in emit_conditional_move [PR111260]

On Thu, Dec 14, 2023 at 6:42 PM Andrew Pinski (QUIC) wrote: > > > > -Original Message- > > From: Richard Biener > > Sent: Thursday, December 14, 2023 5:23 AM > > To: Andrew Pinski (QUIC) > > Cc: gcc-patches@gcc.gnu.org > > Subject: Re: [PATCH] middle-end: Fix up constant handling in > >

Re: [PATCH #2/2] strub: sparc64: unbias the stack address [PR112917]

On Thu, Dec 14, 2023 at 10:29 PM Alexandre Oliva wrote: > > > The stack pointer is biased by 2047 bytes on sparc64, so the range it > delimits is way off. Unbias the addresses returned by > __builtin_stack_address (), so that the strub builtins, inlined or > not, can function correctly. I've

Re: [PATCH v4] [tree-optimization/110279] Consider FMA in get_reassociation_width

On Thu, Dec 14, 2023 at 9:55 PM Di Zhao OS wrote: > > > > -Original Message- > > From: Richard Biener > > Sent: Wednesday, December 13, 2023 5:01 PM > > To: Di Zhao OS > > Cc: gcc-patches@gcc.gnu.org > > Subject: Re: [PATCH v4] [tree-optimization/110279] Consider FMA in > >

Re: [PATCH] strub: use opt_for_fn during ipa

On Thu, 14 Dec 2023, Alexandre Oliva wrote: > > Instead of global optimization levels and flags, check per-function > ones. > > Regstrapped on x86_64-linux-gnu, also testing on sparc-solaris2.11.3. > Ok to install? You have to be generally careful when working within IPA with function bodies

Re: [PATCH] strub: avoid lto inlining

On Thu, Dec 14, 2023 at 8:53 PM Alexandre Oliva wrote: > > > The strub builtins are not suited for cross-unit inlining, they should > only be inlined by the builtin expanders, if at all. While testing on > sparc64, it occurred to me that, if libgcc was built with LTO enabled, > lto1 might inline

[Bug rtl-optimization/113029] sel-sched2 ICE in verify_target_availability

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113029 Kewen Lin changed: What|Removed |Added See Also||https://gcc.gnu.org/bugzill

[Bug rtl-optimization/113029] sel-sched2 ICE in verify_target_availability

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113029 --- Comment #2 from Kewen Lin --- I noticed there are some existing PRs (PR107984, PR99328, PR88652, PR84842) on verify_target_availability ICE, and in PR84842 there is a tentative patch, I tried to make it fit with the latest trunk, but this

[Bug target/113009] [14] RISC-V: gcc.c-torture/unsorted/dump-noaddr.c flakey tests

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113009 --- Comment #5 from JuzheZhong --- I don't see this dump FAIL in the trunk now. Could you confirm it ?

[Bug rtl-optimization/113029] sel-sched2 ICE in verify_target_availability

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113029 --- Comment #1 from Andrew Pinski --- Maybe https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84842#c17 patch helps

[Bug rtl-optimization/113029] New: sel-sched2 ICE in verify_target_availability

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113029 Bug ID: 113029 Summary: sel-sched2 ICE in verify_target_availability Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component:

[Bug tree-optimization/112742] missed vectorization with src[a*b+i] where a*b is not int rather than the same precision as size_type

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112742 Andrew Pinski changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |pinskia at gcc dot gnu.org

[Bug c++/113020] Explicit template instantiation of template specialization using a template base class fails after extern template declaration with linker error

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113020 Andrew Pinski changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug c++/104634] Explicit template instantiation does not work when there are multiple partial template specialization using concepts

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104634 Andrew Pinski changed: What|Removed |Added CC||adrian at woeltche dot de --- Comment

[Bug c++/113020] Explicit template instantiation of template specialization using a template base class fails after extern template declaration with linker error

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113020 --- Comment #2 from Andrew Pinski --- The commands needed to get the link error without using cmake: ``` g++ -std=c++20 -c -o main.o main.cpp g++ -std=c++20 -c -o base.o base.cpp g++ -std=c++20 -c -o sub.o sub.cpp g++ -o app main.o base.o

RE: [PATCH v7] libgfortran: Replace mutex with rwlock

On 2023/12/14 20:39, Jakub Jelinek wrote: > On Thu, Dec 14, 2023 at 01:29:01PM +0100, Thomas Schwinge wrote: >>> Sure, I will look into that. >>> >>> BTW, I didn’t have the PowerPC in hands, do you mind granting the access of >>> your >>> test environment to me to help reproduce the issue? >> >>

[Bug c++/113028] GCC diagnostic pop changes errors to warnings

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113028 --- Comment #2 from Andrew Pinski --- Sorry if I was terse. This is exact same issue as reported in PR 111918 and there has been a patch that was posted to fix the issue (though I don't think it has been reviewed yet).

[Bug c++/113028] GCC diagnostic pop changes errors to warnings

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113028 Andrew Pinski changed: What|Removed |Added Resolution|--- |DUPLICATE

[Bug c++/111918] #pragma GCC diagnostic pop does not restore error status of -Wnarrowing

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111918 Andrew Pinski changed: What|Removed |Added CC||dustbingtb at verizon dot net ---

[Bug c++/113028] New: GCC diagnostic pop changes errors to warnings

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113028 Bug ID: 113028 Summary: GCC diagnostic pop changes errors to warnings Product: gcc Version: 10.1.0 Status: UNCONFIRMED Keywords: diagnostic Severity: normal

Re: [PATCH V2] rs6000: Change GPR2 to volatile & non-fixed register for function that does not use TOC [PR110320]

On 12/14/23 9:57 PM, Peter Bergner wrote: > On 7/16/23 10:40 PM, P Jeevitha via Gcc-patches wrote: >> + /* For non PC-relative code, GPR2 is unavailable for register allocation. >> */ >> + if (FIXED_R2 && !rs6000_pcrel_p ()) >> +fixed_regs[2] = 1; [snip] > On a related note, Jeevitha's

Re: [PATCH V2] rs6000: Change GPR2 to volatile & non-fixed register for function that does not use TOC [PR110320]

On 7/16/23 10:40 PM, P Jeevitha via Gcc-patches wrote: > Normally, GPR2 is the TOC pointer and is defined as a fixed and non-volatile > register. However, it can be used as volatile for PCREL addressing. Therefore, > modified r2 to be non-fixed in FIXED_REGISTERS and set it to fixed if it is >

[Bug middle-end/112971] [14] RISC-V rv64gcv_zvl256b vector -O3: internal compiler error: Segmentation fault signal terminated program cc1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112971 --- Comment #20 from JuzheZhong --- Hi, Andrew. I saw this code which seems to cause infinite loop: if (TREE_CODE (arg1) == VECTOR_CST && TREE_CODE (arg2) == VECTOR_CST && known_eq (TYPE_VECTOR_SUBPARTS (TREE_TYPE (arg1)),

[Bug fortran/112873] F2023 degree trig functions

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112873 --- Comment #31 from Jerry DeLisle --- (In reply to anlauf from comment #30) > (In reply to Jerry DeLisle from comment #29) > > Created attachment 56883 [details] > > Updated Descriptions > > > > Fixed a few more things, The return value of

[PATCH] testsuite: Require dfp for pr112943.c

Hi, As Coudert points out, this test fails on darwin as it does not support _Decimal64, so require dfp for it. Pushed as obvious fix. gcc/testsuite/ChangeLog: * gcc.target/i386/pr112943.c: Require dfp. --- gcc/testsuite/gcc.target/i386/pr112943.c | 2 +- 1 file changed, 1

[PATCH] RISC-V: Fix vmerge optimization bug in vec_perm vectorization

This patch fixes the following FAILs in "full coverage" testing: Running target riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m8/--param=riscv-autovec-preference=fixed-vlmax FAIL: gcc.dg/vect/vect-strided-mult-char-ls.c -flto -ffat-lto-objects execution

[Bug middle-end/112824] Stack spills and vector splitting with vector builtins

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112824 --- Comment #10 from GCC Commits --- The master branch has been updated by Hongyu Wang : https://gcc.gnu.org/g:a52940cfee0908aed0d2a674a451f6d9984d commit r14-6575-ga52940cfee0908aed0d2a674a451f6d9984d Author: Hongyu Wang Date: Mon

[PATCH] i386: Allow 64 bit mask register for -mno-evex512

Hi all, There is a recent change in AVX10 documentation which allows 64 bit mask register instructions in AVX10-256, the documentation comes following: Intel Advanced Vector Extensions 10 (Intel AVX10) Architecture Specification https://cdrdv2.intel.com/v1/dl/getContent/784267 The Converged

Re: [PATCH] i386: Sync move_max/store_max with prefer-vector-width [PR112824]

On Thu, Dec 14, 2023 at 3:54 PM Hongyu Wang wrote: > > Hi, > > Currently move_max follows the tuning feature first, but ideally it > should sync with prefer-vector-width when it is explicitly set to keep > vector move and operation with same vector size. > > Bootstrapped/regtested on

Re: Fwd: [PATCH v2] extend.texi: Fix typos in LSX intrinsics

在 2023-12-14四的 20:27 +0800，chenglulu写道： > > > > > > > > 转发的消息 > > > > 主题: > [PATCH v2] extend.texi: Fix typos in LSX intrinsics > > > 日期: > Wed, 13

Re: Re: [PATCH] RISC-V: Add Zvfbfmin extension to the -march= option

2023-12-13 11:55  Palmer Dabbelt wrote: >   >On Tue, 12 Dec 2023 19:24:51 PST (-0800), zengx...@eswincomputing.com wrote: >> This patch would like to add new sub extension (aka Zvfbfmin) to the >> -march= option. It introduces a new data type BF16. >> >> Depending on different usage scenarios,

Re: Re: [PING^1][PATCH] RISC-V: Add Zvfbfmin extension to the -march= option

2023-12-15 09:27  juzhe.zhong wrote: >   >CCing Kito. > >I am sorry I can't review ABI even though it is vector related, this patch >needs kito's review. Thank you for a reminder In fact, in , Palmer Dabbelt has already

Re: [PING^1][PATCH] RISC-V: Add Zvfbfmin extension to the -march= option

CCing Kito. I am sorry I can't review ABI even though it is vector related, this patch needs kito's review. But I will be available on reviewing the following real vector BF16 intrinsic and auto-vectorization support. Thanks. juzhe.zh...@rivai.ai From: Xiao Zeng Date: 2023-12-15 09:22

Re: [PATCH] c++: abi_tag attribute on templates [PR109715]

On 12/14/23 19:59, Patrick Palka wrote: On Thu, 14 Dec 2023, Jason Merrill wrote: On 12/14/23 16:08, Patrick Palka wrote: On Thu, 14 Dec 2023, Jason Merrill wrote: On 12/14/23 14:17, Patrick Palka wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk? Do we

[r14-6559 Regression] FAIL: gcc.dg/guality/pr58791-4.c -Os -DPREVENT_OPTIMIZATION line pr58791-4.c:32 i == 486 on Linux/x86_64

On Linux/x86_64, 8afdbcdd7abe1e3c7a81e07f34c256e7f2dbc652 is the first bad commit commit 8afdbcdd7abe1e3c7a81e07f34c256e7f2dbc652 Author: Di Zhao Date: Fri Dec 15 03:22:32 2023 +0800 Consider fully pipelined FMA in get_reassociation_width caused FAIL: gcc.dg/guality/pr58791-4.c -O2

[PING^1][PATCH] RISC-V: Add Zvfbfmin extension to the -march= option

This patch would like to add new sub extension (aka Zvfbfmin) to the -march= option. It introduces a new data type BF16. Depending on different usage scenarios, the Zvfbfmin extension may depend on 'V' or 'Zve32f'. This patch only implements dependencies in scenario of Embedded Processor. In

Re: [committed] libstdc++: Implement C++23 header [PR107760]

On Thu, Dec 14, 2023 at 6:05 PM Jonathan Wakely wrote: > Tested x86_64-linux. Pushed to trunk. > > -- >8 -- > > This adds the C++23 std::print functions, which use std::format to write > to a FILE stream or std::ostream (defaulting to stdout). > > The new extern symbols are in the libstdc++exp.a

Re: [PATCH] c++: abi_tag attribute on templates [PR109715]

On Thu, 14 Dec 2023, Jason Merrill wrote: > On 12/14/23 16:08, Patrick Palka wrote: > > On Thu, 14 Dec 2023, Jason Merrill wrote: > > > > > On 12/14/23 14:17, Patrick Palka wrote: > > > > Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for > > > > trunk? Do we want to

Re: [PATCH 0/4] v3 of: Option handling: add documentation URLs

Hi David, On Thu, Dec 14, 2023 at 10:01:39AM -0500, David Malcolm wrote: > > Once your patch is in please feel free to sent an email to > > build...@sourceware.org > > https://sourceware.org/mailman/listinfo/buildbot > > And we'll add the above build steps and update the autotools > >

Re: Re: [PATCH] Middle-end: Do not model address cost for SELECT_VL style vectorization

Thanks Richard. Committed. juzhe.zh...@rivai.ai From: Richard Biener Date: 2023-12-14 23:10 To: Juzhe-Zhong CC: gcc-patches; richard.sandiford Subject: Re: [PATCH] Middle-end: Do not model address cost for SELECT_VL style vectorization On Thu, 14 Dec 2023, Juzhe-Zhong wrote: > Follow

[Bug target/112387] RISC-V: failed to SLP INT64 gather load

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112387 --- Comment #5 from GCC Commits --- The master branch has been updated by Pan Li : https://gcc.gnu.org/g:4bfafea6922dffea145d1aa1d5f5fa4814e66173 commit r14-6572-g4bfafea6922dffea145d1aa1d5f5fa4814e66173 Author: Juzhe-Zhong Date: Fri Dec

[Bug c/111153] RISC-V: Incorrect Vector cost model for reduction

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53 --- Comment #8 from GCC Commits --- The master branch has been updated by Pan Li : https://gcc.gnu.org/g:c7ef2189855a8cf12427a778cd5a31d42ddf6260 commit r14-6571-gc7ef2189855a8cf12427a778cd5a31d42ddf6260 Author: Juzhe-Zhong Date: Thu Dec

Re: [PR target/110201] Fix operand types for various scalar crypto insns

On Fri, Dec 15, 2023 at 12:36 AM Jeff Law wrote: > > > > On 12/14/23 02:46, Christoph Müllner wrote: > > On Tue, Jun 20, 2023 at 12:34 AM Jeff Law via Gcc-patches > > wrote: > >> > >> > >> A handful of the scalar crypto instructions are supposed to take a > >> constant integer argument 0..3

[Bug libstdc++/106749] Implement C++23 library features

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106749 Bug 106749 depends on bug 107760, which changed state. Bug 107760 Summary: Implement C++23 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107760 What|Removed |Added

[Bug libstdc++/107760] Implement C++23

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107760 Jonathan Wakely changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[committed] libstdc++: Implement C++23 header [PR107760]

Tested x86_64-linux. Pushed to trunk. -- >8 -- This adds the C++23 std::print functions, which use std::format to write to a FILE stream or std::ostream (defaulting to stdout). The new extern symbols are in the libstdc++exp.a archive, so we aren't committing to stable symbols in the DSO yet.

[committed] libstdc++: Fix filebuf::native_handle() for Windows

Tested x86_64-linux. Pushed to trunk. -- >8 -- libstdc++-v3/ChangeLog: * acinclude.m4 (GLIBCXX_CHECK_FILEBUF_NATIVE_HANDLES): Add missing header to configure test. Check correct variable. * config/io/basic_file_stdio.cc (__basic_file::native_handle): Fix typo.

[committed] libstdc++: Tweaks for std::format fast path

Tested x86_64-linux. Pushed to trunk. -- >8 -- Fix an incorrect call to _Sink::_M_reserve() which should have passed the __n parameter. This was not actually a problem because it was in an discarded statement, because only the _Seq_sink> specialization was used. Also add some branch prediction

[committed] libstdc++: Fix %S format of duration with floating-point rep

Tested x86_64-linux. Pushed to trunk. Backport needed too. -- >8 -- I got the order of arguments to std::format_to wrong. It was in a discarded statement, for a case which wasn't being tested. libstdc++-v3/ChangeLog: * include/bits/chrono_io.h (__formatter_chrono::_M_S): Fix order

[committed] libstdc++: Add dg-output to two tests

Tested x86_64-linux. Pushed to trunk. -- >8 -- These tests are expected to run interactively, with the output checked by eye. Nobody ever does that, but we can at least use dg-output to check that the output is as expected. libstdc++-v3/ChangeLog: * testsuite/27_io/objects/char/2.cc:

[Bug libstdc++/107760] Implement C++23

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107760 --- Comment #2 from GCC Commits --- The master branch has been updated by Jonathan Wakely : https://gcc.gnu.org/g:fe54b57728c09ab0389e2bb3f079d5210566199d commit r14-6569-gfe54b57728c09ab0389e2bb3f079d5210566199d Author: Jonathan Wakely

Re: [PR target/110201] Fix operand types for various scalar crypto insns

On 12/14/23 02:46, Christoph Müllner wrote: On Tue, Jun 20, 2023 at 12:34 AM Jeff Law via Gcc-patches wrote: A handful of the scalar crypto instructions are supposed to take a constant integer argument 0..3 inclusive. A suitable constraint was created and used for this purpose (D03), but

Re: [PATCH 1/2] libstdc++: Atomic wait/notify ABI stabilization

On Thu, 14 Dec 2023, Thomas Rodgers wrote: I need to look at this a bit more (and not on my phone, at lunch). Ultimately, C++26 expects to add predicate waits and returning a ‘tri-state’ result isn’t something that’s been considered or likely to be approved. Ok, then that seems to fit best

[Bug middle-end/112971] [14] RISC-V rv64gcv_zvl256b vector -O3: internal compiler error: Segmentation fault signal terminated program cc1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112971 --- Comment #19 from JuzheZhong --- OK. I think we can't reproduce same issue on ARM SVE since VNx8HI is poly size [4,4] SI mode. Wheras, RVV with zvl256b is [8,8] SImode that ARM SVE never has such size scalable SI mode. I guess Robin is

[Bug middle-end/112971] [14] RISC-V rv64gcv_zvl256b vector -O3: internal compiler error: Segmentation fault signal terminated program cc1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112971 --- Comment #18 from Andrew Pinski --- (In reply to JuzheZhong from comment #17) > Ok. Thanks for confirm it. > enough ? If it can fix our RISC-V ICE. No, that is actually the wrong place to fix it. This was just to see if that would fix the

[Bug target/89606] Extra mov after structure load instructions on aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89606 --- Comment #3 from Andrew Pinski --- On the trunk (20231213) for aarch64, only f2 still has extra moves.

[Bug middle-end/112971] [14] RISC-V rv64gcv_zvl256b vector -O3: internal compiler error: Segmentation fault signal terminated program cc1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112971 --- Comment #17 from JuzheZhong --- Ok. Thanks for confirm it. Hi, Andrew. Is this following: ``` /* x & 0 -> 0 */ (simplify (bit_and @0 integer_zerop@1) @1) ``` to ``` /* x & 0 -> 0 */ (simplify (bit_and:c @0 integer_zerop@1) @1) ```

[Bug target/113027] New: aarch64 is missing vec_set and vec_extract for structure modes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113027 Bug ID: 113027 Summary: aarch64 is missing vec_set and vec_extract for structure modes Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal

gcc-11-20231214 is now available

Snapshot gcc-11-20231214 is now available on https://gcc.gnu.org/pub/gcc/snapshots/11-20231214/ and on various mirrors, see https://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 11 git branch with the following options: git://gcc.gnu.org/git/gcc.git branch

[PATCH] match.pd: Optimize sign-extension followed by truncation [PR113024]

Hi! While looking at a bitint ICE, I've noticed we don't optimize in f1 and f5 functions below the 2 casts into just one at GIMPLE, even when optimize it in convert_to_integer if it appears in the same stmt. The large match.pd simplification of two conversions in a row has many complex rules and

[Bug middle-end/112971] [14] RISC-V rv64gcv_zvl256b vector -O3: internal compiler error: Segmentation fault signal terminated program cc1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112971 Patrick O'Neill changed: What|Removed |Added Resolution|FIXED |--- Status|RESOLVED

[Committed] RISC-V: Tweak generic vector COST model

Notice current generic vector cost model make PR112387 failed to vectorize. Adapt it same as ARM SVE generic vector cost model which can fix it. Committed as it is obvious fix. PR target/112387 gcc/ChangeLog: * config/riscv/riscv.cc: Adapt generic cost model same ARM SVE.

Re: [PATCH 1/2] libstdc++: Atomic wait/notify ABI stabilization

I need to look at this a bit more (and not on my phone, at lunch). Ultimately, C++26 expects to add predicate waits and returning a ‘tri-state’ result isn’t something that’s been considered or likely to be approved. On Mon, Dec 11, 2023 at 12:18 PM Jonathan Wakely wrote: > CCing Tom's current

[Bug middle-end/112971] [14] RISC-V rv64gcv_zvl256b vector -O3: internal compiler error: Segmentation fault signal terminated program cc1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112971 Patrick O'Neill changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Committed] RISC-V: Adjust test

Since middle-end patch: https://gcc.gnu.org/pipermail/gcc-patches/2023-December/640595.html will change vectorization code. Adapt tests for ths patch. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/pr112988-1.c: Adapt test. ---

[PATCH] bitint: Introduce abi_limb_mode

Hi! Given what I saw in the aarch64/arm psABIs for BITINT_TYPE, as I said earlier I'm afraid we need to differentiate between the limb mode/precision specified in the psABIs (what is used to decide how it is actually passed, aligned or what size it has) vs. what limb mode/precision should be used

[Bug middle-end/112971] [14] RISC-V rv64gcv_zvl256b vector -O3: internal compiler error: Segmentation fault signal terminated program cc1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112971 --- Comment #14 from JuzheZhong --- Oh, I just take a look again. It seems that the issue is fixed on the trunk ? Hi, Patrick. https://godbolt.org/z/f1rnsYxf9 Could you confirm it ? If it is fixed, could you send a patch with the test ?

[Bug middle-end/112971] [14] RISC-V rv64gcv_zvl256b vector -O3: internal compiler error: Segmentation fault signal terminated program cc1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112971 --- Comment #13 from Andrew Pinski --- (In reply to JuzheZhong from comment #12) > Thanks Andrew. > > Will you send the patch to fix this ICE for RISC-V ? I doubt I will have time to work on it really. I have not figured out just yet to

[PATCH] lower-bitint: Fix .{ADD,SUB,MUL}_OVERFLOW with _BitInt large/huge INTEGER_CST arguments [PR113003]

Hi! As shown in the testcase, .{ADD,SUB,MUL}_OVERFLOW calls are another exception to the middle/large/huge _BitInt discovery through SSA_NAMEs next to stores of INTEGER_CSTs to memory and their conversions to floating point. The calls can have normal COMPLEX_TYPE with INTEGER_TYPE elts return

[Bug fortran/112873] F2023 degree trig functions

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112873 --- Comment #30 from anlauf at gcc dot gnu.org --- (In reply to Jerry DeLisle from comment #29) > Created attachment 56883 [details] > Updated Descriptions > > Fixed a few more things, The return value of tand is not in degrees. I think the

Re: [PATCH] c++: abi_tag attribute on templates [PR109715]

On 12/14/23 16:08, Patrick Palka wrote: On Thu, 14 Dec 2023, Jason Merrill wrote: On 12/14/23 14:17, Patrick Palka wrote: Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk? Do we want to condition this on abi_check (19)? I think we do, sadly. Sounds good,

[Bug middle-end/112971] [14] RISC-V rv64gcv_zvl256b vector -O3: internal compiler error: Segmentation fault signal terminated program cc1

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112971 --- Comment #12 from JuzheZhong --- Thanks Andrew. Will you send the patch to fix this ICE for RISC-V ? It's important for risc-v since it is ICE bug that we should land it in GCC-14 release.

Re: [PATCH] RISC-V: Add -fno-vect-cost-model to pr112773 testcase

LGTM juzhe.zh...@rivai.ai From: Patrick O'Neill Date: 2023-12-15 05:32 To: gcc-patches CC: rdapp.gcc; juzhe.zhong; Patrick O'Neill Subject: [PATCH] RISC-V: Add -fno-vect-cost-model to pr112773 testcase The testcase for pr112773 started passing after r14-6472-g8501edba91e which was before the

[pushed] testsuite: move more analyzer test cases to c-c++-common (3) [PR96395]

Move a further 268 tests from gcc.dg/analyzer to c-c++-common/analyzer. Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r14-6564-gae034b9106fbdd. gcc/testsuite/ChangeLog: PR analyzer/96395 * c-c++-common/analyzer/analyzer-decls.h: New header.

[Bug analyzer/96395] Generalize gcc.dg/analyzer tests to be run with both C and C++

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96395 --- Comment #8 from GCC Commits --- The master branch has been updated by David Malcolm : https://gcc.gnu.org/g:ae034b9106fbdd855ec22ce221bb61a1a9a532c3 commit r14-6564-gae034b9106fbdd855ec22ce221bb61a1a9a532c3 Author: David Malcolm Date:

[Bug tree-optimization/113026] Bogus -Wstringop-overflow warning on simple memcpy type loop

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113026 --- Comment #1 from Andrew Pinski --- IIRC there is a known issue with Wstringop-overflow and the vectorizer ...

[Bug fortran/112873] F2023 degree trig functions

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112873 --- Comment #29 from Jerry DeLisle --- Created attachment 56883 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=56883=edit Updated Descriptions Fixed a few more things, The return value of tand is not in degrees.

[Bug c++/113025] Pointer is sometimes assumed to be 16-byte aligned even when there is no such guarantee

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113025 Andrew Pinski changed: What|Removed |Added Resolution|--- |INVALID Status|UNCONFIRMED

[Bug c++/112482] error when auto(x) is used in a variable initializer (block scope)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112482 Marek Polacek changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug tree-optimization/113026] New: Bogus -Wstringop-overflow warning on simple memcpy type loop

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113026 Bug ID: 113026 Summary: Bogus -Wstringop-overflow warning on simple memcpy type loop Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal

[Bug c++/112482] error when auto(x) is used in a variable initializer (block scope)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112482 --- Comment #1 from GCC Commits --- The trunk branch has been updated by Marek Polacek : https://gcc.gnu.org/g:1ae71269890f532a2bb06b84fc49f474c16e230d commit r14-6563-g1ae71269890f532a2bb06b84fc49f474c16e230d Author: Marek Polacek Date:

[Bug middle-end/111260] [14 Regression] arm/aarch64: ice in maybe_legitimize_operand with ?: and constants and different types since r14-2667-gceae1400cf24f329393e96dd9720

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111260 Andrew Pinski changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug middle-end/111260] [14 Regression] arm/aarch64: ice in maybe_legitimize_operand with ?: and constants and different types since r14-2667-gceae1400cf24f329393e96dd9720

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111260 --- Comment #12 from GCC Commits --- The trunk branch has been updated by Andrew Pinski : https://gcc.gnu.org/g:5fa27d9f8c4bec65887654e374146926d76690b0 commit r14-6562-g5fa27d9f8c4bec65887654e374146926d76690b0 Author: Andrew Pinski Date:

[Bug c++/113025] New: Pointer is sometimes assumed to be 16-byte aligned even when there is no such guarantee

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113025 Bug ID: 113025 Summary: Pointer is sometimes assumed to be 16-byte aligned even when there is no such guarantee Product: gcc Version: 8.4.0 Status: UNCONFIRMED

[COMMITTED] middle-end: Fix up constant handling in emit_conditional_move [PR111260]

After r14-2667-gceae1400cf24f329393e96dd9720, we force a constant to a register if it is shared with one of the other operands. The problem is used the comparison mode for the register but that could be different from the operand mode. This causes some issues on some targets. To fix it, we need

[PATCH] RISC-V: Add -fno-vect-cost-model to pr112773 testcase

The testcase for pr112773 started passing after r14-6472-g8501edba91e which was before the actual fix. This patch adds -fno-vect-cost-model which prevents the testcase from passing due to the vls change. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/partial/pr112773.c: Add

[PATCH #2/2] strub: sparc64: unbias the stack address [PR112917]

The stack pointer is biased by 2047 bytes on sparc64, so the range it delimits is way off. Unbias the addresses returned by __builtin_stack_address (), so that the strub builtins, inlined or not, can function correctly. I've considered introducing a new target macro, but using

[Bug go/86535] FreeBSD/PowerPC64 - Building Go Frontend support for gcc 7.3.0 fails

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86535 --- Comment #37 from Ian Lance Taylor --- Search for this comment in the top-level configure.ac file. # Disable libgo for some systems where it is known to not work. # For testing, you can easily override this with --enable-libgo. That said if

Re: [PATCH] Fix tests for gomp

Hi! On 2023-12-13T12:09:14+0100, Jakub Jelinek wrote: > On Wed, Dec 13, 2023 at 11:03:50AM +, Andre Vieira (lists) wrote: >> Hmm I think I understand what you are saying, but I'm not sure I agree. >> So before I enabled simdclone testing for aarch64, this test had no target >> selectors.

Re: [V4] [PATCH 3/4] c23: aliasing of compatible tagged types

On Mon, 27 Nov 2023, Martin Uecker wrote: > diff --git a/gcc/c/c-tree.h b/gcc/c/c-tree.h > index a5dd9a37944..ece5b6a5d26 100644 > --- a/gcc/c/c-tree.h > +++ b/gcc/c/c-tree.h > @@ -758,6 +758,7 @@ extern tree require_complete_type (location_t, tree); > extern bool same_translation_unit_p

[Bug target/112773] [14 Regression] RISC-V ICE: in force_align_down_and_div, at poly-int.h:1828 on rv32gcv_zvl256b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112773 --- Comment #17 from Patrick O'Neill --- (In reply to Robin Dapp from comment #16) > I'd hope it was not fixed by this but just latent because we chose a > VLS-mode vectorization instead. Hopefully we're better off with the fix > than without

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