[gcc r14-10550] i386: Add non-optimize prefetchi intrins

https://gcc.gnu.org/g:30f4fa3f53e4c1476b4cb771f8d006c03804788a commit r14-10550-g30f4fa3f53e4c1476b4cb771f8d006c03804788a Author: Haochen Jiang Date: Thu Jul 25 16:16:05 2024 +0800 i386: Add non-optimize prefetchi intrins Under -O0, with the "newly" introduced intrins, the

[gcc r13-8952] i386: Add non-optimize prefetchi intrins

https://gcc.gnu.org/g:d80abba35edda7b508e29b723daebc0e475ddd87 commit r13-8952-gd80abba35edda7b508e29b723daebc0e475ddd87 Author: Haochen Jiang Date: Thu Jul 25 16:16:05 2024 +0800 i386: Add non-optimize prefetchi intrins Under -O0, with the "newly" introduced intrins, the

[gcc r15-2394] i386: Add non-optimize prefetchi intrins

https://gcc.gnu.org/g:b4524c4430ba9771265bd9fc31e69a3f35dfe117 commit r15-2394-gb4524c4430ba9771265bd9fc31e69a3f35dfe117 Author: Haochen Jiang Date: Thu Jul 25 16:16:05 2024 +0800 i386: Add non-optimize prefetchi intrins Under -O0, with the "newly" introduced intrins, the

[gcc r14-10514] i386: Fix AVX512 intrin macro typo

https://gcc.gnu.org/g:affb2e8f87e3982ee82b72dc3c44486daefd22e3 commit r14-10514-gaffb2e8f87e3982ee82b72dc3c44486daefd22e3 Author: Haochen Jiang Date: Thu Jul 25 16:12:20 2024 +0800 i386: Fix AVX512 intrin macro typo There are several typo in AVX512 intrins macro define. Correct

[gcc r12-10649] i386: Use _mm_setzero_ps/d instead of _mm_avx512_setzero_ps/d for GCC13/12

https://gcc.gnu.org/g:77ad22e4eaa97bb10068c6170f53caca77c99392 commit r12-10649-g77ad22e4eaa97bb10068c6170f53caca77c99392 Author: Haochen Jiang Date: Mon Jul 29 14:10:49 2024 +0800 i386: Use _mm_setzero_ps/d instead of _mm_avx512_setzero_ps/d for GCC13/12 In GCC13/12, there is no

[gcc r13-8950] i386: Use _mm_setzero_ps/d instead of _mm_avx512_setzero_ps/d for GCC13/12

https://gcc.gnu.org/g:b2ab34b2bb292948bfe103f56b13e9911d143d74 commit r13-8950-gb2ab34b2bb292948bfe103f56b13e9911d143d74 Author: Haochen Jiang Date: Mon Jul 29 14:10:49 2024 +0800 i386: Use _mm_setzero_ps/d instead of _mm_avx512_setzero_ps/d for GCC13/12 In GCC13/12, there is no

[gcc r13-8949] i386: Fix AVX512 intrin macro typo

https://gcc.gnu.org/g:bb15c4cf21dbe76df5a225342d1fbe8ecd3c7971 commit r13-8949-gbb15c4cf21dbe76df5a225342d1fbe8ecd3c7971 Author: Haochen Jiang Date: Thu Jul 25 16:12:20 2024 +0800 i386: Fix AVX512 intrin macro typo There are several typo in AVX512 intrins macro define. Correct

[gcc r12-10648] i386: Fix AVX512 intrin macro typo

https://gcc.gnu.org/g:bd0fbdc30d831f8c84223f583bcb5e5f6d7d72fc commit r12-10648-gbd0fbdc30d831f8c84223f583bcb5e5f6d7d72fc Author: Haochen Jiang Date: Thu Jul 25 16:12:20 2024 +0800 i386: Fix AVX512 intrin macro typo There are several typo in AVX512 intrins macro define. Correct

[gcc r15-2373] i386: Fix AVX512 intrin macro typo

https://gcc.gnu.org/g:16daeb262af4566e665a941368cb15bc2cba3f07 commit r15-2373-g16daeb262af4566e665a941368cb15bc2cba3f07 Author: Haochen Jiang Date: Thu Jul 25 16:12:20 2024 +0800 i386: Fix AVX512 intrin macro typo There are several typo in AVX512 intrins macro define. Correct

[gcc r15-2335] i386: Use BLKmode for {ld,st}tilecfg

https://gcc.gnu.org/g:f145f5411609dca5493a6709e8139609b584622f commit r15-2335-gf145f5411609dca5493a6709e8139609b584622f Author: Haochen Jiang Date: Fri Jul 26 16:49:08 2024 +0800 i386: Use BLKmode for {ld,st}tilecfg Hi all, For AMX instructions related with memory, we

[gcc r13-8935] i386: Change prefetchi output template

https://gcc.gnu.org/g:dec571e95cf47e21a1a60ed337e68e3474f57f7d commit r13-8935-gdec571e95cf47e21a1a60ed337e68e3474f57f7d Author: Haochen Jiang Date: Mon Jul 22 14:06:18 2024 +0800 i386: Change prefetchi output template For prefetchi instructions, RIP-relative address is

[gcc r14-10500] i386: Change prefetchi output template

https://gcc.gnu.org/g:81f356f9f72fc3159eeaa5a037cf6c3eb701224b commit r14-10500-g81f356f9f72fc3159eeaa5a037cf6c3eb701224b Author: Haochen Jiang Date: Mon Jul 22 14:06:18 2024 +0800 i386: Change prefetchi output template For prefetchi instructions, RIP-relative address is

[gcc r15-2213] i386: Change prefetchi output template

https://gcc.gnu.org/g:062e46a813799684c6f900815fd22451d6294ae1 commit r15-2213-g062e46a813799684c6f900815fd22451d6294ae1 Author: Haochen Jiang Date: Mon Jul 22 14:06:18 2024 +0800 i386: Change prefetchi output template For prefetchi instructions, RIP-relative address is

[gcc r15-2129] i386: Fix testcases generating invalid asm

https://gcc.gnu.org/g:4b58697cecbd72fd7db5a0fcdf7af8deb3be2b14 commit r15-2129-g4b58697cecbd72fd7db5a0fcdf7af8deb3be2b14 Author: Haochen Jiang Date: Wed Jul 17 16:26:35 2024 +0800 i386: Fix testcases generating invalid asm For compile test, we should generate valid asm except for

[gcc r14-10397] i386: Correct AVX10 CPUID emulation

https://gcc.gnu.org/g:74c15cb93b3830fee79f75805329d4299ff4a2f0 commit r14-10397-g74c15cb93b3830fee79f75805329d4299ff4a2f0 Author: Haochen Jiang Date: Tue Jul 9 16:31:02 2024 +0800 i386: Correct AVX10 CPUID emulation AVX10 Documentaion has specified ecx value as 0 for AVX10

[gcc r15-1908] i386: Correct AVX10 CPUID emulation

https://gcc.gnu.org/g:298a576f00c49b8f4529ea2f87b9943a32743250 commit r15-1908-g298a576f00c49b8f4529ea2f87b9943a32743250 Author: Haochen Jiang Date: Tue Jul 9 16:31:02 2024 +0800 i386: Correct AVX10 CPUID emulation AVX10 Documentaion has specified ecx value as 0 for AVX10 version

[gcc r14-10283] testsuite: i386: Require ifunc support in gcc.target/i386/avx10_1-25.c etc.

https://gcc.gnu.org/g:e11a42b8c7ac32f8a1e307f99719a0f9c63813e8 commit r14-10283-ge11a42b8c7ac32f8a1e307f99719a0f9c63813e8 Author: Rainer Orth Date: Tue Jun 4 13:33:46 2024 +0200 testsuite: i386: Require ifunc support in gcc.target/i386/avx10_1-25.c etc. Two new AVX10.1 tests FAIL

[gcc r14-10271] Add AVX10.1 target_clones support

https://gcc.gnu.org/g:97474ba2075dc3c397bbc2861646561dcfd13386 commit r14-10271-g97474ba2075dc3c397bbc2861646561dcfd13386 Author: Haochen Jiang Date: Mon May 20 15:52:32 2024 +0800 Add AVX10.1 target_clones support Since AVX10 is the first major ISA introduced after AVX-512, we

[gcc r15-983] Add AVX10.1 target_clones support

https://gcc.gnu.org/g:1f2ca510065a2033bac408eb5a960ef0126f25cc commit r15-983-g1f2ca510065a2033bac408eb5a960ef0126f25cc Author: Haochen Jiang Date: Mon May 20 15:52:32 2024 +0800 Add AVX10.1 target_clones support Since AVX10 is the first major ISA introduced after AVX-512, we

[gcc r15-888] Align tight loop without considering max skipping bytes.

https://gcc.gnu.org/g:b644126237a1aa8599f767a5e0bbada1d7286f44 commit r15-888-gb644126237a1aa8599f767a5e0bbada1d7286f44 Author: liuhongt Date: Wed May 29 11:14:26 2024 +0800 Align tight loop without considering max skipping bytes. When hot loop is small enough to fix into one

[gcc r15-887] Adjust generic loop alignment from 16:11:8 to 16 for Intel processors

https://gcc.gnu.org/g:00ed5424b1d4dcccfa187f55205521826794898c commit r15-887-g00ed5424b1d4dcccfa187f55205521826794898c Author: Haochen Jiang Date: Wed May 29 11:13:55 2024 +0800 Adjust generic loop alignment from 16:11:8 to 16 for Intel processors Previously, we use 16:11:8 in

[gcc r14-10254] Align tight loop without considering max skipping bytes.

https://gcc.gnu.org/g:b4d4ece0443433cd5c3078cfe03f18429e73b77a commit r14-10254-gb4d4ece0443433cd5c3078cfe03f18429e73b77a Author: liuhongt Date: Wed May 29 11:12:51 2024 +0800 Align tight loop without considering max skipping bytes. When hot loop is small enough to fix into one

[gcc r14-10253] Adjust generic loop alignment from 16:11:8 to 16 for Intel processors

https://gcc.gnu.org/g:80600352d1282f084900ab444f2d4c83986f2ae5 commit r14-10253-g80600352d1282f084900ab444f2d4c83986f2ae5 Author: Haochen Jiang Date: Wed May 29 11:12:37 2024 +0800 Adjust generic loop alignment from 16:11:8 to 16 for Intel processors Previously, we use 16:11:8 in

[gcc r14-10229] i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW

https://gcc.gnu.org/g:1ad5c9d524d8fa99773045e75da04ae958012085 commit r14-10229-g1ad5c9d524d8fa99773045e75da04ae958012085 Author: Haochen Jiang Date: Tue May 21 14:10:43 2024 +0800 i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW Since vpermq is really slow, we should

[gcc r15-764] i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW

https://gcc.gnu.org/g:73a167cfa225d5ee7092d41596b9fea1719898ff commit r15-764-g73a167cfa225d5ee7092d41596b9fea1719898ff Author: Haochen Jiang Date: Tue May 21 14:10:43 2024 +0800 i386: Disable ix86_expand_vecop_qihi2 when !TARGET_AVX512BW Since vpermq is really slow, we should

[gcc r13-8652] i386: Fix array index overflow in pr105354-2.c

https://gcc.gnu.org/g:7425436b5382a04f3eb28c7c7912f4d9a1cad0bd commit r13-8652-g7425436b5382a04f3eb28c7c7912f4d9a1cad0bd Author: Haochen Jiang Date: Fri Apr 26 16:48:29 2024 +0800 i386: Fix array index overflow in pr105354-2.c The array index should not be over 8 for v8hi, or it

[gcc r14-10137] i386: Fix array index overflow in pr105354-2.c

https://gcc.gnu.org/g:4a2e55b3ada20fe6457466bb687a66c8d03e056e commit r14-10137-g4a2e55b3ada20fe6457466bb687a66c8d03e056e Author: Haochen Jiang Date: Fri Apr 26 16:48:29 2024 +0800 i386: Fix array index overflow in pr105354-2.c The array index should not be over 8 for v8hi, or it

[gcc r14-10104] i386: Fix behavior for both using AVX10.1-256 in options and function attribute

https://gcc.gnu.org/g:d279c9d89b2f6ce89c1eec0ff4b980e9c5f51fd1 commit r14-10104-gd279c9d89b2f6ce89c1eec0ff4b980e9c5f51fd1 Author: Haochen Jiang Date: Wed Apr 24 10:43:18 2024 +0800 i386: Fix behavior for both using AVX10.1-256 in options and function attribute When we are using

[gcc r13-8641] i386: Fix Sierra Forest auto dispatch

https://gcc.gnu.org/g:d80c9df20ed77a26eb71457679dad2b564c5da60 commit r13-8641-gd80c9df20ed77a26eb71457679dad2b564c5da60 Author: Haochen Jiang Date: Mon Apr 22 16:57:36 2024 +0800 i386: Fix Sierra Forest auto dispatch gcc/ChangeLog: *

[gcc r14-10072] i386: Fix Sierra Forest auto dispatch

https://gcc.gnu.org/g:6b5248d15c6d10325c6cbb92a0e0a9eb04e3f122 commit r14-10072-g6b5248d15c6d10325c6cbb92a0e0a9eb04e3f122 Author: Haochen Jiang Date: Mon Apr 22 16:57:36 2024 +0800 i386: Fix Sierra Forest auto dispatch gcc/ChangeLog: *

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