Ian suggestion worked perfectly, thanks. Can you tell me the macro/function
name to look up
to work out the secondary reload you're mentioning?
- Original Message
From: Michael Meissner meiss...@linux.vnet.ibm.com
To: Ian Lance Taylor i...@google.com
Cc: Iceman iceman_...@yahoo.com
Perfect, thank you!
- Original Message
From: Michael Meissner meiss...@linux.vnet.ibm.com
To: Iceman iceman_...@yahoo.com
Cc: Michael Meissner meiss...@linux.vnet.ibm.com; Ian Lance Taylor
i...@google.com; g...@gnu.org
Sent: Friday, May 8, 2009 3:45:20 PM
Subject: Re: Avoiding REG
Hi!
I'm porting GCC to a software VM with 32 32bit registers, and 32 64bit
registers.
The 64bit registers are used for DI, SF and DF mode. Pointers and QI, HI and SI
modes are handled with 32bit registers.
The first 8 32bit parameters of functions are passed into the first 8 32bit
registers
Sorry for such trivial question, but is there any macro that can be used to
avoig GCC to generate
REG+OFF memory accesses?
So basically to force GCC to break:
(mem (plus (reg const_int)))
into
(set regtmp (plus (reg const_int)))
(set (mem regtmp) reg)
This w/out writing custom RTL.
Can you
