Re: modified_between_p does not check for volatile memory

2020-10-13 Thread Richard Sandiford via Gcc
Tucker Kern via Gcc writes: > TL;DR > > In GCC 9.3, I believe modified_between_p should return 1 if the memory > reference is volatile. My layman's understanding of volatile memory is that > it could change at any time, and thus could be modified between any two > instructions. That's true, but i

Re: wide int knowledge/bug?

2020-10-27 Thread Richard Sandiford via Gcc
Jakub Jelinek via Gcc writes: > On Tue, Oct 27, 2020 at 01:18:03PM -0400, Andrew MacLeod via Gcc wrote: >> I was looking at https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97596 >> >> and the ranger is constructing some 128 bit constants and calling >> wide_int_to_tree to turn them into trees. >> >

Re: C++11 code in the gcc 10 branch

2020-12-21 Thread Richard Sandiford via Gcc
FX via Gcc writes: > I’m trying to bootstrap a GCC 10 compiler on macOS with clang, and I am > getting errors in stage 1, because there is C++11 code that is rejected by > clang (because the bootstrap involves compiling stage 1 with -std=gnu++98, > online on master (see top-level configure.ac).

What is the type of vector signed + vector unsigned?

2020-12-29 Thread Richard Sandiford via Gcc
Any thoughts on what f should return in the following testcase, given the usual GNU behaviour of treating signed >> as arithmetic shift right? typedef int vs4 __attribute__((vector_size(16))); typedef unsigned int vu4 __attribute__((vector_size(16))); int f (void) { vs4 x

Re: C++11 code in the gcc 10 branch

2020-12-31 Thread Richard Sandiford via Gcc
FX writes: >> When are you going to apply your fix that Richard S. approved on the >> 21st? > > When I remember how to set up gcc’s git with write access, and remember how > the new ChangeLog entries work. The times where I was a regular contributor > were the CVS and SVN times. > > I also wante

Re: Current limitations of define_subst

2021-03-26 Thread Richard Sandiford via Gcc
Colin McEwan via Gcc writes: > Hi all, > > I was wondering if anyone understands the rationale behind the current > limitations on (define_subst), ie. working only on (define_insn) and > (define_expand). > > A lot of md cleanup, as well as extra patterns for combiner use, could be > enabled by sup

Re: GCC association with the FSF

2021-04-11 Thread Richard Sandiford via Gcc
[ Like many others who have posted to this thread, I've contributed to GCC at various times as a hobby and at other times as a paid employee. Here I'm speaking as a personal contributor, not on behalf of my current employer. ] I think it's misleading to talk about GCC “leaving” or “disassoc

Re: Could vector type of poly_int and compile-time constants be enabled at the same time ?

2021-04-29 Thread Richard Sandiford via Gcc
JojoR via Gcc writes: > Hi, > > I have a little know about for 'Sizes and offsets as runtime > invariants’, > > and need to add vector types like V2SImode as compile-time constants > with enabled vector types of runtime invariants. > > Could I enable two vector types at sa

Re: [RFC] Implementing detection of saturation and rounding arithmetic

2021-05-12 Thread Richard Sandiford via Gcc
Tamar Christina writes: > Hi All, > > We are looking to implement saturation support in the compiler. The aim is to > recognize both Scalar and Vector variant of typical saturating expressions. > > As an example: > > 1. Saturating addition: >char sat (char a, char b) >{ > int tmp =

Re: RFC: New mechanism for hard reg operands to inline asm

2021-06-07 Thread Richard Sandiford via Gcc
Paul Koning via Gcc writes: >> On Jun 4, 2021, at 2:02 PM, Andreas Krebbel via Gcc wrote: >> >> Hi, >> >> I wonder if we could replace the register asm construct for >> inline assemblies with something a bit nicer and more obvious. >> E.g. turning this (real world example from IBM Z kernel code

Re: [PATCH] Port GCC documentation to Sphinx

2021-07-05 Thread Richard Sandiford via Gcc
Hans-Peter Nilsson writes: > I've read the discussion downthread, but I seem to miss (a recap > of) the benefits of moving to Sphinx. Maybe other have too and > it'd be a good idea to repeat them? Otherwise, the impression > is not so good, as all I see is bits here and there getting lost > in t

Re: [PATCH] Port GCC documentation to Sphinx

2021-07-05 Thread Richard Sandiford via Gcc
Eli Zaretskii writes: >> Hans-Peter Nilsson writes: >> > I've read the discussion downthread, but I seem to miss (a recap >> > of) the benefits of moving to Sphinx. Maybe other have too and >> > it'd be a good idea to repeat them? Otherwise, the impression >> > is not so good, as all I see is b

Some libgcc headers are missing the runtime exception

2021-07-09 Thread Richard Sandiford via Gcc
Hi, It was pointed out to me off-list that config/aarch64/value-unwind.h is missing the runtime exception. It looks like a few other files are too; a fuller list is: libgcc/config/aarch64/value-unwind.h libgcc/config/frv/frv-abi.h libgcc/config/i386/value-unwind.h libgcc/config/pa/pa64-hpux-lib.

Re: Some libgcc headers are missing the runtime exception

2021-07-09 Thread Richard Sandiford via Gcc
David Edelsohn writes: > On Fri, Jul 9, 2021 at 12:53 PM Richard Sandiford via Gcc > wrote: >> >> Hi, >> >> It was pointed out to me off-list that config/aarch64/value-unwind.h >> is missing the runtime exception. It looks like a few other files >> are

Re: Mass rename of C++ .c files to .cc suffix?

2022-01-07 Thread Richard Sandiford via Gcc
Martin Jambor writes: > Hi, > > Would anyone be terribly against mass renaming all *.c files (that are > actually C++ files) within the gcc subdirectory to ones with .cc suffix? > > We already have 47 files with suffix .cc directly in the gcc > subdirectory and 160 if we also count those in (non-t

Re: Help with an ABI peculiarity

2022-01-10 Thread Richard Sandiford via Gcc
Iain Sandoe writes: > Hi Folks, > > In the aarch64 Darwin ABI we have an unusual (OK, several unusual) feature of > the calling convention. > > When an argument is passed *in a register* and it is integral and less than > SI it is promoted (with appropriate signedness) to SI. This applies when

Re: How to generate a call inst. sequence?

2022-01-19 Thread Richard Sandiford via Gcc
Andras Tantos writes: > All, > > I'm working on porting GCC to a processor architecture that doesn't have > a (HW) stack nor a call instruction. This means that for calls, I need > to generate the following instruction sequence: > >     // move stack-pointer: >     $sp <- $sp-4 >     // load

Re: Help with an ABI peculiarity

2022-01-20 Thread Richard Sandiford via Gcc
Iain Sandoe writes: >> On 10 Jan 2022, at 10:46, Richard Sandiford >> wrot>> An alternative might be to make promote_function_arg a “proper” >> ABI hook, taking a cumulative_args_t and a function_arg_info. >> Perhaps the return case should become a separate hook at the >> same time. >> >> That

Re: Help with an ABI peculiarity

2022-01-21 Thread Richard Sandiford via Gcc
Iain Sandoe writes: > Hi Richard, >> On 20 Jan 2022, at 22:32, Richard Sandiford >> wrot>> Iain Sandoe writes: On 10 Jan 2022, at 10:46, Richard Sandiford wrot>> An alternative might be to make promote_function_arg a “proper” ABI hook, taking a cumulative_args_t and a function_

Re: try_finally_expr in must_not_throw_expr

2022-08-02 Thread Richard Sandiford via Gcc
Philipp Rimmele via Gcc writes: > Hi, > > i'm developing a GCC-Plugin. And i don't understand why there is a > "try_finally_expr" in a must_not_throw-Area in my AST. It happens in the > destructors. > Here is my AST: > function_decl Exception::__dt_base > 1: must_not_throw_expr(->void_type{voi

Re: [PATCH 0/3] picolibc: Add picolibc linking help

2022-09-02 Thread Richard Sandiford via Gcc
Keith Packard via Gcc-patches writes: > Picolibc is a C library for embedded systems based on code from newlib > and avr libc. To connect some system-dependent picolibc functions > (like stdio) to an underlying platform, the platform may provide an OS > library. > > This OS library must follow the

Re: [RFC] database with API information

2022-09-07 Thread Richard Sandiford via Gcc
Ulrich Drepper via Gcc writes: > I talked to Jonathan the other day about adding all the C++ library APIs to > the name hint file now that the size of the table is not really a concern > anymore. > > Jonathan mentioned that he has to create and maintain a similar file for > the module support. It

Re: RFC: Make builtin types only valid for some target features

2022-12-04 Thread Richard Sandiford via Gcc
"Kewen.Lin" writes: > Hi, > > I'm working to find one solution for PR106736, which requires us to > make some built-in types only valid for some target features, and > emit error messages for the types when the condition isn't satisfied. > A straightforward idea is to guard the registry of built

Re: Default initialization of poly-ints

2023-01-12 Thread Richard Sandiford via Gcc
Jeff Law via Gcc writes: > On 1/3/23 04:16, Florian Weimer via Gcc wrote: >> It seems that the default constructor of the non-POD poly-ints does >> nothing. Is this intentional? I expected zero initialization, to match >> regular ints. > I think it was intentional. Richard Sandiford would know

Re: Taking Over MIPS Maintenance

2023-05-18 Thread Richard Sandiford via Gcc
YunQiang Su writes: > Greetings all, > > I would like to self-nominate as the new GCC MIPS maintainer. Matthew Fortune > is listed in MAINTAINERS as the current maintainer of GCC's MIPS Port. > However, it has been years since he left MIPS Technologies and had since been > inactive. > > I curre

Re: Hundreds of gcc.dg/guality failures on both 14 and 13.1 branches

2023-07-16 Thread Richard Sandiford via Gcc
Martin Jambor writes: > Hi, > > On Sat, Jul 15 2023, FX Coudert via Gcc wrote: >> Hi, >> >> I am finding it very hard to reliably compare test results and regressions >> with the very large number of gcc.dg/guality test failures that are >> apparently the new norm on x86_64-linux: more than one

Re: Question about dynamic choosing vectorization factor for RVV

2023-08-31 Thread Richard Sandiford via Gcc
"juzhe.zh...@rivai.ai" writes: > Thanks Richi. > > I am trying to figure out how to adjust finish_cost to lower the LMUL > > For example: > > void > foo (int32_t *__restrict a, int32_t *__restrict b, int n) > { > for (int i = 0; i < n; i++) > a[i] = a[i] + b[i]; > } > > preferred_simd_mode p

Re: Question on aarch64 prologue code.

2023-09-06 Thread Richard Sandiford via Gcc
Iain Sandoe writes: > Hi Folks, > > On the Darwin aarch64 port, we have a number of cleanup test fails (pretty > much corresponding to the [still open] > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39244). However, let’s assume > that bug could be a red herring.. > > the underlying reason is

ipa-inline & what TARGET_CAN_INLINE_P can assume

2023-09-25 Thread Richard Sandiford via Gcc
Hi, I have a couple of questions about what TARGET_CAN_INLINE_P is alllowed to assume when called from ipa-inline. (Callers from the front-end don't matter for the moment.) I'm working on an extension where a function F1 without attribute A can't be inlined into a function F2 with attribute A.

Re: ipa-inline & what TARGET_CAN_INLINE_P can assume

2023-09-25 Thread Richard Sandiford via Gcc
Andrew Pinski writes: > On Mon, Sep 25, 2023 at 10:16 AM Richard Sandiford via Gcc > wrote: >> >> Hi, >> >> I have a couple of questions about what TARGET_CAN_INLINE_P is >> alllowed to assume when called from ipa-inline. (Callers from the >> front-e

Re: Arm assembler crc issue

2023-10-19 Thread Richard Sandiford via Gcc
Iain Sandoe writes: > Hi Richard, > > > I am being bitten by a problem that falls out from the code that emits > > .arch Armv8.n-a+crc > > when the arch is less than Armv8-r. > The code that does this, in gcc/common/config/aarch64 is quite recent > (2022-09). Heh. A workaround for one as

Re: Discussion about arm/aarch64 testcase failures seen with patch for PR111673

2023-11-28 Thread Richard Sandiford via Gcc
Richard Earnshaw writes: > On 28/11/2023 12:52, Surya Kumari Jangala wrote: >> Hi Richard, >> Thanks a lot for your response! >> >> Another failure reported by the Linaro CI is as follows : >> (Note: I am planning to send a separate mail for each failure, as this will >> make >> the discussion e

Re: [RFC] Merge strathegy for all-SLP vectorizer

2024-05-17 Thread Richard Sandiford via Gcc
Richard Biener via Gcc writes: > Hi, > > I'd like to discuss how to go forward with getting the vectorizer to > all-SLP for this stage1. While there is a personal branch with my > ongoing work (users/rguenth/vect-force-slp) branches haven't proved > themselves working well for collaboration. Spe

Re: [RFC] MAINTAINERS: require a BZ account field

2024-07-04 Thread Richard Sandiford via Gcc
Sam James via Gcc writes: > Hi! > > This comes up in #gcc on IRC every so often, so finally > writing an RFC. > > What? > --- > > I propose that MAINTAINERS be modified to be of the form, > adding an extra field for their GCC/sourceware account: >account> > Joe Bloggs

Re: [RFC] MAINTAINERS: require a BZ account field

2024-07-07 Thread Richard Sandiford via Gcc
Sam James writes: > Richard Sandiford writes: > >> Sam James via Gcc writes: >>> Hi! >>> >>> This comes up in #gcc on IRC every so often, so finally >>> writing an RFC. >>> >> [...] >>> TL;DR: The proposal is: >>> >>> 1) MAINTAINERS should list a field containing either the gcc.gnu.org >>> email

Re: md: define_code_attr / define_mode_attr: Default value?

2024-07-09 Thread Richard Sandiford via Gcc
Georg-Johann Lay writes: > Is it possible to specify a default value in > define_code_attr resp. define_mode_attr ? > > I had a quick look at read-rtl, and it seem to be not the case. Yeah, that's right. I'd assumed the attributes would be used in cases where an active choice has to be made for

Re: Help with vector cost model

2024-07-11 Thread Richard Sandiford via Gcc
Andrew Pinski writes: > I need some help with the vector cost model for aarch64. > I am adding V2HI and V4QI mode support by emulating it using the > native V4HI/V8QI instructions (similarly to mmx as SSE is done). The > problem is I am running into a cost model issue with > gcc.target/aarch64/pr9

Re: insn attributes: Support blocks of C-code?

2024-07-13 Thread Richard Sandiford via Gcc
Georg-Johann Lay writes: > So I had that situation where in an insn attribute, providing > a block of code (rather than just an expression) would be > useful. > > Expressions can provided by means of symbol_ref, like in > > (set (attr "length") > (symbol_ref ("1 + GET_MODE_SIZE (mode)"))) >

Re: Insn combine trying (ior:HI (clobber:HI (const_int 0)))

2024-07-15 Thread Richard Sandiford via Gcc
Georg-Johann Lay writes: > In a test case I see insn combine trying to match such > expressions, which do not make any sense to me, like: > > Trying 2 -> 7: > 2: r45:HI=r48:HI >REG_DEAD r48:HI > 7: {r47:HI=r45:HI|r46:PSI#0;clobber scratch;} >REG_DEAD r46:PSI >REG_

Re: insn attributes: Support blocks of C-code?

2024-07-17 Thread Richard Sandiford via Gcc
Georg-Johann Lay writes: > [...] > Am 13.07.24 um 13:44 schrieb Richard Sandiford: >> Georg-Johann Lay writes: >>> diff --git a/gcc/read-md.h b/gcc/read-md.h >>> index 9703551a8fd..ae10b651de1 100644 >>> --- a/gcc/read-md.h >>> +++ b/gcc/read-md.h >>> @@ -132,6 +132,38 @@ struct overloaded_name {