https://gcc.gnu.org/g:cfe2b6756c691c92aa29337c6973e3b3361de5c9
commit r15-2438-gcfe2b6756c691c92aa29337c6973e3b3361de5c9
Author: Claudio Bantaloukas
Date: Wed Jul 31 14:42:41 2024 +0100
aarch64: Add fpm register helper functions.
The ACLE declares several helper types and
https://gcc.gnu.org/g:6d43c3669a6bd9e84f6d3941e19cc025de59ece0
commit r15-2437-g6d43c3669a6bd9e84f6d3941e19cc025de59ece0
Author: Claudio Bantaloukas
Date: Wed Jul 31 14:42:40 2024 +0100
aarch64: Add support for moving fpm system register
Unlike most system registers, fpmr can be
https://gcc.gnu.org/g:72ebbc3b2bb9bb3649f1222f731a9b4d0197499e
commit r15-2436-g72ebbc3b2bb9bb3649f1222f731a9b4d0197499e
Author: Claudio Bantaloukas
Date: Wed Jul 31 14:42:39 2024 +0100
aarch64: Add march flags for +fp8 arch extensions
This introduces the relevant flags to enable
https://gcc.gnu.org/g:d63b6d8b494483b0049370ff0dfeee0e1d10e54b
commit r15-2429-gd63b6d8b494483b0049370ff0dfeee0e1d10e54b
Author: Richard Sandiford
Date: Wed Jul 31 09:23:35 2024 +0100
recog: Disallow subregs in mode-punned value [PR115881]
In
https://gcc.gnu.org/g:d6849aa926665cbee8bf87822401ca44f881753f
commit r15-2313-gd6849aa926665cbee8bf87822401ca44f881753f
Author: Richard Sandiford
Date: Thu Jul 25 13:25:32 2024 +0100
rtl-ssa: Define INCLUDE_ARRAY
g:72fbd3b2b2a497dbbe6599239bd61c5624203ed0 added a use of
https://gcc.gnu.org/g:72fbd3b2b2a497dbbe6599239bd61c5624203ed0
commit r15-2298-g72fbd3b2b2a497dbbe6599239bd61c5624203ed0
Author: Richard Sandiford
Date: Thu Jul 25 08:54:22 2024 +0100
rtl-ssa: Fix split_clobber_group tree insertion [PR116044]
PR116044 is a regression in the
https://gcc.gnu.org/g:34f33ea801563e2eabb348e8d3e9344a91abfd48
commit r15-2199-g34f33ea801563e2eabb348e8d3e9344a91abfd48
Author: Richard Sandiford
Date: Mon Jul 22 16:42:16 2024 +0100
rtl-ssa: Avoid using a stale splay tree root [PR116009]
In the fix for PR115928, I'd failed to
https://gcc.gnu.org/g:e62988b77757c6019f0a538492e9851cda689c2e
commit r15-2198-ge62988b77757c6019f0a538492e9851cda689c2e
Author: Richard Sandiford
Date: Mon Jul 22 16:42:16 2024 +0100
rtl-ssa: Add debug routines for def_splay_tree
This patch adds debug routines for
https://gcc.gnu.org/g:ebde0cc101a3b26bc8c188e0d2f79b649bacc43a
commit r15-2197-gebde0cc101a3b26bc8c188e0d2f79b649bacc43a
Author: Richard Sandiford
Date: Mon Jul 22 16:42:15 2024 +0100
aarch64: Tighten aarch64_simd_mem_operand_p [PR115969]
aarch64_simd_mem_operand_p checked for a
https://gcc.gnu.org/g:348d890c287a7ec4c88d3082ae6105537bd39398
commit r15-2161-g348d890c287a7ec4c88d3082ae6105537bd39398
Author: Richard Sandiford
Date: Fri Jul 19 19:09:37 2024 +0100
Treat boolean vector elements as 0/-1 [PR115406]
Previously we built vector boolean constants
https://gcc.gnu.org/g:ebdad26ed9902c04704409b729d896a646188634
commit r15-2160-gebdad26ed9902c04704409b729d896a646188634
Author: Richard Sandiford
Date: Fri Jul 19 19:09:37 2024 +0100
arm: Update fp16-aapcs-[24].c after insn_propagation patch
These tests used to generate:
Georg-Johann Lay writes:
> [...]
> Am 13.07.24 um 13:44 schrieb Richard Sandiford:
>> Georg-Johann Lay writes:
>>> diff --git a/gcc/read-md.h b/gcc/read-md.h
>>> index 9703551a8fd..ae10b651de1 100644
>>> --- a/gcc/read-md.h
>>> +++ b/gcc/read-md.h
>>> @@ -132,6 +132,38 @@ struct overloaded_name
https://gcc.gnu.org/g:43a7ece873eba47a11c0b21b0068eee53740551a
commit r15-2111-g43a7ece873eba47a11c0b21b0068eee53740551a
Author: Richard Sandiford
Date: Wed Jul 17 19:38:12 2024 +0100
rtl-ssa: Fix move range canonicalisation [PR115929]
In this PR, canonicalize_move_range walked
https://gcc.gnu.org/g:71b31690a7c52413496e91bcc5ee4c68af2f366f
commit r15-2110-g71b31690a7c52413496e91bcc5ee4c68af2f366f
Author: Richard Sandiford
Date: Wed Jul 17 19:38:11 2024 +0100
rtl-ssa: Fix split_clobber_group [PR115928]
One of the goals of the rtl-ssa representation was
https://gcc.gnu.org/g:b19906a029a059fc5015046bae60e3287d842bba
commit r15-2109-gb19906a029a059fc5015046bae60e3287d842bba
Author: Richard Sandiford
Date: Wed Jul 17 19:34:46 2024 +0100
genattrtab: Drop enum tags, consolidate type names
genattrtab printed an "enum" tag before
https://gcc.gnu.org/g:fec38d7987dd6d68b234b0076b57ac66a30a3a1d
commit r15-2071-gfec38d7987dd6d68b234b0076b57ac66a30a3a1d
Author: Richard Sandiford
Date: Tue Jul 16 15:33:23 2024 +0100
rtl-ssa: Fix removal of order_nodes [PR115929]
order_nodes are used to implement ordered
https://gcc.gnu.org/g:851ec9960b084ad37556ec627e6931e985e41a24
commit r15-2070-g851ec9960b084ad37556ec627e6931e985e41a24
Author: Richard Sandiford
Date: Tue Jul 16 15:31:17 2024 +0100
recog: restrict paradoxical mode punning in insn_propagation [PR115901]
In
https://gcc.gnu.org/g:9f9faebb8ebfc0103461641cc49ba0b21877b2b1
commit r15-2069-g9f9faebb8ebfc0103461641cc49ba0b21877b2b1
Author: Richard Sandiford
Date: Tue Jul 16 15:31:17 2024 +0100
rtl-ssa: Enforce earlyclobbers on hard-coded clobbers [PR115891]
The asm in the testcase has a
Georg-Johann Lay writes:
> In a test case I see insn combine trying to match such
> expressions, which do not make any sense to me, like:
>
> Trying 2 -> 7:
> 2: r45:HI=r48:HI
>REG_DEAD r48:HI
> 7: {r47:HI=r45:HI|r46:PSI#0;clobber scratch;}
>REG_DEAD r46:PSI
>
https://gcc.gnu.org/g:6fc24a022218c9017e0ee2a9f2913ef85609c265
commit r15-2016-g6fc24a022218c9017e0ee2a9f2913ef85609c265
Author: Richard Sandiford
Date: Sat Jul 13 16:22:58 2024 +0100
Add gcc.gnu.org account names to MAINTAINERS
As discussed in the thread starting at:
Georg-Johann Lay writes:
> So I had that situation where in an insn attribute, providing
> a block of code (rather than just an expression) would be
> useful.
>
> Expressions can provided by means of symbol_ref, like in
>
> (set (attr "length")
> (symbol_ref ("1 + GET_MODE_SIZE (mode)")))
>
https://gcc.gnu.org/g:6e7053a641393211f52c176e540c8922288ab8db
commit r15-2008-g6e7053a641393211f52c176e540c8922288ab8db
Author: Richard Sandiford
Date: Fri Jul 12 15:50:36 2024 +0100
rtl-ssa: Fix prev_any_insn [PR115785]
Bit of a brown paper bag issue, but: due to the
https://gcc.gnu.org/g:7bcef7532b10040bb82567136a208d0c4560767d
commit r15-1998-g7bcef7532b10040bb82567136a208d0c4560767d
Author: Richard Sandiford
Date: Fri Jul 12 10:30:22 2024 +0100
aarch64: Avoid alloca in target attribute parsing
The handling of the target attribute used
https://gcc.gnu.org/g:44fc801e97a8dc626a4806ff4124439003420b20
commit r15-1972-g44fc801e97a8dc626a4806ff4124439003420b20
Author: Richard Sandiford
Date: Thu Jul 11 14:44:11 2024 +0100
recog: Avoid validate_change shortcut for groups [PR115782]
In this PR, due to the -f flags, we
Andrew Pinski writes:
> I need some help with the vector cost model for aarch64.
> I am adding V2HI and V4QI mode support by emulating it using the
> native V4HI/V8QI instructions (similarly to mmx as SSE is done). The
> problem is I am running into a cost model issue with
>
https://gcc.gnu.org/g:5686d3b8ae16d9aeea8d39a56ec6f8ecee661e01
commit r15-1947-g5686d3b8ae16d9aeea8d39a56ec6f8ecee661e01
Author: Richard Sandiford
Date: Wed Jul 10 17:37:58 2024 +0100
internal-fn: Reuse SUBREG_PROMOTED_VAR_P handling
expand_fn_using_insn has code to handle
https://gcc.gnu.org/g:9d20529d94b23275885f380d155fe8671ab5353a
commit r15-1945-g9d20529d94b23275885f380d155fe8671ab5353a
Author: Richard Sandiford
Date: Wed Jul 10 17:01:29 2024 +0100
recog: Handle some mode-changing hardreg propagations
insn_propagation would previously only
https://gcc.gnu.org/g:e08ebd7d77a216ee2313b585c370333c66497b53
commit r15-1944-ge08ebd7d77a216ee2313b585c370333c66497b53
Author: Richard Sandiford
Date: Wed Jul 10 17:01:29 2024 +0100
rtl-ssa: Add replace_nondebug_insn [PR115785]
change_insns is used to change multiple
Georg-Johann Lay writes:
> Is it possible to specify a default value in
> define_code_attr resp. define_mode_attr ?
>
> I had a quick look at read-rtl, and it seem to be not the case.
Yeah, that's right. I'd assumed the attributes would be used
in cases where an active choice has to be made for
Sam James writes:
> Richard Sandiford writes:
>
>> Sam James via Gcc writes:
>>> Hi!
>>>
>>> This comes up in #gcc on IRC every so often, so finally
>>> writing an RFC.
>>>
>> [...]
>>> TL;DR: The proposal is:
>>>
>>> 1) MAINTAINERS should list a field containing either the gcc.gnu.org
>>>
Sam James via Gcc writes:
> Hi!
>
> This comes up in #gcc on IRC every so often, so finally
> writing an RFC.
>
> What?
> ---
>
> I propose that MAINTAINERS be modified to be of the form,
> adding an extra field for their GCC/sourceware account:
>account>
> Joe
https://gcc.gnu.org/g:47ea6bddd15a568cedc5d7026d2cc9d5599e6e01
commit r15-1807-g47ea6bddd15a568cedc5d7026d2cc9d5599e6e01
Author: Richard Sandiford
Date: Wed Jul 3 09:17:42 2024 +0100
Give fast DCE a separate dirty flag
Thomas pointed out that we sometimes failed to eliminate some
https://gcc.gnu.org/g:f6081ee665fd5e4e7d37e02c69d16df0d3eead10
commit r15-1696-gf6081ee665fd5e4e7d37e02c69d16df0d3eead10
Author: Richard Sandiford
Date: Thu Jun 27 14:51:37 2024 +0100
Disable late-combine for -O0 [PR115677]
late-combine relies on df, which for -O0 is only
https://gcc.gnu.org/g:b87e19afa349691fdc91173bcf7a9afc7b3b0cb1
commit r15-1616-gb87e19afa349691fdc91173bcf7a9afc7b3b0cb1
Author: Richard Sandiford
Date: Tue Jun 25 18:02:35 2024 +0100
late-combine: Honor targetm.cannot_copy_insn_p
late-combine was failing to take
https://gcc.gnu.org/g:b6215065a5b14317a342176d5304ecaea3163639
commit r15-1610-gb6215065a5b14317a342176d5304ecaea3163639
Author: Richard Sandiford
Date: Tue Jun 25 12:58:12 2024 +0100
Add a debug counter for late-combine
This should help to diagnose problems like PR115631.
https://gcc.gnu.org/g:b694bf417cdd7d0a4d78e9927bab6bc202b7df6c
commit r15-1606-gb694bf417cdd7d0a4d78e9927bab6bc202b7df6c
Author: Richard Sandiford
Date: Tue Jun 25 09:41:21 2024 +0100
Revert one of the force_subreg changes
One of the changes in
https://gcc.gnu.org/g:a6f7e3ca2961e9315a23ffd99b40f004848f900e
commit r15-1580-ga6f7e3ca2961e9315a23ffd99b40f004848f900e
Author: Richard Sandiford
Date: Mon Jun 24 09:42:16 2024 +0100
Regenerate common.opt.urls
gcc/
* common.opt.urls: Regenerate.
Diff:
---
https://gcc.gnu.org/g:792f97b44ffc5e6a967292b3747fd835e99396e7
commit r15-1579-g792f97b44ffc5e6a967292b3747fd835e99396e7
Author: Richard Sandiford
Date: Mon Jun 24 08:43:19 2024 +0100
Add a late-combine pass [PR106594]
This patch adds a combine pass that runs late in the
https://gcc.gnu.org/g:5185274c76cc3b68a38713273779ec29ae4fe5d2
commit r15-1578-g5185274c76cc3b68a38713273779ec29ae4fe5d2
Author: Richard Sandiford
Date: Mon Jun 24 08:43:18 2024 +0100
rtl-ssa: Rework _ignoring interfaces
rtl-ssa has routines for scanning forwards or backwards for
https://gcc.gnu.org/g:5320bcbd342a985a6e1db60bff2918f73dcad1a0
commit r15-1547-g5320bcbd342a985a6e1db60bff2918f73dcad1a0
Author: Richard Sandiford
Date: Fri Jun 21 15:40:11 2024 +0100
xstormy16: Fix xs_hi_nonmemory_operand
All uses of xs_hi_nonmemory_operand allow constraint "i",
https://gcc.gnu.org/g:8f254cd4e40b692e5f01a3b40f2b5b60c8528a1e
commit r15-1546-g8f254cd4e40b692e5f01a3b40f2b5b60c8528a1e
Author: Richard Sandiford
Date: Fri Jun 21 15:40:10 2024 +0100
iq2000: Fix test and branch instructions
The iq2000 test and branch instructions had patterns
https://gcc.gnu.org/g:4a43a06c7b2bcc3402ac69d6e5ce7b8008acc69a
commit r15-1545-g4a43a06c7b2bcc3402ac69d6e5ce7b8008acc69a
Author: Richard Sandiford
Date: Fri Jun 21 15:40:10 2024 +0100
rtl-ssa: Don't cost no-op moves
No-op moves are given the code NOOP_MOVE_INSN_CODE if we plan
https://gcc.gnu.org/g:f49267e1636872128249431e9e5d20c0908b7e8e
commit r15-1531-gf49267e1636872128249431e9e5d20c0908b7e8e
Author: Richard Sandiford
Date: Fri Jun 21 09:52:42 2024 +0100
sh: Make *minus_plus_one work after RA
*minus_plus_one had no constraints, which meant that it
https://gcc.gnu.org/g:a573ed4367ee685fb1bc50b79239b8b4b69872ee
commit r15-1400-ga573ed4367ee685fb1bc50b79239b8b4b69872ee
Author: Richard Sandiford
Date: Tue Jun 18 12:22:32 2024 +0100
Make more use of force_lowpart_subreg
This patch makes target-independent code use
https://gcc.gnu.org/g:c67a9a9c8e934234b640a613b0ae3c15e7fa9733
commit r15-1402-gc67a9a9c8e934234b640a613b0ae3c15e7fa9733
Author: Richard Sandiford
Date: Tue Jun 18 12:22:33 2024 +0100
aarch64: Add some uses of force_highpart_subreg
This patch adds uses of force_highpart_subreg to
https://gcc.gnu.org/g:e0700fbe35286d31fe64782b255c8d2caec673dc
commit r15-1401-ge0700fbe35286d31fe64782b255c8d2caec673dc
Author: Richard Sandiford
Date: Tue Jun 18 12:22:32 2024 +0100
Add force_highpart_subreg
This patch adds a force_highpart_subreg to go along with the
https://gcc.gnu.org/g:6bd4fbae45d11795a9a6f54b866308d4d7134def
commit r15-1399-g6bd4fbae45d11795a9a6f54b866308d4d7134def
Author: Richard Sandiford
Date: Tue Jun 18 12:22:31 2024 +0100
aarch64: Add some uses of force_lowpart_subreg
This patch makes more use of
https://gcc.gnu.org/g:5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c
commit r15-1398-g5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c
Author: Richard Sandiford
Date: Tue Jun 18 12:22:31 2024 +0100
Add force_lowpart_subreg
optabs had a local function called lowpart_subreg_maybe_copy
that
https://gcc.gnu.org/g:d4047da6a070175aae7121c739d1cad6b08ff4b2
commit r15-1397-gd4047da6a070175aae7121c739d1cad6b08ff4b2
Author: Richard Sandiford
Date: Tue Jun 18 12:22:30 2024 +0100
Make more use of force_subreg
This patch makes target-independent code use force_subreg instead
https://gcc.gnu.org/g:1474a8eead4ab390e59ee014befa8c40346679f4
commit r15-1396-g1474a8eead4ab390e59ee014befa8c40346679f4
Author: Richard Sandiford
Date: Tue Jun 18 12:22:30 2024 +0100
aarch64: Use force_subreg in more places
This patch makes the aarch64 code use force_subreg
https://gcc.gnu.org/g:01044471ea39f9be4803c583ef2a946abc657f99
commit r15-1395-g01044471ea39f9be4803c583ef2a946abc657f99
Author: Richard Sandiford
Date: Tue Jun 18 12:22:30 2024 +0100
Make force_subreg emit nothing on failure
While adding more uses of force_subreg, I realised
https://gcc.gnu.org/g:0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0
commit r15-1244-g0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0
Author: Richard Sandiford
Date: Thu Jun 13 12:48:21 2024 +0100
aarch64: Fix invalid nested subregs [PR115464]
The testcase extracts one arm_neon.h vector from
https://gcc.gnu.org/g:7d64bc0990381221c480ba15cb9cc950e51e2cef
commit r14-10303-g7d64bc0990381221c480ba15cb9cc950e51e2cef
Author: Richard Sandiford
Date: Tue Jun 11 09:58:48 2024 +0100
ira: Fix go_through_subreg offset calculation [PR115281]
go_through_subreg used:
https://gcc.gnu.org/g:a1fb76e041740e7dd8cdf71dff3ae7aa31b3ea9b
commit r11-11468-ga1fb76e041740e7dd8cdf71dff3ae7aa31b3ea9b
Author: Richard Sandiford
Date: Tue Jun 4 13:47:36 2024 +0100
rtl-ssa: Fix -fcompare-debug failure [PR100303]
This patch fixes an oversight in the handling of
https://gcc.gnu.org/g:66d01cc3f4a248ccc471a978f0bfe3615c3f3a30
commit r11-11467-g66d01cc3f4a248ccc471a978f0bfe3615c3f3a30
Author: Richard Sandiford
Date: Tue Jun 4 13:47:35 2024 +0100
rtl-ssa: Extend m_num_defs to a full unsigned int [PR108086]
insn_info tried to save space by
https://gcc.gnu.org/g:95e4252f53bc0e5b66a200c611fd2c9f6f7f2a62
commit r11-11466-g95e4252f53bc0e5b66a200c611fd2c9f6f7f2a62
Author: Richard Sandiford
Date: Tue Jun 4 13:47:35 2024 +0100
vect: Tighten vect_determine_precisions_from_range [PR113281]
This was another PR caused by the
https://gcc.gnu.org/g:741ea10418987ac02eb8e680f2946a6e5928eb23
commit r11-11465-g741ea10418987ac02eb8e680f2946a6e5928eb23
Author: Richard Sandiford
Date: Tue Jun 4 13:47:34 2024 +0100
vect: Fix access size alignment assumption [PR115192]
create_intersect_range_checks checks
https://gcc.gnu.org/g:dfaa13455d67646805bc611aa4373728a460a37d
commit r12-10489-gdfaa13455d67646805bc611aa4373728a460a37d
Author: Richard Sandiford
Date: Tue Jun 4 08:47:48 2024 +0100
vect: Tighten vect_determine_precisions_from_range [PR113281]
This was another PR caused by the
https://gcc.gnu.org/g:f510e59db482456160b8a63dc083c78b0c1f6c09
commit r12-10488-gf510e59db482456160b8a63dc083c78b0c1f6c09
Author: Richard Sandiford
Date: Tue Jun 4 08:47:47 2024 +0100
vect: Fix access size alignment assumption [PR115192]
create_intersect_range_checks checks
https://gcc.gnu.org/g:2602b71103d5ef2ef86000cac832b31dad3dfe2b
commit r13-8813-g2602b71103d5ef2ef86000cac832b31dad3dfe2b
Author: Richard Sandiford
Date: Fri May 31 15:56:05 2024 +0100
vect: Tighten vect_determine_precisions_from_range [PR113281]
This was another PR caused by the
https://gcc.gnu.org/g:0836216693749f3b0b383d015bd36c004754f1da
commit r13-8812-g0836216693749f3b0b383d015bd36c004754f1da
Author: Richard Sandiford
Date: Fri May 31 15:56:04 2024 +0100
vect: Fix access size alignment assumption [PR115192]
create_intersect_range_checks checks
https://gcc.gnu.org/g:36575f5fe491d86b6851ff3f47cbfb7dad0fc8ae
commit r14-10263-g36575f5fe491d86b6851ff3f47cbfb7dad0fc8ae
Author: Richard Sandiford
Date: Fri May 31 08:22:55 2024 +0100
vect: Fix access size alignment assumption [PR115192]
create_intersect_range_checks checks
https://gcc.gnu.org/g:46d931b3dd31cbba7c3355ada63f155aa24a4e2b
commit r15-929-g46d931b3dd31cbba7c3355ada63f155aa24a4e2b
Author: Richard Sandiford
Date: Thu May 30 16:17:58 2024 +0100
ira: Fix go_through_subreg offset calculation [PR115281]
go_through_subreg used:
else
https://gcc.gnu.org/g:39263ed2d39ac1cebde59bc5e72ddcad5dc7a1ec
commit r15-906-g39263ed2d39ac1cebde59bc5e72ddcad5dc7a1ec
Author: Richard Sandiford
Date: Wed May 29 16:43:33 2024 +0100
aarch64: Split aarch64_combinev16qi before RA [PR115258]
Two-vector TBL instructions are fed by
https://gcc.gnu.org/g:a0fe4fb1c8d7804515845dd5d2a814b3c7a1ccba
commit r15-820-ga0fe4fb1c8d7804515845dd5d2a814b3c7a1ccba
Author: Richard Sandiford
Date: Fri May 24 13:47:21 2024 +0100
vect: Fix access size alignment assumption [PR115192]
create_intersect_range_checks checks
https://gcc.gnu.org/g:7f35863ebbf7ba63e2f075edfbec105de272578a
commit r15-752-g7f35863ebbf7ba63e2f075edfbec105de272578a
Author: Richard Sandiford
Date: Tue May 21 10:21:16 2024 +0100
Cache the set of EH_RETURN_DATA_REGNOs
While reviewing Andrew's fix for PR114843, it seemed like
Richard Biener via Gcc writes:
> Hi,
>
> I'd like to discuss how to go forward with getting the vectorizer to
> all-SLP for this stage1. While there is a personal branch with my
> ongoing work (users/rguenth/vect-force-slp) branches haven't proved
> themselves working well for collaboration.
https://gcc.gnu.org/g:b87ba79200f2a727aa5c523abcc5c03fa11fc007
commit r14-9925-gb87ba79200f2a727aa5c523abcc5c03fa11fc007
Author: Andre Vieira (lists)
Date: Thu Apr 11 17:54:37 2024 +0100
aarch64: Fix _BitInt testcases
This patch fixes some testisms introduced by:
commit
https://gcc.gnu.org/g:2c1c2485a4b1aca746ac693041e51ea6da5c64ca
commit r14-9836-g2c1c2485a4b1aca746ac693041e51ea6da5c64ca
Author: Richard Sandiford
Date: Mon Apr 8 16:53:32 2024 +0100
aarch64: Fix expansion of svsudot [PR114607]
Not sure how this happend, but: svsudot is supposed
https://gcc.gnu.org/g:278cad85077509b73b1faf32d36f3889c2a5524b
commit r14-9833-g278cad85077509b73b1faf32d36f3889c2a5524b
Author: Swinney, Jonathan
Date: Mon Apr 8 14:02:33 2024 +0100
aarch64: Fix vld1/st1_x4 intrinsic test
The test for this intrinsic was failing silently and so
https://gcc.gnu.org/g:67cbb1c638d6ab3a9cb77e674541e2b291fb67df
commit r14-9811-g67cbb1c638d6ab3a9cb77e674541e2b291fb67df
Author: Richard Sandiford
Date: Fri Apr 5 14:47:15 2024 +0100
aarch64: Fix bogus cnot optimisation [PR114603]
aarch64-sve.md had a pattern that combined:
https://gcc.gnu.org/g:86dce005a1d440154dbf585dde5a2dd4cfac7a05
commit r14-9787-g86dce005a1d440154dbf585dde5a2dd4cfac7a05
Author: Richard Sandiford
Date: Thu Apr 4 14:15:49 2024 +0100
aarch64: Recognise svundef idiom [PR114577]
GCC 14 adds the header file arm_neon_sve_bridge.h to
https://gcc.gnu.org/g:d98467091bfc23522fefd32f1253e1c9e80331d3
commit r11-11296-gd98467091bfc23522fefd32f1253e1c9e80331d3
Author: Richard Sandiford
Date: Wed Mar 27 19:26:57 2024 +
asan: Handle poly-int sizes in ASAN_MARK [PR97696]
This patch makes the expansion of
https://gcc.gnu.org/g:daee0409d195d346562e423da783d5d1cf8ea175
commit r11-11295-gdaee0409d195d346562e423da783d5d1cf8ea175
Author: Richard Sandiford
Date: Wed Mar 27 19:26:56 2024 +
aarch64: Fix vld1/st1_x4 intrinsic definitions
The vld1_x4 and vst1_x4 patterns use XI
https://gcc.gnu.org/g:51e1629bc11f0ae4b8050712b26521036ed360aa
commit r12-10296-g51e1629bc11f0ae4b8050712b26521036ed360aa
Author: Richard Sandiford
Date: Wed Mar 27 17:38:09 2024 +
asan: Handle poly-int sizes in ASAN_MARK [PR97696]
This patch makes the expansion of
https://gcc.gnu.org/g:86b80b049167d28a9ef43aebdfbb80ae5deb0888
commit r13-8501-g86b80b049167d28a9ef43aebdfbb80ae5deb0888
Author: Richard Sandiford
Date: Wed Mar 27 15:30:19 2024 +
asan: Handle poly-int sizes in ASAN_MARK [PR97696]
This patch makes the expansion of
https://gcc.gnu.org/g:5be2313bceea7b482c17ee730efe604b910800bd
commit r14-9678-g5be2313bceea7b482c17ee730efe604b910800bd
Author: Richard Sandiford
Date: Tue Mar 26 17:27:56 2024 +
aarch64: Use constexpr for out-of-line statics
GCC 4.8 complained about the use of const rather
https://gcc.gnu.org/g:c7a9883663a888617b6e3584233aa756b30519f8
commit r14-9333-gc7a9883663a888617b6e3584233aa756b30519f8
Author: Richard Sandiford
Date: Wed Mar 6 10:04:56 2024 +
aarch64: Define out-of-class static constants
While reworking the aarch64 feature descriptions, I
Richard Earnshaw writes:
> On 28/11/2023 12:52, Surya Kumari Jangala wrote:
>> Hi Richard,
>> Thanks a lot for your response!
>>
>> Another failure reported by the Linaro CI is as follows :
>> (Note: I am planning to send a separate mail for each failure, as this will
>> make
>> the discussion
Iain Sandoe writes:
> Hi Richard,
>
>
> I am being bitten by a problem that falls out from the code that emits
>
> .arch Armv8.n-a+crc
>
> when the arch is less than Armv8-r.
> The code that does this, in gcc/common/config/aarch64 is quite recent
> (2022-09).
Heh. A workaround for one
Andrew Pinski writes:
> On Mon, Sep 25, 2023 at 10:16 AM Richard Sandiford via Gcc
> wrote:
>>
>> Hi,
>>
>> I have a couple of questions about what TARGET_CAN_INLINE_P is
>> alllowed to assume when called from ipa-inline. (Callers from the
>> front-e
Hi,
I have a couple of questions about what TARGET_CAN_INLINE_P is
alllowed to assume when called from ipa-inline. (Callers from the
front-end don't matter for the moment.)
I'm working on an extension where a function F1 without attribute A
can't be inlined into a function F2 with attribute A.
Kewen Lin writes:
> This costing adjustment patch series exposes one issue in
> aarch64 specific costing adjustment for STP sequence. It
> causes the below test cases to fail:
>
> - gcc/testsuite/gcc.target/aarch64/ldp_stp_15.c
> - gcc/testsuite/gcc.target/aarch64/ldp_stp_16.c
> -
Juzhe-Zhong writes:
> According to PR: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110751
>
> As Richard and Richi suggested, we recognize uninitialized SSA_NAME and
> convert it
> into SCRATCH rtx if the target predicate allows SCRATCH.
>
> It can help to reduce redundant data move
Prathamesh Kulkarni writes:
> Hi,
> After 27de9aa152141e7f3ee66372647d0f2cd94c4b90, there's a following
> regression:
> FAIL: gcc.target/aarch64/vect_copy_lane_1.c scan-assembler-times
> ins\\tv0.s\\[1\\], v1.s\\[0\\] 3
>
> This happens because for the following function from vect_copy_lane_1.c:
Wilco Dijkstra writes:
> Support immediate expansion of immediates which can be created from 2 MOVKs
> and a shifted ORR or BIC instruction. Change aarch64_split_dimode_const_store
> to apply if we save one instruction.
>
> This reduces the number of 4-instruction immediates in SPECINT/FP by 5%.
Juzhe-Zhong writes:
> According to PR: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110751
>
> As Richard and Richi suggested, we recognize uninitialized SSA_NAME and
> convert it
> into SCRATCH rtx if the target predicate allows SCRATCH.
>
> It can help to reduce redundant data move
aarch64_operands_ok_for_ldpstp contained the code:
/* One of the memory accesses must be a mempair operand.
If it is not the first one, they need to be swapped by the
peephole. */
if (!aarch64_mem_pair_operand (mem_1, GET_MODE (mem_1))
&& !aarch64_mem_pair_operand (mem_2,
AArch64 previously costed WHILELO instructions on the first call
to add_stmt_cost. This was because, at the time, only add_stmt_cost
had access to the loop_vec_info.
However, after the AVX512 changes, we only calculate the masks later.
This patch moves the WHILELO costing to finish_cost, which
In the following test:
svuint8_t ld(uint8_t *ptr) { return svld1rq(svptrue_b8(), ptr + 2); }
ptr + 2 is a valid address for an Advanced SIMD load, but not for
an SVE load. We therefore ended up generating:
ldr q0, [x0, 2]
dup z0.q, z0.q[0]
This patch makes us
Wilco Dijkstra writes:
> List official cores first so that -cpu=native does not show a codename with -v
> or in errors/warnings.
Nice spot.
> Passes regress, OK for commit?
>
> gcc/ChangeLog:
> * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
> (neoverse-v1):
The stack frame is currently divided into three areas:
A: the area above the hard frame pointer
B: the SVE saves below the hard frame pointer
C: the outgoing arguments
If the stack frame is allocated in one chunk, the allocation needs a
probe if the frame size is >= guard_size - 1KiB. In
AArch64 normally puts the saved registers near the bottom of the frame,
immediately above any dynamic allocations. But this means that a
stack-smash attack on those dynamic allocations could overwrite the
saved registers without needing to reach as far as the stack smash
canary.
The same thing
Previous patches ensured that the final frame allocation only needs
a probe when the size is strictly greater than 1KiB. It's therefore
safe to use the normal 1024 probe offset in all cases.
The main motivation for doing this is to simplify the code and
remove the number of special cases.
gcc/
locals_offset was described as:
/* Offset from the base of the frame (incomming SP) to the
top of the locals area. This value is always a multiple of
STACK_BOUNDARY. */
This is implicitly an “upside down” view of the frame: the incoming
SP is at offset 0, and anything N bytes below
After previous patches, it's no longer necessary to store
saved_regs_size and below_hard_fp_saved_regs_size in the frame info.
All measurements instead use the top or bottom of the frame as
reference points.
gcc/
* config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
The AArch64 ABI says that, when stack clash protection is used,
there can be a maximum of 1KiB of unprobed space at sp on entry
to a function. Therefore, we need to probe when allocating
>= guard_size - 1KiB of data (>= rather than >). This is what
GCC does.
If an allocation is exactly
The frame layout code currently hard-codes the assumption that
the number of bytes below the saved registers is equal to the
size of the outgoing arguments. This patch abstracts that
value into a new field of aarch64_frame.
gcc/
* config/aarch64/aarch64.h
-fstack-clash-protection uses the save of LR as a probe for the next
allocation. The next allocation could be:
* another part of the static frame, e.g. when allocating SVE save slots
or outgoing arguments
* an alloca in the same function
* an allocation made by a callee function
However,
This patch just changes a calculation of initial_adjust
to one that makes it slightly more obvious that the total
adjustment is frame.frame_size.
gcc/
* config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
calculation of initial_adjust for frames in which all saves
are
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