[Bug lto/97812] Wrong output when compiling the testcase with -O2 -flto

2020-11-12 Thread qiaopeixin at huawei dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97812 --- Comment #4 from qiaopeixin at huawei dot com --- (In reply to Martin Liška from comment #2) > Which git revision of GCC 11 do you use? Test it using GCC 11 with commit id 3c3beb1a8137460bc485f9fbe3be8b21ee7f91a2 just now and it also fa

[Bug lto/97812] Wrong output when compiling the testcase with -O2 -flto

2020-11-12 Thread qiaopeixin at huawei dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97812 --- Comment #3 from qiaopeixin at huawei dot com --- (In reply to Jakub Jelinek from comment #1) > On which target? Can't reproduce on x86_64-linux. aarch64

[Bug lto/97812] New: Wrong output when compiling the testcase with -O2 -flto

2020-11-12 Thread qiaopeixin at huawei dot com via Gcc-bugs
Priority: P3 Component: lto Assignee: unassigned at gcc dot gnu.org Reporter: qiaopeixin at huawei dot com CC: marxin at gcc dot gnu.org Target Milestone: --- Hi, gcc-trunk outputs wrong result when compiling the following testcase with -O2 -flto: #include

[Bug target/96479] AArch64: return SIMD register with -mgeneral-regs-only

2020-08-20 Thread qiaopeixin at huawei dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96479 --- Comment #6 from qiaopeixin at huawei dot com --- Fix on https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=a5a635fc4331b6d5f1a1e688e1153abd2ff194a5

RE: [PATCH] AArch64: Add if condition in aarch64_function_value [PR96479]

2020-08-19 Thread qiaopeixin
Thanks. All the best, Peixin -Original Message- From: Richard Sandiford [mailto:richard.sandif...@arm.com] Sent: Wednesday, August 19, 2020 5:56 PM To: qiaopeixin Cc: Christophe Lyon ; gcc-patches@gcc.gnu.org Subject: Re: [PATCH] AArch64: Add if condition in aarch64_function_value

RE: [PATCH] AArch64: Add if condition in aarch64_function_value [PR96479]

2020-08-19 Thread qiaopeixin
All the best, Peixin -Original Message- From: Richard Sandiford [mailto:richard.sandif...@arm.com] Sent: Wednesday, August 19, 2020 1:01 AM To: qiaopeixin Cc: Christophe Lyon ; gcc-patches@gcc.gnu.org Subject: Re: [PATCH] AArch64: Add if condition in aarch64_function_value [PR96479] qiaopeixin

RE: [PATCH] AArch64: Add if condition in aarch64_function_value [PR96479]

2020-08-17 Thread qiaopeixin
Original Message- From: Richard Sandiford [mailto:richard.sandif...@arm.com] Sent: Thursday, August 13, 2020 8:19 PM To: Christophe Lyon Cc: qiaopeixin ; gcc-patches@gcc.gnu.org Subject: Re: [PATCH] AArch64: Add if condition in aarch64_function_value [PR96479] Christophe Lyon writes: > On Th

RE: [PATCH] AArch64: Add if condition in aarch64_function_value [PR96479]

2020-08-12 Thread qiaopeixin
Thanks for the review and commit. All the best, Peixin -Original Message- From: Richard Sandiford [mailto:richard.sandif...@arm.com] Sent: 2020年8月13日 0:25 To: qiaopeixin Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH] AArch64: Add if condition in aarch64_function_value [PR96479

PING: [PATCH] AArch64: Add if condition in aarch64_function_value [PR96479]

2020-08-11 Thread qiaopeixin
PING this issue. -邮件原件- 发件人: qiaopeixin 发送时间: 2020年8月6日 21:01 收件人: 'gcc-patches@gcc.gnu.org' 抄送: 'richard.sandif...@arm.com' 主题: [PATCH] AArch64: Add if condition in aarch64_function_value [PR96479] Hi, The test case vector-subscript-2.c in the gcc testsuit will report an ICE

[PATCH] AArch64: Add if condition in aarch64_function_value [PR96479]

2020-08-06 Thread qiaopeixin
Hi, The test case vector-subscript-2.c in the gcc testsuit will report an ICE in the expand pass since '-mgeneral-regs-only' is incompatible with the use of V4SI mode. I propose to report the diagnostic information instead of ICE, and the problem has been discussed on PR 96479. I attached the

[Bug target/96479] AArch64: return SIMD register with -mgeneral-regs-only

2020-08-05 Thread qiaopeixin at huawei dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96479 --- Comment #2 from qiaopeixin at huawei dot com --- (In reply to Richard Biener from comment #1) > If -mgeneral-regs-only is not supposed to be an ABI changing option then the > compiler has to reject code using non-genera

[Bug target/96479] New: AArch64: return SIMD register with -mgeneral-regs-only

2020-08-05 Thread qiaopeixin at huawei dot com
Component: target Assignee: unassigned at gcc dot gnu.org Reporter: qiaopeixin at huawei dot com Target Milestone: --- Created attachment 49001 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=49001=edit aarch64: vector incompatible with -mgeneral-regs-only Hi, When compil