[Bug rtl-optimization/90706] [9/10 Regression] Useless code generated for stack / register operations on AVR

2019-12-13 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90706 Georg-Johann Lay changed: What|Removed |Added CC||larsch at belunktum dot dk ---

[Bug other/91189] 20% binary size regression in avr-gcc 9.1.0 from 8.3.0

2019-12-13 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91189 Georg-Johann Lay changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|---

[Bug other/92606] [8/9/10 Regression][avr] invalid merge of symbols in progmem and data sections

2019-12-13 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92606 --- Comment #4 from Georg-Johann Lay --- The problem is that there isn't even a target hook to disallow such optimizations, files as as PR92932. In a respective hook, at least the attributes and address spaces of either object must be

[Bug tree-optimization/92932] Optimizers generate wrong code due to aggressive data optimization.

2019-12-13 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92932 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |NEW Blocks|

[Bug tree-optimization/92932] New: Optimizers generate wrong code due to aggressive data optimization.

2019-12-13 Thread gjl at gcc dot gnu.org
Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- GCC sometimes aliases symbols if they refer to identical data. However, in order for this to be legitimate optimization

[Bug other/92606] [8/9/10 Regression][avr] invalid merge of symbols in progmem and data sections

2019-12-13 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92606 --- Comment #3 from Georg-Johann Lay --- Created attachment 47485 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=47485=edit 123f.c: C test case with address space __flash. ...and the code is also wrong with address spaces like __flash

[Bug other/92606] [8/9/10 Regression][avr] invalid merge of symbols in progmem and data sections

2019-12-13 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92606 Georg-Johann Lay changed: What|Removed |Added Keywords||wrong-code

[Bug target/92606] [avr] invalid merge of symbols in progmem and data sections

2019-12-13 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92606 --- Comment #1 from Georg-Johann Lay --- Created attachment 47484 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=47484=edit 123.c: C test case. Confirmed with the attached test case compiler with $ avr-gcc -mmcu=atmega128 123.c -flto -Os

[Bug target/92055] [avr] Support 64-bit double

2019-12-05 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 --- Comment #12 from Georg-Johann Lay --- Author: gjl Date: Thu Dec 5 09:47:35 2019 New Revision: 278992 URL: https://gcc.gnu.org/viewcvs?rev=278992=gcc=rev Log: PR target/92055 * config/avr/t-avrlibc (MULTISUBDIR): Search for

[Bug target/92055] [avr] Support 64-bit double

2019-11-28 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 --- Comment #11 from Georg-Johann Lay --- Author: gjl Date: Thu Nov 28 10:29:30 2019 New Revision: 278805 URL: https://gcc.gnu.org/viewcvs?rev=278805=gcc=rev Log: Must use push insn to pass varargs arguments of DFmode because

[Bug target/92055] [avr] Support 64-bit double

2019-11-25 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 --- Comment #10 from Georg-Johann Lay --- Author: gjl Date: Mon Nov 25 08:59:06 2019 New Revision: 278668 URL: https://gcc.gnu.org/viewcvs?rev=278668=gcc=rev Log: gcc/ Build double32 / long-double32 multilibs if needed. PR

[Bug target/92545] avr: support ATmega devices from the 0-series

2019-11-20 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92545 --- Comment #5 from Georg-Johann Lay --- Author: gjl Date: Wed Nov 20 08:19:44 2019 New Revision: 278478 URL: https://gcc.gnu.org/viewcvs?rev=278478=gcc=rev Log: Make 0-series device specs work with older versions of avr-gcc. PR

[Bug target/92545] avr: support ATmega devices from the 0-series

2019-11-18 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92545 --- Comment #4 from Georg-Johann Lay --- Author: gjl Date: Mon Nov 18 08:19:08 2019 New Revision: 278389 URL: https://gcc.gnu.org/viewcvs?rev=278389=gcc=rev Log: PR target/92545 * config/avr/gen-avr-mmcu-specs.c (print_mcu)

[Bug target/92545] avr: support ATmega devices from the 0-series

2019-11-17 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92545 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/92545] avr: support ATmega devices from the 0-series

2019-11-17 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92545 --- Comment #2 from Georg-Johann Lay --- Author: gjl Date: Mon Nov 18 07:54:30 2019 New Revision: 278388 URL: https://gcc.gnu.org/viewcvs?rev=278388=gcc=rev Log: PR target/92545 * doc/avr-mmcu.texi: Regenerate. Modified:

[Bug target/92545] avr: support ATmega devices from the 0-series

2019-11-17 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92545 --- Comment #1 from Georg-Johann Lay --- Author: gjl Date: Mon Nov 18 07:52:55 2019 New Revision: 278387 URL: https://gcc.gnu.org/viewcvs?rev=278387=gcc=rev Log: Add support for AVR devices from the 0-series. PR target/92545

[Bug target/92545] avr: support ATmega devices from the 0-series

2019-11-17 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92545 Georg-Johann Lay changed: What|Removed |Added Target||avr Priority|P3

[Bug target/92545] New: avr: support ATmega devices from the 0-series

2019-11-17 Thread gjl at gcc dot gnu.org
Component: target Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- ...like ATmega4808.

[Bug target/92055] [avr] Support 64-bit double

2019-11-13 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 --- Comment #9 from Georg-Johann Lay --- Author: gjl Date: Wed Nov 13 08:18:35 2019 New Revision: 278115 URL: https://gcc.gnu.org/viewcvs?rev=278115=gcc=rev Log: PR target/92055 * config/avr/t-avr (avr-mcus): Do not depend on

[Bug target/92055] [avr] Support 64-bit double

2019-11-08 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 --- Comment #8 from Georg-Johann Lay --- Author: gjl Date: Fri Nov 8 08:49:07 2019 New Revision: 277954 URL: https://gcc.gnu.org/viewcvs?rev=277954=gcc=rev Log: PR target/92055 * config/avr/avr.opt (-mdouble=, -mlong-double=):

[Bug target/92055] [avr] Support 64-bit double

2019-11-07 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED URL|

[Bug target/92055] [avr] Support 64-bit double

2019-11-07 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 --- Comment #6 from Georg-Johann Lay --- Author: gjl Date: Thu Nov 7 09:19:31 2019 New Revision: 277908 URL: https://gcc.gnu.org/viewcvs?rev=277908=gcc=rev Log: gcc/ Support 64-bit double and 64-bit long double configurations.

[Bug rtl-optimization/90706] [9/10 Regression] Useless code generated for stack / register operations on AVR

2019-11-04 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90706 --- Comment #5 from Georg-Johann Lay --- Created attachment 47173 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=47173=edit bloat.c: A trivial test case demonstrating the problem. A (small) part of the overhead can be worked around with

[Bug target/92055] [avr] Support 64-bit double

2019-10-31 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 --- Comment #5 from Georg-Johann Lay --- Created attachment 47149 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=47149=edit double64-6.diff: Support --with-double={|32|64|32,64|64,32} --with-long-double={|32|64|32,64|64,32,double} gcc/

[Bug target/85969] avr/gen-avr-mmcu-specs.c:56: unused function ?

2019-10-25 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85969 Georg-Johann Lay changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/85969] avr/gen-avr-mmcu-specs.c:56: unused function ?

2019-10-25 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85969 --- Comment #4 from Georg-Johann Lay --- Author: gjl Date: Fri Oct 25 15:13:23 2019 New Revision: 277455 URL: https://gcc.gnu.org/viewcvs?rev=277455=gcc=rev Log: PR target/85969 * config/avr/gen-avr-mmcu-specs.c (str_prefix_p):

[Bug target/92055] [avr] Support 64-bit double

2019-10-25 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 --- Comment #4 from Georg-Johann Lay --- Created attachment 47114 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=47114=edit double64-5.diff: Support --with-double={32|64} --with-long-double={32|64}

[Bug rtl-optimization/90706] [9/10 Regression] Useless code generated for stack / register operations on AVR

2019-10-24 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90706 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug tree-optimization/92152] [10 Regression] Wrong code (Resurrection of PR53663)

2019-10-21 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92152 --- Comment #3 from Georg-Johann Lay --- (In reply to Richard Biener from comment #2) > Hmm, on avr int == short == int16_t, right? Correct.

[Bug testsuite/52641] Test cases fail for 16-bit int targets

2019-10-21 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52641 --- Comment #18 from Georg-Johann Lay --- Author: gjl Date: Mon Oct 21 06:54:42 2019 New Revision: 277236 URL: https://gcc.gnu.org/viewcvs?rev=277236=gcc=rev Log: Fix some fallout for small targets. PR testsuite/52641 *

[Bug other/92152] [10 Regression] Wring code (Resurrection of PR53663)

2019-10-18 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92152 --- Comment #1 from Georg-Johann Lay --- configure: Target: avr Configured with: ../../gcc.gnu.org/trunk/configure --target=avr --prefix=/local/gnu/install/gcc-10 --disable-shared --disable-nls --with-dwarf2 --enable-target-optspace=yes

[Bug other/92152] New: [10 Regression] Wring code (Resurrection of PR53663)

2019-10-18 Thread gjl at gcc dot gnu.org
Priority: P3 Component: other Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Target: avr The following test case from GCC testsuite runs into abort. https://gcc.gnu.org/viewcvs/gcc/trunk/gcc/testsuite

[Bug target/86040] [avr]: RAMPZ is not always cleared after loading __flashN data

2019-10-18 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86040 Georg-Johann Lay changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/86040] [avr]: RAMPZ is not always cleared after loading __flashN data

2019-10-18 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86040 --- Comment #10 from Georg-Johann Lay --- Author: gjl Date: Fri Oct 18 09:16:16 2019 New Revision: 277149 URL: https://gcc.gnu.org/viewcvs?rev=277149=gcc=rev Log: Backport from 2019-10-18 trunk r277143. PR target/86040 *

[Bug target/86040] [avr]: RAMPZ is not always cleared after loading __flashN data

2019-10-18 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86040 --- Comment #9 from Georg-Johann Lay --- Author: gjl Date: Fri Oct 18 09:12:34 2019 New Revision: 277148 URL: https://gcc.gnu.org/viewcvs?rev=277148=gcc=rev Log: Backport from 2019-10-18 trunk r277143. PR target/86040 *

[Bug target/86040] [avr]: RAMPZ is not always cleared after loading __flashN data

2019-10-18 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86040 --- Comment #8 from Georg-Johann Lay --- Author: gjl Date: Fri Oct 18 09:10:20 2019 New Revision: 277147 URL: https://gcc.gnu.org/viewcvs?rev=277147=gcc=rev Log: Backport from 2019-10-18 trunk r277143. PR target/86040 *

[Bug target/86040] [avr]: RAMPZ is not always cleared after loading __flashN data

2019-10-18 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86040 --- Comment #7 from Georg-Johann Lay --- Author: gjl Date: Fri Oct 18 06:53:34 2019 New Revision: 277143 URL: https://gcc.gnu.org/viewcvs?rev=277143=gcc=rev Log: PR target/86040 * config/avr/avr.c (avr_out_lpm): Do not

[Bug testsuite/52641] Test cases fail for 16-bit int targets

2019-10-18 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52641 --- Comment #17 from Georg-Johann Lay --- Author: gjl Date: Fri Oct 18 06:46:03 2019 New Revision: 277142 URL: https://gcc.gnu.org/viewcvs?rev=277142=gcc=rev Log: gcc/testsuite/ Fix some fallout for small targets. PR

[Bug target/92055] [avr] Support 64-bit double

2019-10-14 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 --- Comment #3 from Georg-Johann Lay --- Created attachment 47030 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=47030=edit double64-4.diff: patch that also supports --with-long-double64

[Bug target/91189] 20% binary size regression in avr-gcc 9.1.0 from 8.3.0

2019-10-14 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91189 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |WAITING Last reconfirmed|

[Bug target/92055] [avr] Support 64-bit double

2019-10-11 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 --- Comment #2 from Georg-Johann Lay --- Created attachment 47023 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=47023=edit double63-3.diff: Patch including libgcc bits.

[Bug target/92055] [avr] Support 64-bit double

2019-10-11 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 Georg-Johann Lay changed: What|Removed |Added Priority|P3 |P4

[Bug target/92055] [avr] Support 64-bit double

2019-10-10 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92055 --- Comment #1 from Georg-Johann Lay --- Created attachment 47015 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=47015=edit Proposed extension.

[Bug target/92055] New: [avr] Support 64-bit double

2019-10-10 Thread gjl at gcc dot gnu.org
Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Enhancement to support IEEE compatible double.

[Bug target/86040] [avr]: RAMPZ is not always cleared after loading __flashN data

2019-10-09 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86040 --- Comment #6 from Georg-Johann Lay --- Created attachment 47009 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=47009=edit proposed patch

[Bug target/91189] 20% binary size regression in avr-gcc 9.1.0 from 8.3.0

2019-07-31 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91189 --- Comment #2 from Georg-Johann Lay --- How did you conclude it's a target issue? Would you pinpoint where in the avr backend the problem is?

[Bug rtl-optimization/90706] [9 Regression] Useless code generated for stack / register operations on AVR

2019-06-03 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90706 Georg-Johann Lay changed: What|Removed |Added Component|target |rtl-optimization

[Bug target/90622] Suboptimal code generated for __builtin_avr_insert_bits

2019-05-31 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90622 Georg-Johann Lay changed: What|Removed |Added Priority|P3 |P5 Status|UNCONFIRMED

[Bug middle-end/89270] [9 regression] AVR ICE: verify_gimple failed

2019-04-07 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89270 --- Comment #2 from Georg-Johann Lay --- (In reply to gandalf from comment #0) > I get an ICE For the time being, you can work around this by a macro from AVR-LibC or some equivalent inline asm: #include void test() { extern const char

[Bug middle-end/87854] [9 Regression] gcc.c-torture/compile/pr46534.c ICE for 16-bit size_t

2018-11-07 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87854 --- Comment #1 from Georg-Johann Lay --- (In reply to Jozef Lawrynowicz from comment #0) > Rather than ICE'ing should there be some error message about object size > being too large? Yes. In any case, there should be no ICE whatever code you

[Bug middle-end/78707] [6 Regression] internal compiler error: in push_reload, at reload.c:1349

2018-11-07 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78707 Georg-Johann Lay changed: What|Removed |Added Known to work||7.1.1, 8.0.1 --- Comment #3 from

[Bug target/65657] [avr] read from __memx address space tramples argument to following function

2018-10-14 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65657 --- Comment #8 from Georg-Johann Lay --- Also duplicate of PR86635, aleady assigned to Senthil. *** This bug has been marked as a duplicate of bug 86635 ***

[Bug target/86635] [avr] Miscompilation with __memx and libgcc float function __gtsf2

2018-10-14 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86635 Georg-Johann Lay changed: What|Removed |Added CC||jonathan.creekmore@synapse-

[Bug target/87376] [avr] Miscompilation with __memx and long long addition

2018-10-14 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87376 Georg-Johann Lay changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/86635] [avr] Miscompilation with __memx and libgcc float function __gtsf2

2018-10-14 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86635 --- Comment #4 from Georg-Johann Lay --- *** Bug 87376 has been marked as a duplicate of this bug. ***

[Bug target/87376] [avr] Miscompilation with __memx and long long addition

2018-10-12 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87376 --- Comment #4 from Georg-Johann Lay --- Unfortunately, the solution from above won't work for PR65657, an issue that is basically the same: early use of explicit hard-regs and propagations from TER. Hence -fno-tree-ter can be used as

[Bug target/87376] [avr] Miscompilation with __memx and long long addition

2018-10-12 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87376 Georg-Johann Lay changed: What|Removed |Added CC||jonathan.creekmore@synapse-

[Bug target/65657] [avr] read from __memx address space tramples argument to following function

2018-10-12 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65657 --- Comment #7 from Georg-Johann Lay --- *** This bug has been marked as a duplicate of bug 87376 ***

[Bug target/87376] [avr] Miscompilation with __memx and long long addition

2018-10-11 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87376 --- Comment #2 from Georg-Johann Lay --- Note: As TER performs the propagation, a work-around is to compile with -fno-tree-ter.

[Bug target/87376] [avr] Miscompilation with __memx and long long addition

2018-10-11 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87376 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/85969] avr/gen-avr-mmcu-specs.c:56: unused function ?

2018-07-24 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85969 Georg-Johann Lay changed: What|Removed |Added Priority|P3 |P5 Status|WAITING

[Bug target/86635] [avr] Miscompilation with __memx and libgcc float function __gtsf2

2018-07-23 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86635 --- Comment #3 from Georg-Johann Lay --- As a work-around -fno-tree-ter appears to work.

[Bug target/86635] [avr] Miscompilation with __memx and libgcc float function __gtsf2

2018-07-23 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86635 Georg-Johann Lay changed: What|Removed |Added Keywords||wrong-code --- Comment #2 from

[Bug target/86040] [avr]: RAMPZ is not always cleared after loading __flashN data

2018-07-22 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86040 --- Comment #5 from Georg-Johann Lay --- Created attachment 44416 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=44416=edit C test case for movmem The movmem from ASes __flash1 ... __flash5 is also affected. As the place to fix I'd

[Bug target/86040] [avr]: RAMPZ is not always cleared after loading __flashN data

2018-07-19 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86040 --- Comment #4 from Georg-Johann Lay --- Created attachment 44412 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=44412=edit C test case.

[Bug target/86040] [avr]: RAMPZ is not always cleared after loading __flashN data

2018-07-19 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86040 --- Comment #3 from Georg-Johann Lay --- ...and here is code that triggers the wrong path of the 2-byte case: typedef struct S { const __flash2 struct S *p; struct S *q; } S; const __flash2 S* func2 (const S *s) { return

[Bug rtl-optimization/85805] Improper code generation for 64 bit comparisons on avr-gcc

2018-07-16 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85805 Georg-Johann Lay changed: What|Removed |Added Status|WAITING |NEW Component|target

[Bug target/86040] [avr]: RAMPZ is not always cleared after loading __flashN data

2018-07-16 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86040 Georg-Johann Lay changed: What|Removed |Added Keywords||wrong-code

[Bug target/85624] ICE when initializing array that is 128-byte aligned

2018-07-16 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85624 --- Comment #1 from Georg-Johann Lay --- Shouldn't this use the library routine because setmemhi expander FAILs when operands[1] is not a const_int? It is (reg:QI 48) which is not a const_int.

[Bug target/85969] avr/gen-avr-mmcu-specs.c:56: unused function ?

2018-06-03 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85969 Georg-Johann Lay changed: What|Removed |Added Keywords||build Status|UNCONFIRMED

[Bug c++/82658] Suboptimal codegen on AVR when right-shifting 8-bit unsigned integers.

2018-04-26 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82658 Georg-Johann Lay changed: What|Removed |Added CC||randy.brecker64 at gmail dot com

[Bug c++/85533] Missing optimization for right-shift of unsigned int (avr-g++)

2018-04-26 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85533 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug lto/85495] lto-wrapper.exe: fatal error: file too short: No error

2018-04-22 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85495 --- Comment #5 from Georg-Johann Lay --- Is this related to PR85238 ?

[Bug lto/85495] lto-wrapper.exe: fatal error: file too short: No error

2018-04-22 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85495 --- Comment #4 from Georg-Johann Lay --- The file c:\Temp\ccwCcYxWdebugobj is empty.

[Bug lto/85495] lto-wrapper.exe: fatal error: file too short: No error

2018-04-22 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85495 --- Comment #3 from Georg-Johann Lay --- Created attachment 44005 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=44005=edit INtermediate o file

[Bug lto/85495] lto-wrapper.exe: fatal error: file too short: No error

2018-04-22 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85495 --- Comment #2 from Georg-Johann Lay --- Created attachment 44004 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=44004=edit Intermediate s file.

[Bug lto/85495] lto-wrapper.exe: fatal error: file too short: No error

2018-04-22 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85495 --- Comment #1 from Georg-Johann Lay --- Created attachment 44003 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=44003=edit Precompiled C source.

[Bug lto/85495] New: lto-wrapper.exe: fatal error: file too short: No error

2018-04-22 Thread gjl at gcc dot gnu.org
Component: lto Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org CC: marxin at gcc dot gnu.org Target Milestone: --- $ avr-gcc -mmcu=atmega168 -Os -flto -save-temps main-i.c -c $ avr-gcc -mmcu=atmega168 -Os -flto -save-temps -o main.elf

[Bug libgcc/61152] Missing GCC Runtime Library Exception in some files that are included in libgcc

2018-04-14 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61152 --- Comment #10 from Georg-Johann Lay --- (In reply to Eric Gallager from comment #9) > There have been a bunch of commits for this bug; is it fixed yet? Dunno, back then I focused only on two targets, namely ARM and V850. Neither did I

[Bug other/63630] [5.0 Regression] ICE: in spill_failure, at reload1.c:2122. unable to find a register to spill in class 'POINTER_REGS'

2018-03-23 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63630 --- Comment #8 from Georg-Johann Lay --- (In reply to Eric Gallager from comment #6) > gcc-5 branch is closed; is this bug still valid for newer branches? ...and for such "spill fails" it's impossible to tell, at least for me, whether they are

[Bug other/63630] [5.0 Regression] ICE: in spill_failure, at reload1.c:2122. unable to find a register to spill in class 'POINTER_REGS'

2018-03-23 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63630 --- Comment #7 from Georg-Johann Lay --- (In reply to Eric Gallager from comment #6) > gcc-5 branch is closed; is this bug still valid for newer branches? Reload flaws are usually very "instable" w.r.t. to the test case(s) that thrigger them.

[Bug c++/84801] New: ICE: Segmentation fault instead of "error: parameter packs not expanded with '...'"

2018-03-10 Thread gjl at gcc dot gnu.org
NCONFIRMED Severity: normal Priority: P3 Component: c++ Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- int v; int main() { [](auto... c) { v = c; }(1); } triggers ICE with v8: $ avr-g++ foo.cpp -std=gnu++14

[Bug target/84209] [avr] Don't split SP in split2

2018-03-07 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84209 Georg-Johann Lay changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug tree-optimization/57503] Missing warning for signed overflow

2018-03-03 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57503 Georg-Johann Lay changed: What|Removed |Added Severity|normal |enhancement

[Bug driver/47785] GCC with -flto does not pass -Wa options to the assembler

2018-02-06 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=47785 Georg-Johann Lay changed: What|Removed |Added CC||gjl at gcc dot gnu.org --- Comment

[Bug driver/84230] LTO: -Wa argument not passed through to the assembler

2018-02-06 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84230 Georg-Johann Lay changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug driver/84230] New: LTO: -Wa argument not passed through to the assembler

2018-02-06 Thread gjl at gcc dot gnu.org
Component: driver Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Compiling the program below $ gcc a-warn.c -Wa,--no-warn __asm (".warning \"Some Warning\""); int main() { } assembles without a diagnosti

[Bug target/84211] [avr] Perform a post-reload register optimization pass

2018-02-05 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84211 Georg-Johann Lay changed: What|Removed |Added Keywords||missed-optimization

[Bug target/84211] New: [avr] Perform a post-reload register optimization pass

2018-02-05 Thread gjl at gcc dot gnu.org
Component: target Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Created attachment 43339 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=43339=edit proposed patch Some of register allocation fallout could be fi

[Bug target/84209] [avr] Don't split SP in split2

2018-02-05 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84209 --- Comment #1 from Georg-Johann Lay --- Created attachment 43338 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=43338=edit Proposed patch against v7

[Bug target/84209] [avr] Don't split SP in split2

2018-02-05 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84209 Georg-Johann Lay changed: What|Removed |Added Status|ASSIGNED|NEW Assignee|gjl at gcc

[Bug target/84209] [avr] Don't split SP in split2

2018-02-05 Thread gjl at gcc dot gnu.org
||avr Priority|P3 |P4 Status|UNCONFIRMED |ASSIGNED Last reconfirmed||2018-02-05 Assignee|unassigned at gcc dot gnu.org |gjl at gcc dot gnu.org Ever confirmed|0

[Bug target/84209] New: [avr] Don't split SP in split2

2018-02-05 Thread gjl at gcc dot gnu.org
Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- Since r242907 there is a split for HI moved that might also split SP. This might lead to wrong code. Using -fdisable-rtl-split2 might do as a work-around.

[Bug testsuite/52641] Test cases fail for 16-bit int targets

2018-02-02 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52641 --- Comment #16 from Georg-Johann Lay --- Author: gjl Date: Fri Feb 2 15:07:37 2018 New Revision: 257333 URL: https://gcc.gnu.org/viewcvs?rev=257333=gcc=rev Log: PR testsuite/52641 * gcc.c-torture/execute/pr83362.c: Make work

[Bug testsuite/52641] Test cases fail for 16-bit int targets

2018-02-02 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52641 --- Comment #15 from Georg-Johann Lay --- Author: gjl Date: Fri Feb 2 11:36:54 2018 New Revision: 257327 URL: https://gcc.gnu.org/viewcvs?rev=257327=gcc=rev Log: PR testsuite/52641 * gcc.c-torture/execute/pr81913.c: Use types

[Bug c/84163] [avr] Allow address space qualifier for compound literals

2018-02-01 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84163 Georg-Johann Lay changed: What|Removed |Added Keywords||addr-space Target|

[Bug c/84163] New: [avr] Allow address space qualifier for compound literals

2018-02-01 Thread gjl at gcc dot gnu.org
Priority: P3 Component: c Assignee: unassigned at gcc dot gnu.org Reporter: gjl at gcc dot gnu.org Target Milestone: --- avr-gcc currently accepts address-space qualifiers in compound literals provided this is outside of a function: #define FSTR(X) ((const __flash

[Bug c++/82658] Suboptimal codegen on AVR when right-shifting 8-bit unsigned integers.

2018-01-30 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82658 Georg-Johann Lay changed: What|Removed |Added Component|middle-end |c++ --- Comment #3 from Georg-Johann

[Bug tree-optimization/81611] [8 Regression] gcc un-learned loop / post-increment optimization

2018-01-25 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81611 --- Comment #20 from Georg-Johann Lay --- A bit of the bloat reported in PR81625 is also due to missed post-inc addressing, so it might be worth a look if you are after more test cases. (Current 8.0.1 perfomrs better than 8.0.0 I used back then:

[Bug tree-optimization/81611] [8 Regression] gcc un-learned loop / post-increment optimization

2018-01-25 Thread gjl at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81611 --- Comment #19 from Georg-Johann Lay --- Hi, thanks for all that work and efforts. I tried that patch for the following small test: extern void foo (void); extern char volatile vv; void func2 (const int *p) { while (1) { int

<    1   2   3   4   5   6   7   8   9   10   >