[Bug tree-optimization/99656] [11 Regression] ICE in linear_loads_p

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99656 Tamar Christina changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |tnfchris at gcc dot gnu.org --

[Bug tree-optimization/99746] ICE in vect_get_vec_defs_for_operand, at tree-vect-stmts.c:1450

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99746 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org --- Commen

[Bug tree-optimization/99746] ICE in vect_get_vec_defs_for_operand, at tree-vect-stmts.c:1450

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99746 --- Comment #4 from Tamar Christina --- > I can reproduce it. You likely named the file x.f90 (and not x.f). Please try > that.. Aha.. Fortran such a mystery :) > Do you want me to bisect that? No, they'll all point to the commit which introd

[Bug tree-optimization/99746] [11 Regression] ICE in vect_get_vec_defs_for_operand, at tree-vect-stmts.c:1450

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99746 Tamar Christina changed: What|Removed |Added Status|NEW |ASSIGNED --- Comment #7 from Tamar Chr

[Bug tree-optimization/99746] [11 Regression] ICE in vect_get_vec_defs_for_operand, at tree-vect-stmts.c:1450

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99746 --- Comment #9 from Tamar Christina --- @Arseny, Thanks for reporting these. I wonder if whatever you're compiling is open source. I'd love to fix some of these cases properly in GCC 12.

[Bug tree-optimization/99746] [11 Regression] ICE in vect_get_vec_defs_for_operand, at tree-vect-stmts.c:1450

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99746 --- Comment #13 from Tamar Christina --- (In reply to Arseny Solokha from comment #10) > (In reply to Tamar Christina from comment #9) > > I wonder if whatever you're compiling is open source. I'd love to fix some > > of these cases properly in

[Bug tree-optimization/99746] [11 Regression] ICE in vect_get_vec_defs_for_operand, at tree-vect-stmts.c:1450

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99746 --- Comment #14 from Tamar Christina --- (In reply to Richard Biener from comment #12) > Btw, the following also works as a fix but obviously I'm not in a position > to fully evaluate this. That said, hybrid SLP detection was rewritten during >

[Bug tree-optimization/99746] [11 Regression] ICE in vect_get_vec_defs_for_operand, at tree-vect-stmts.c:1450

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99746 --- Comment #18 from Tamar Christina --- (In reply to Arseny Solokha from comment #15) > (In reply to Tamar Christina from comment #13) > > (In reply to Arseny Solokha from comment #10) > > > (In reply to Tamar Christina from comment #9) > > > >

[Bug target/99825] [11 Regression] ICE in vect_build_combine_node

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99825 Tamar Christina changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |tnfchris at gcc dot gnu.org --

[Bug tree-optimization/99825] [11 Regression] ICE in vect_build_combine_node

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99825 Tamar Christina changed: What|Removed |Added Component|target |tree-optimization Status|N

[Bug tree-optimization/99825] [11 Regression] ICE in vect_build_combine_node

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99825 Tamar Christina changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug rtl-optimization/96264] [10 Regression] wrong code with -Os -fno-forward-propagate -fschedule-insns -fno-tree-ter

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96264 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org --- Commen

[Bug target/99924] [11 Regression] ICE in vect_schedule_slp_node, at tree-vect-slp.c:6040 since r11-6734-gad2603433853129e847cade5e269c6a5f889a020

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99924 --- Comment #3 from Tamar Christina --- (In reply to Richard Biener from comment #2) > Confirmed. I will have a look. It's interesting since the cost model needs to be disabled to reproduce it. It looks like when it is one of the load nodes al

[Bug target/100048] New: [10/11 Regression] Wrongful CSE'ing of SVE predicates.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100048 Bug ID: 100048 Summary: [10/11 Regression] Wrongful CSE'ing of SVE predicates. Product: gcc Version: 11.0 Status: UNCONFIRMED Keywords: wrong-code Severity: normal

[Bug target/100048] [10/11 Regression] Wrongful CSE'ing of SVE predicates.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100048 --- Comment #1 from Tamar Christina --- Correction, it's CSE'd into foo: pfalse p1.b ptrue p0.d, all trn1p0.d, p0.d, p1.d faddv h0, p0, z0.h str h0, [x0] str h0, [x0, 2] r

[Bug target/100048] [10/11 Regression] Wrongful CSE'ing of SVE predicates.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100048 Tamar Christina changed: What|Removed |Added Ever confirmed|0 |1 Last reconfirmed|

[Bug tree-optimization/88492] SLP optimization generates ugly code

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88492 --- Comment #7 from Tamar Christina --- (In reply to ptomsich from comment #6) > With the current master, the test case generates (with -mcpu=neoverse-n1): > which contrasts with LLVM13 (with -mcpu=neoverse-n1): > > test_slp:

[Bug target/100048] [10/11 Regression] Wrongful CSE'ing of SVE predicates.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100048 Tamar Christina changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug rtl-optimization/97535] [9/10/11 Regression] On AArch64 memcpy expansion cannot handle length > 32-bit signed int max

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97535 --- Comment #4 from Tamar Christina --- Yeah, the overflow in the signed type is causing the number of instructions guard to fail. I'll submit a patch.

[Bug driver/97574] Allow for nul output with Windows

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97574 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org --- Commen

[Bug target/97535] [9/10 Regression] On AArch64 memcpy expansion cannot handle length > 32-bit signed int max

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97535 Tamar Christina changed: What|Removed |Added Summary|[9/10/11 Regression] On |[9/10 Regression] On

[Bug driver/97574] Allow for nul output with Windows

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97574 --- Comment #4 from Tamar Christina --- Submitted a patch to get the driver to stop mangling nul so it makes it easier for binutils to detect. That said Jonathan is right in that there's still a binutils bug here. I had forgotten that even thoug

[Bug c/97769] New: [11 Regression] vectorizer ICE when building perlbench in SPECCPU 2017

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97769 Bug ID: 97769 Summary: [11 Regression] vectorizer ICE when building perlbench in SPECCPU 2017 Product: gcc Version: 11.0 Status: UNCONFIRMED Keywords: ice-on-va

[Bug c/97769] [11 Regression] vectorizer ICE when building perlbench in SPECCPU 2017

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97769 --- Comment #1 from Tamar Christina --- This seems to go away if you initialize a in `int a`.

[Bug middle-end/97769] [11 Regression] vectorizer ICE when building perlbench in SPECCPU 2017

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97769 --- Comment #6 from Tamar Christina --- Thanks Richi!

[Bug bootstrap/97809] New: [11 Regression] AArch64 bootstrap broken, ICE when building mpf after g:86cca5cc14602814b98e55aae313fbe237af1b04

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97809 Bug ID: 97809 Summary: [11 Regression] AArch64 bootstrap broken, ICE when building mpf after g:86cca5cc14602814b98e55aae313fbe237af1b04 Product: gcc Version: 11.0

[Bug bootstrap/97809] [11 Regression] AArch64 bootstrap broken, ICE when building mpf after g:86cca5cc14602814b98e55aae313fbe237af1b04

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97809 Tamar Christina changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug bootstrap/97806] [11 regression] bootstrap ICE starting with r11-4921

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97806 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org --- Commen

[Bug target/97535] [9/10 Regression] On AArch64 memcpy expansion cannot handle length > 32-bit signed int max

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97535 Tamar Christina changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug target/97535] [9/10 Regression] On AArch64 memcpy expansion cannot handle length > 32-bit signed int max

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97535 Tamar Christina changed: What|Removed |Added Resolution|FIXED |--- Status|RESOLVED

[Bug target/97535] [9/10 Regression] On AArch64 memcpy expansion cannot handle length > 32-bit signed int max

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97535 --- Comment #15 from Tamar Christina --- Hmm indeed. I only saw it was doing unsigned arithmetic. I'll patch that one too.

[Bug target/97535] [9/10 Regression] On AArch64 memcpy expansion cannot handle length > 32-bit signed int max

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97535 Tamar Christina changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug other/97911] [11 regression] make install issue undefined reference to std::__throw_bad_array_new_length after r11-5142

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97911 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org

[Bug other/97911] [11 regression] make install issue undefined reference to std::__throw_bad_array_new_length after r11-5142

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97911 --- Comment #3 from Tamar Christina --- Thanks Jakub, that patch does seem to fix the AArch64 build.

[Bug fortran/97224] [8/9/10/11 Regression] SPECCPU 2006 Gamess fails to build after g:e5a76af3a2f3324efc60b4b2778ffb29d5c377bc

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97224 --- Comment #12 from Tamar Christina --- @Martin I believe this was re-opened as the patch was reverted on master but was still pending reverts on the release branches. @Mark I assume you committed the reverts to the branches too?

[Bug middle-end/98264] ice during linear_loads_p

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98264 Tamar Christina changed: What|Removed |Added CC|tamar.christina at arm dot com |tnfchris at gcc dot gnu.org

[Bug middle-end/98264] [11 Regression] ice during linear_loads_p

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98264 Tamar Christina changed: What|Removed |Added Version|unknown |11.0 Summary|ice during lin

[Bug middle-end/98264] [11 Regression] ice during linear_loads_p since r11-5969-g3ed472af6bc9f83b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98264 Tamar Christina changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug middle-end/26163] [meta-bug] missed optimization in SPEC (2k17, 2k and 2k6 and 95)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=26163 Bug 26163 depends on bug 98264, which changed state. Bug 98264 Summary: [11 Regression] ice during linear_loads_p since r11-5969-g3ed472af6bc9f83b https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98264 What|Removed

[Bug tree-optimization/98160] [11 Regression] ICE in default_tree_printer at gcc/tree-diagnostic.c:270 since r11-5732-gdce6c58db87ebf7f

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98160 --- Comment #5 from Tamar Christina --- Unfortunately I can still reproduce this with 483.xalancbmk on spec2006. It seems to indeed happen only with -flto so I have no idea how to reduce it.. As of g:8833eab4461b4b7050f06a231c3311cc1fa87523 I s

[Bug fortran/97224] New: [8/9/10/11 Regression] SPECCPU 2006 Gamess fails to build after g:e5a76af3a2f3324efc60b4b2778ffb29d5c377bc

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97224 Bug ID: 97224 Summary: [8/9/10/11 Regression] SPECCPU 2006 Gamess fails to build after g:e5a76af3a2f3324efc60b4b2778ffb29d5c377bc Product: gcc Version: 11.0 Status: UNCON

[Bug fortran/97224] [8/9/10/11 Regression] SPECCPU 2006 Gamess fails to build after g:e5a76af3a2f3324efc60b4b2778ffb29d5c377bc

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97224 --- Comment #3 from Tamar Christina --- Cheers, thanks Mark!

[Bug ipa/97292] New: [11 Regression] dealII from SPECCPU 2016 no longer terminates after g:c34db4b6f8a5d80367c709309f9b00cb32630054

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97292 Bug ID: 97292 Summary: [11 Regression] dealII from SPECCPU 2016 no longer terminates after g:c34db4b6f8a5d80367c709309f9b00cb32630054 Product: gcc Version: 11.0

[Bug ipa/97292] [11 Regression] dealII from SPECCPU 2006 no longer terminates after g:c34db4b6f8a5d80367c709309f9b00cb32630054

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97292 --- Comment #12 from Tamar Christina --- (In reply to Martin Liška from comment #11) > (In reply to Tamar Christina from comment #0) > > With just -Ofast the benchmark doesn't seem to ever terminate until it is > > eventually killed. > > > > Ca

[Bug target/98636] [ARM] ICE on passing incompatible options for fp16 - global_options’ are modified in local context

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98636 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org --- Commen

[Bug rtl-optimization/98782] New: IRA artificially creating spills due to BB frequencies

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98782 Bug ID: 98782 Summary: IRA artificially creating spills due to BB frequencies Product: gcc Version: 11.0 Status: UNCONFIRMED Keywords: ra Severity: normal Prior

[Bug rtl-optimization/98782] IRA artificially creating spills due to BB frequencies

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98782 --- Comment #2 from Tamar Christina --- Just an update on what I know so far. There seems to be no symmetry between the growth of the memory costs vs that of the caller saved registers. In the case of the memory costs, the actual memory cost in

[Bug tree-optimization/98928] [11 regression] ICE when build 638.imagick_s since r11-5969-g3ed472af6bc9f83b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98928 --- Comment #5 from Tamar Christina --- Hmm looks like the SLP unwinding code is accidentally cancelling a pattern it shouldn't have. Checking why...

[Bug tree-optimization/98928] [11 regression] ICE when build 638.imagick_s since r11-5969-g3ed472af6bc9f83b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98928 Tamar Christina changed: What|Removed |Added Assignee|rguenth at gcc dot gnu.org |tnfchris at gcc dot gnu.org --

[Bug tree-optimization/98928] [11 regression] ICE when build 638.imagick_s since r11-5969-g3ed472af6bc9f83b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98928 Tamar Christina changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug middle-end/26163] [meta-bug] missed optimization in SPEC (2k17, 2k and 2k6 and 95)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=26163 Bug 26163 depends on bug 98928, which changed state. Bug 98928 Summary: [11 regression] ICE when build 638.imagick_s since r11-5969-g3ed472af6bc9f83b https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98928 What|Removed

[Bug rtl-optimization/98782] [11 Regression] Bad interaction between IPA frequences and IRA resulting in spills due to changes in BB frequencies

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98782 Tamar Christina changed: What|Removed |Added CC||hubicka at gcc dot gnu.org

[Bug tree-optimization/99149] New: [11 Regression] ICE during vectorization when shared trees contain different complex patterns

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99149 Bug ID: 99149 Summary: [11 Regression] ICE during vectorization when shared trees contain different complex patterns Product: gcc Version: 11.0 Status: UNCONFIRMED

[Bug tree-optimization/99220] New: [11 Regression] ICE during vectorization when multiple instances do the same calculation but have different num lanes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99220 Bug ID: 99220 Summary: [11 Regression] ICE during vectorization when multiple instances do the same calculation but have different num lanes Product: gcc Version:

[Bug tree-optimization/99149] [11 Regression] ICE during vectorization when shared trees contain different complex patterns

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99149 Tamar Christina changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug tree-optimization/99220] [11 Regression] ICE during vectorization when multiple instances do the same calculation but have different num lanes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99220 Tamar Christina changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug sanitizer/100379] cyclades.h is removed from linux kernel header files

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100379 Tamar Christina changed: What|Removed |Added Last reconfirmed||2021-05-07 Ever confirmed|0

[Bug middle-end/19706] Recognize common Fortran usages of copysign.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19706 Tamar Christina changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug other/100614] New: Missing mpfr 4 tarballs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100614 Bug ID: 100614 Summary: Missing mpfr 4 tarballs Product: gcc Version: 11.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: other Assignee

[Bug target/100638] New: FP16 vector compare missed optimization on AArch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100638 Bug ID: 100638 Summary: FP16 vector compare missed optimization on AArch64 Product: gcc Version: 11.0 Status: UNCONFIRMED Keywords: missed-optimization Severity: normal

[Bug target/100638] FP16 vector compare missed optimization on AArch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100638 Tamar Christina changed: What|Removed |Added Target Milestone|--- |12.0

[Bug sanitizer/100379] cyclades.h is removed from linux kernel header files

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100379 Tamar Christina changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug tree-optimization/101028] [12 Regression] SLP compile-time hog since r12-1329-gce670e4faafb296d

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101028 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org --- Comme

[Bug driver/97574] Allow for nul output with Windows

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97574 Tamar Christina changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug ipa/107925] ICE in update_specialized_profile at gcc/ipa-cp.cc:5082 for 531.deepsjeng_r benchmark

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107925 --- Comment #5 from Tamar Christina --- I seem to have the same failure in at least GCC 12 as well.

[Bug testsuite/108394] aarch64/cpunative/native_cpu_18.c fails in GCC 11 and 12

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108394 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org --- Comme

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 Tamar Christina changed: What|Removed |Added CC||rguenth at gcc dot gnu.org,

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 --- Comment #5 from Tamar Christina --- > > The vectorizer has this context but since we didn't want a new IFN the > > context should instead be derivable in > > targetm.vectorize.can_special_div_by_const hook. > > The vectorizer doesn't chec

[Bug tree-optimization/108601] New: [13 Regression] vector peeling ICEs with PGO + LTO + IPA inlining in gcc_r in SPEC2017

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108601 Bug ID: 108601 Summary: [13 Regression] vector peeling ICEs with PGO + LTO + IPA inlining in gcc_r in SPEC2017 Product: gcc Version: 13.0 Status: UNCONFIRMED K

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 --- Comment #7 from Tamar Christina --- (In reply to rsand...@gcc.gnu.org from comment #6) > (In reply to Tamar Christina from comment #3) > > The vectorizer has this context but since we didn't want a new IFN the > > context should instead be d

[Bug tree-optimization/108601] [13 Regression] vector peeling ICEs with PGO + LTO + IPA inlining in gcc_r in SPEC2017

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108601 --- Comment #6 from Tamar Christina --- probably relevant that I can only reproduce it on an SVE/VLA system. non-VLA works fine. I have cvise running trying for a repro.

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 --- Comment #10 from Tamar Christina --- (In reply to rsand...@gcc.gnu.org from comment #9) > Are we sure this is a vectoriser vs. C vectors thing? it's not, the issue we're debating is how to fix it. As Richi pointed out https://gcc.gnu.org/b

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 --- Comment #12 from Tamar Christina --- (In reply to rguent...@suse.de from comment #11) > On Tue, 31 Jan 2023, tnfchris at gcc dot gnu.org wrote: > > > I don't think passing in for example the tree operand 0 helps, the > target appearantly w

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 --- Comment #15 from Tamar Christina --- > OK, hopefully I understand now. Sorry for being slow. Not at all, Sorry if it came across a bit cranky, it wasn't meant that way! > If that's the condition we want to test for, it seems like somethin

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 --- Comment #18 from Tamar Christina --- > > > > Ack, that also tracks with what I tried before, we don't indeed track ranges > > for vector ops. The general case can still be handled slightly better (I > > think) > > but it doesn't become as

[Bug tree-optimization/108601] [13 Regression] vector peeling ICEs with VLA in gcc_r in SPEC2017 since g:c13223b790bbc5e4a3f5605e057eac59b61b2c85

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108601 Tamar Christina changed: What|Removed |Added Target||aarch64* Summary|[13 Regre

[Bug tree-optimization/108601] [13 Regression] vector peeling ICEs with VLA in gcc_r in SPEC2017 since g:c13223b790bbc5e4a3f5605e057eac59b61b2c85

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108601 --- Comment #8 from Tamar Christina --- In case it helps, here's the reproducer on compiler explorer and the dump file https://godbolt.org/z/dWvqexjnv

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 --- Comment #20 from Tamar Christina --- > > I don't think so for addhn, because it wouldn't truncate the top bits, it > > truncates the bottom bits. > > > > The instruction does > > element1 = Elem[operand1, e, 2*esize]; > > element2 =

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 --- Comment #21 from Tamar Christina --- > > OK, so that's an ADD_HIGHPART_EXPR then? Though the highpart of an > add is only a single bit, isn't it? For scalar you'd use the > carry bit here and instructions like adc to consume it. Is addhn

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 --- Comment #23 from Tamar Christina --- (In reply to rguent...@suse.de from comment #22) > On Thu, 2 Feb 2023, tnfchris at gcc dot gnu.org wrote: > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 > > > > --- Comment #21 from Tamar Chr

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 --- Comment #24 from Tamar Christina --- > Sure that works I think, I'll do that then. Just to check, I'm regtesting the patch, I assume you want me to revert the hook as well right? Since nothing will be using it.

[Bug rtl-optimization/106594] [13 Regression] sign-extensions no longer merged into addressing mode

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106594 Tamar Christina changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org,

[Bug rtl-optimization/106594] [13 Regression] sign-extensions no longer merged into addressing mode

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106594 --- Comment #17 from Tamar Christina --- (In reply to Segher Boessenkool from comment #13) > Hi! > > Either this should not be P1, or the proposed patch is taking completely the > wrong direction. P1 means there is a regression. There is no r

[Bug target/109072] New: [12/13 Regression] SLP costs for vec duplicate too high since g:4963079769c99c4073adfd799885410ad484cbbe

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109072 Bug ID: 109072 Summary: [12/13 Regression] SLP costs for vec duplicate too high since g:4963079769c99c4073adfd799885410ad484cbbe Product: gcc Version: 12.0 Status: UNCON

[Bug target/109072] [12/13 Regression] SLP costs for vec duplicate too high since g:4963079769c99c4073adfd799885410ad484cbbe

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109072 --- Comment #2 from Tamar Christina --- (In reply to rsand...@gcc.gnu.org from comment #1) > (In reply to Tamar Christina from comment #0) > > The SLP costs went from: > > > > Vector cost: 2 > > Scalar cost: 4 > > > > to: > > > > Vector

[Bug target/109072] [12/13 Regression] SLP costs for vec duplicate too high since g:4963079769c99c4073adfd799885410ad484cbbe

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109072 --- Comment #4 from Tamar Christina --- (In reply to rsand...@gcc.gnu.org from comment #3) > (In reply to Tamar Christina from comment #2) > > I thought the SLP algorithm was bottom up and stores were > > already sinks? > Yeah, they are. But th

[Bug target/108583] [13 Regression] wrong code with vector division by uint16 at -O2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108583 Tamar Christina changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug testsuite/109118] gcc.dg/mla_1.c failed on target w/o __Uint32x4_t support

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109118 Tamar Christina changed: What|Removed |Added Resolution|--- |FIXED CC|

[Bug target/109130] 464.h264ref regressed by 6.5% on a Neoverse-N1 CPU with PGO, LTO, -Ofast and -march=native

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109130 --- Comment #1 from Tamar Christina --- I can't reproduce that. on a Neoverse-N1 I see between those two commits: ./bench-compare.sh 2fc55f51f99 bad177e8487 A 1457 files D 0 files M 0 files Extracted 'loose/2fc55f51f99:2fc55f5

[Bug tree-optimization/102819] [11 Regression] IFN_COMPLEX_MUL matches things that it shouldn't

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102819 Tamar Christina changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug testsuite/104730] gcc.dg/vect/complex/pr102819-9.c FAILs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104730 Tamar Christina changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |tnfchris at gcc dot gnu.org

[Bug tree-optimization/104755] gcc.dg/vect/vect-bic-bitmask-10.c etc. FAIL

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104755 --- Comment #2 from Tamar Christina --- Hmmm the tests are gated by vect_int which sparc declares to support but the code didn't vectorize, so probably an unsupported operation somewhere.. Could you attach the output of -fdump-tree-vect-all? T

[Bug testsuite/104730] gcc.dg/vect/complex/pr102819-9.c FAILs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104730 Tamar Christina changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug tree-optimization/104755] gcc.dg/vect/vect-bic-bitmask-10.c etc. FAIL

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104755 --- Comment #4 from Tamar Christina --- Hmmm looks like it doesn't support vector comparisons missed: not vectorized: relevant stmt not supported: _6 = _5 <= 255; I'll probably just have to skip them on sparc*-* then.

[Bug target/104529] [12 Regression] inefficient codegen around new/delete

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104529 --- Comment #7 from Tamar Christina --- (In reply to Jakub Jelinek from comment #6) > I don't see the code mentioned in #c0 on x86_64, I see also loads and stores > like on aarch64. Yes, that was my mistake, I was accidentally comparing GCC 11

[Bug tree-optimization/104755] gcc.dg/vect/vect-bic-bitmask-10.c etc. FAIL

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104755 Tamar Christina changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug lto/105012] New: [12 Regression] wrf from SPECCPU2017 ICEs during LTO linking

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105012 Bug ID: 105012 Summary: [12 Regression] wrf from SPECCPU2017 ICEs during LTO linking Product: gcc Version: 12.0 Status: UNCONFIRMED Keywords: ice-on-valid-code

[Bug target/104049] [12 Regression] vec_select to subreg lowering causes superfluous moves

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104049 --- Comment #11 from Tamar Christina --- (In reply to Jakub Jelinek from comment #9) > Perhaps the r12-2288-g8695bf78dad1a42636 change wasn't a good idea? I think it's still a good idea as it fixes a bigger problem (unneeded SIMD partial extrac

[Bug target/104049] [12 Regression] vec_select to subreg lowering causes superfluous moves

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104049 --- Comment #12 from Tamar Christina --- (In reply to Jakub Jelinek from comment #10) > Could we fix this up in postreload or later? > (insn 35 18 21 2 (set (reg:SI 0 x0 [125]) > (reg:SI 32 v0 [117])) "pr104049.c":16:33 52 {*movsi_aarch6

[Bug target/104049] [12 Regression] vec_select to subreg lowering causes superfluous moves

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104049 --- Comment #13 from Tamar Christina --- That said, I'll wait for Richard S to respond, but I don't think this is a P1 any longer, we know why it can't be done during reload and neither sequences are really significantly better/worse.

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