[gcc r15-2242] x86: Don't enable APX_F in 32-bit mode

https://gcc.gnu.org/g:9d312ba54428d70f0703c8774a6fe6a4755930e7 commit r15-2242-g9d312ba54428d70f0703c8774a6fe6a4755930e7 Author: Lingling Kong Date: Wed Jul 24 14:52:47 2024 +0800 x86: Don't enable APX_F in 32-bit mode gcc/ChangeLog: PR target/115978 *

[gcc r15-2241] Internal-fn: Only allow modes describe types for internal fn[PR115961]

https://gcc.gnu.org/g:905973410957891fec8a3e42eeefa4618780e0ce commit r15-2241-g905973410957891fec8a3e42eeefa4618780e0ce Author: Pan Li Date: Thu Jul 18 17:23:36 2024 +0800 Internal-fn: Only allow modes describe types for internal fn[PR115961] The direct_internal_fn_supported_p ha

[gcc r13-8941] rs6000: Error on CPUs and ABIs that don't support the ROP protection insns [PR114759]

https://gcc.gnu.org/g:63b1b3e23c3c589c2859d481705dc706cbff35a1 commit r13-8941-g63b1b3e23c3c589c2859d481705dc706cbff35a1 Author: Peter Bergner Date: Mon Jul 15 16:57:32 2024 -0500 rs6000: Error on CPUs and ABIs that don't support the ROP protection insns [PR114759] We currently s

[gcc r13-8940] rs6000: ROP - Emit hashst and hashchk insns on Power8 and later [PR114759]

https://gcc.gnu.org/g:77fd352a47137d79e6b7a480503ce4368f13c3e5 commit r13-8940-g77fd352a47137d79e6b7a480503ce4368f13c3e5 Author: Peter Bergner Date: Wed Jun 19 16:07:29 2024 -0500 rs6000: ROP - Emit hashst and hashchk insns on Power8 and later [PR114759] We currently only emit the

[gcc r13-8942] rs6000: Catch unsupported ABI errors when using -mrop-protect [PR114759, PR115988]

https://gcc.gnu.org/g:9a4603d323d890dfab6d27ede17dc904abdccd9b commit r13-8942-g9a4603d323d890dfab6d27ede17dc904abdccd9b Author: Peter Bergner Date: Thu Jul 18 18:01:46 2024 -0500 rs6000: Catch unsupported ABI errors when using -mrop-protect [PR114759,PR115988] 2024-07-18 Peter

[gcc r13-8939] rs6000: Compute rop_hash_save_offset for non-Altivec compiles [PR115389]

https://gcc.gnu.org/g:bc51e5abcd9cf9a4f74384f2df7c0c8c5ae07c1c commit r13-8939-gbc51e5abcd9cf9a4f74384f2df7c0c8c5ae07c1c Author: Peter Bergner Date: Fri Jun 14 14:36:20 2024 -0500 rs6000: Compute rop_hash_save_offset for non-Altivec compiles [PR115389] We currently only compute th

[gcc r13-8938] rs6000: Update ELFv2 stack frame comment showing the correct ROP save location

https://gcc.gnu.org/g:9bbdec4d94f9120b75d03a610e0338bb05ee40f7 commit r13-8938-g9bbdec4d94f9120b75d03a610e0338bb05ee40f7 Author: Peter Bergner Date: Fri Jun 7 16:03:08 2024 -0500 rs6000: Update ELFv2 stack frame comment showing the correct ROP save location The ELFv2 stack frame

[gcc r15-2240] [PR rtl-optimization/115877][6/n] Add testcase from pr115877

https://gcc.gnu.org/g:f9a60d575f02822852aa22513c636be38f9c63ea commit r15-2240-gf9a60d575f02822852aa22513c636be38f9c63ea Author: Jeff Law Date: Tue Jul 23 19:11:04 2024 -0600 [PR rtl-optimization/115877][6/n] Add testcase from pr115877 This just adds the testcase from pr115877. I

[gcc r15-2238] Output CodeView type information for rvalue references

https://gcc.gnu.org/g:1ca7a12807a7fa0d9c27a5c8c45fa99ac9e7e027 commit r15-2238-g1ca7a12807a7fa0d9c27a5c8c45fa99ac9e7e027 Author: Mark Harmstone Date: Sat Jul 20 20:18:14 2024 +0100 Output CodeView type information for rvalue references Translates DW_TAG_rvalue_reference_type DIEs

[gcc r15-2237] Output CodeView type information for references

https://gcc.gnu.org/g:7341607544e01a4a155613470b2ef099b051b881 commit r15-2237-g7341607544e01a4a155613470b2ef099b051b881 Author: Mark Harmstone Date: Sat Jul 20 20:12:30 2024 +0100 Output CodeView type information for references Translates DW_TAG_reference_type DIEs into LF_POINTE

[gcc r15-2236] RISC-V: Fix snafu in SI mode splitters patch

https://gcc.gnu.org/g:806927111cf388a2d8cd54072269601f677767cf commit r15-2236-g806927111cf388a2d8cd54072269601f677767cf Author: Vineet Gupta Date: Tue Jul 23 15:12:11 2024 -0700 RISC-V: Fix snafu in SI mode splitters patch SPEC2017 perlbench for RISC-V was broke as runtime output

[gcc r15-2235] doc: add missing @option for musttail

https://gcc.gnu.org/g:e8c40aed0f81ca8aac1ae43f140f489eda2d3a07 commit r15-2235-ge8c40aed0f81ca8aac1ae43f140f489eda2d3a07 Author: Marek Polacek Date: Tue Jul 23 16:32:20 2024 -0400 doc: add missing @option for musttail gcc/ChangeLog: * doc/extend.texi: Add missing

[gcc r15-2234] Add documentation for musttail attribute

https://gcc.gnu.org/g:8daae81113eeff37b4ae2e08a9797295fbc8b81e commit r15-2234-g8daae81113eeff37b4ae2e08a9797295fbc8b81e Author: Andi Kleen Date: Tue Jan 23 23:38:23 2024 -0800 Add documentation for musttail attribute gcc/ChangeLog: PR c/83324 * doc/ex

[gcc r15-2233] Add tests for C/C++ musttail attributes

https://gcc.gnu.org/g:8d1af8f904a0c08656d976cbf8ca56dba35197b0 commit r15-2233-g8d1af8f904a0c08656d976cbf8ca56dba35197b0 Author: Andi Kleen Date: Tue Jan 23 23:54:56 2024 -0800 Add tests for C/C++ musttail attributes Some adopted from the existing C musttail plugin tests. Also

[gcc r15-2232] C: Implement musttail attribute for returns

https://gcc.gnu.org/g:78bbdbd5352df527feccf0a8c2f862f25a2e88b4 commit r15-2232-g78bbdbd5352df527feccf0a8c2f862f25a2e88b4 Author: Andi Kleen Date: Wed Jan 24 07:44:23 2024 -0800 C: Implement musttail attribute for returns Implement a C23 clang compatible musttail attribute similar

[gcc r15-2231] C++: Support clang compatible [[musttail]] (PR83324)

https://gcc.gnu.org/g:2bd8177256b6d87f6e75819218cf22c2c0bfc1ac commit r15-2231-g2bd8177256b6d87f6e75819218cf22c2c0bfc1ac Author: Andi Kleen Date: Tue Jan 23 23:44:48 2024 -0800 C++: Support clang compatible [[musttail]] (PR83324) This patch implements a clang compatible [[musttail

[gcc r15-2230] c++: normalizing ttp constraints [PR115656]

https://gcc.gnu.org/g:2861eb34e30973cb991a7964af7cfeae014a98b0 commit r15-2230-g2861eb34e30973cb991a7964af7cfeae014a98b0 Author: Patrick Palka Date: Tue Jul 23 13:16:14 2024 -0400 c++: normalizing ttp constraints [PR115656] Here we normalize the constraint same_as for the first

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] [5/n][PR rtl-optimization/115877] Fix handling of input/output operands

https://gcc.gnu.org/g:99d15ac27522519377f7019cf6e5cb67b1497458 commit 99d15ac27522519377f7019cf6e5cb67b1497458 Author: Jeff Law Date: Mon Jul 22 21:48:28 2024 -0600 [5/n][PR rtl-optimization/115877] Fix handling of input/output operands So in this patch we're correcting a failure

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] [4/n][PR rtl-optimization/115877] Correct SUBREG handling in a destination

https://gcc.gnu.org/g:d4f5e86b8cf0666aefd9c1f10188274af147df46 commit d4f5e86b8cf0666aefd9c1f10188274af147df46 Author: Jeff Law Date: Mon Jul 22 10:11:57 2024 -0600 [4/n][PR rtl-optimization/115877] Correct SUBREG handling in a destination If we encounter something during SET hand

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] [NFC][PR rtl-optimization/115877] Avoid setting irrelevant bit groups as live in ext-dce

https://gcc.gnu.org/g:316f9617dcf040ccad190d853ee7f94b2f9caace commit 316f9617dcf040ccad190d853ee7f94b2f9caace Author: Jeff Law Date: Mon Jul 22 08:45:10 2024 -0600 [NFC][PR rtl-optimization/115877] Avoid setting irrelevant bit groups as live in ext-dce Another patch to refine li

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Implement the .SAT_TRUNC for scalar

https://gcc.gnu.org/g:0ee41b02916d9c4c68ae6dbaa364cefcd79bb7da commit 0ee41b02916d9c4c68ae6dbaa364cefcd79bb7da Author: Pan Li Date: Mon Jul 1 16:36:35 2024 +0800 RISC-V: Implement the .SAT_TRUNC for scalar This patch would like to implement the simple .SAT_TRUNC pattern in the

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] [PR rtl-optimization/115877] Fix livein computation for ext-dce

https://gcc.gnu.org/g:3e82d5753917b74abcbb9212465eec8d89fef824 commit 3e82d5753917b74abcbb9212465eec8d89fef824 Author: Jeff Law Date: Sun Jul 21 07:36:37 2024 -0600 [PR rtl-optimization/115877] Fix livein computation for ext-dce So I'm not yet sure how I'm going to break everythin

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Rearrange the test helper files for vector .SAT_*

https://gcc.gnu.org/g:97d90509f1d6b8189d6492d51383c06239c57bbe commit 97d90509f1d6b8189d6492d51383c06239c57bbe Author: Pan Li Date: Sat Jul 20 10:43:44 2024 +0800 RISC-V: Rearrange the test helper files for vector .SAT_* Rearrange the test help header files, as well as align the

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] [PR rtl-optimization/115877][2/n] Improve liveness computation for constant initialization

https://gcc.gnu.org/g:faadb6b663ea7bda38ebfcd1ed772882cdc725da commit faadb6b663ea7bda38ebfcd1ed772882cdc725da Author: Jeff Law Date: Sun Jul 21 08:41:28 2024 -0600 [PR rtl-optimization/115877][2/n] Improve liveness computation for constant initialization While debugging pr115877

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Fix testcase missing arch attribute

https://gcc.gnu.org/g:bdb2115f7ee854a6daecf6079274700321f1a2b5 commit bdb2115f7ee854a6daecf6079274700321f1a2b5 Author: Edwin Lu Date: Tue Jul 16 17:43:45 2024 -0700 RISC-V: Fix testcase missing arch attribute The C + F extention implies the zcf extension on rv32. Add missing zcf

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] Add debug counter for ext_dce

https://gcc.gnu.org/g:b33c9eebd9581a86d56e3cdba2bef96fda1727f4 commit b33c9eebd9581a86d56e3cdba2bef96fda1727f4 Author: Andrew Pinski Date: Tue Jul 16 09:53:20 2024 -0700 Add debug counter for ext_dce Like r15-1610-gb6215065a5b143 (which adds one for late_combine), adding one f

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] Revert "RISC-V: Attribute parser: Use alloca() instead of new + std::unique_ptr"

https://gcc.gnu.org/g:20fe3e21e824daeb20679a24d3de78969c17710c commit 20fe3e21e824daeb20679a24d3de78969c17710c Author: Christoph Müllner Date: Mon Jul 15 23:42:39 2024 +0200 Revert "RISC-V: Attribute parser: Use alloca() instead of new + std::unique_ptr" This reverts commit 5040c

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] Fix liveness computation for shift/rotate counts in ext-dce

https://gcc.gnu.org/g:fa543ce46c2e205f2813e13fd9d4df65e8544b87 commit fa543ce46c2e205f2813e13fd9d4df65e8544b87 Author: Jeff Law Date: Mon Jul 15 18:15:33 2024 -0600 Fix liveness computation for shift/rotate counts in ext-dce So as I've noted before I believe the control flow in ex

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Rewrite target attribute handling

https://gcc.gnu.org/g:fa716b37c5c85663b8f73d725a2d4020116e2a77 commit fa716b37c5c85663b8f73d725a2d4020116e2a77 Author: Christoph Müllner Date: Sat Jun 22 21:59:04 2024 +0200 RISC-V: Rewrite target attribute handling The target-arch attribute handling in RISC-V is only a few months

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Allow adding enabled extension via target arch attributes

https://gcc.gnu.org/g:4157d59413a5f35808603e06de06cfb388811a65 commit 4157d59413a5f35808603e06de06cfb388811a65 Author: Christoph Müllner Date: Sat Jul 6 17:03:18 2024 +0200 RISC-V: Allow adding enabled extension via target arch attributes The set of enabled extensions can be exten

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Attribute parser: Use alloca() instead of new + std::unique_ptr

https://gcc.gnu.org/g:64b4b5211aa664e224e3cd722ab5aa11f278aa68 commit 64b4b5211aa664e224e3cd722ab5aa11f278aa68 Author: Christoph Müllner Date: Fri Jul 5 04:48:15 2024 +0200 RISC-V: Attribute parser: Use alloca() instead of new + std::unique_ptr Allocating an object on the heap wit

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Implement locality for __builtin_prefetch

https://gcc.gnu.org/g:e8be9b1c419d1b59a6f5fe5f166c43bfea27ec0e commit e8be9b1c419d1b59a6f5fe5f166c43bfea27ec0e Author: Monk Chiang Date: Thu Jul 6 14:05:17 2023 +0800 RISC-V: Implement locality for __builtin_prefetch The patch add the Zihintntl instructions in the prefetch pattern

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Fix testcase for vector .SAT_SUB in zip benchmark

https://gcc.gnu.org/g:21814631a11523712913a1fdec4055176aa89e28 commit 21814631a11523712913a1fdec4055176aa89e28 Author: Edwin Lu Date: Fri Jul 12 11:31:16 2024 -0700 RISC-V: Fix testcase for vector .SAT_SUB in zip benchmark The following testcase was not properly testing anything d

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Add md files for vector BFloat16

https://gcc.gnu.org/g:c2b212fbed411183ca108323d674fcd62028c851 commit c2b212fbed411183ca108323d674fcd62028c851 Author: Feng Wang Date: Tue Jun 18 06:13:35 2024 + RISC-V: Add md files for vector BFloat16 V3: Add Bfloat16 vector insn in generic-vector-ooo.md v2: Rebase A

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Add Zvfbfmin and Zvfbfwma intrinsic

https://gcc.gnu.org/g:958e43c1baa3d40fcbb206bb8469c7782e044e7a commit 958e43c1baa3d40fcbb206bb8469c7782e044e7a Author: Feng Wang Date: Mon Jun 17 01:59:57 2024 + RISC-V: Add Zvfbfmin and Zvfbfwma intrinsic v3: Modify warning message in riscv.cc v2: Rebase Accroding to

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] RISC-V: Add vector type of BFloat16 format

https://gcc.gnu.org/g:a5ca595e63500d080294f81eada2b25e320dd572 commit a5ca595e63500d080294f81eada2b25e320dd572 Author: Feng Wang Date: Thu Jun 13 00:32:14 2024 + RISC-V: Add vector type of BFloat16 format v3: Rebase v2: Rebase The vector type of BFloat16 format is adde

[gcc(refs/vendors/riscv/heads/gcc-14-with-riscv-opts)] [PR rtl-optimization/115876] Fix one of two ubsan reported issues in new ext-dce.cc code

https://gcc.gnu.org/g:ead3454f089bc864e448b1bf6ace6b445eca3152 commit ead3454f089bc864e448b1bf6ace6b445eca3152 Author: Jeff Law Date: Fri Jul 12 13:11:33 2024 -0600 [PR rtl-optimization/115876] Fix one of two ubsan reported issues in new ext-dce.cc code David Binderman did a boot

[gcc r15-2229] c++: missing SFINAE during alias CTAD [PR115296]

https://gcc.gnu.org/g:f70281222df432a7bec1271904c5ebefd7f2c934 commit r15-2229-gf70281222df432a7bec1271904c5ebefd7f2c934 Author: Patrick Palka Date: Tue Jul 23 11:37:31 2024 -0400 c++: missing SFINAE during alias CTAD [PR115296] During the alias CTAD transformation, if substitutio

[gcc(refs/users/meissner/heads/work173)] Update ChangeLog.*

https://gcc.gnu.org/g:93b27dd2636726ef51500e0068891ca250242c3d commit 93b27dd2636726ef51500e0068891ca250242c3d Author: Michael Meissner Date: Tue Jul 23 11:14:51 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.meissner | 21 + 1 file changed, 21 insertions(+) d

[gcc(refs/users/meissner/heads/work173)] Remove -mpower10 and -mpower8-internal

https://gcc.gnu.org/g:d64c5ffbfe1f13536d8cc5f6ffd2fbbdc3e1873c commit d64c5ffbfe1f13536d8cc5f6ffd2fbbdc3e1873c Author: Michael Meissner Date: Tue Jul 23 11:14:05 2024 -0400 Remove -mpower10 and -mpower8-internal 2024-07-23 Michael Meissner gcc/ * confi

[gcc r15-2228] PR modula2/116048 ICE when encountering wrong kind of qualident

https://gcc.gnu.org/g:7f8064ff0e2ac90c5bb6c30cc61acc5a28ebbe4c commit r15-2228-g7f8064ff0e2ac90c5bb6c30cc61acc5a28ebbe4c Author: Gaius Mulley Date: Tue Jul 23 15:54:16 2024 +0100 PR modula2/116048 ICE when encountering wrong kind of qualident Following on from PR-115957 further IC

[gcc r15-2227] cp/coroutines: add a test for PR c++/103953

https://gcc.gnu.org/g:826134760c49518d97769c8bb7ecbc264b78cac9 commit r15-2227-g826134760c49518d97769c8bb7ecbc264b78cac9 Author: Arsen Arsenović Date: Tue Jul 23 13:01:03 2024 +0200 cp/coroutines: add a test for PR c++/103953 This PR seems to have been fixed by a fix for a seeming

[gcc(refs/users/meissner/heads/work173)] Update ChangeLog.*

https://gcc.gnu.org/g:191fcce31172349eacedc462c47cd76893cb437e commit 191fcce31172349eacedc462c47cd76893cb437e Author: Michael Meissner Date: Tue Jul 23 10:13:09 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.meissner | 4 1 file changed, 4 insertions(+) diff --git a/gcc/Cha

[gcc(refs/users/meissner/heads/work173)] Move architecture flags from isa flags

https://gcc.gnu.org/g:5021a6c04765ed9f06013827155f7c65b9d785fe commit 5021a6c04765ed9f06013827155f7c65b9d785fe Author: Michael Meissner Date: Tue Jul 23 10:11:54 2024 -0400 Move architecture flags from isa flags 2024-07-22 Michael Meissner gcc/ * confi

[gcc(refs/users/meissner/heads/work173)] Revert changes

https://gcc.gnu.org/g:f5939dfbe6a215e0c488f8ed2f2d82f27e15236f commit f5939dfbe6a215e0c488f8ed2f2d82f27e15236f Author: Michael Meissner Date: Tue Jul 23 10:09:06 2024 -0400 Revert changes Diff: --- gcc/config/rs6000/rs6000-c.cc | 23 +++-- gcc/config/rs6000/rs6000-protos.h | 5 +-

[gcc r15-2226] install.texi (gcn): Suggest newer commit for Newlib

https://gcc.gnu.org/g:b95c82d60c8c88f6346c5602f2e22a4531afe47c commit r15-2226-gb95c82d60c8c88f6346c5602f2e22a4531afe47c Author: Tobias Burnus Date: Tue Jul 23 12:41:40 2024 +0200 install.texi (gcn): Suggest newer commit for Newlib Newlib 4.4.0 lacks two commits: 7dd4eb1db (2024-0

[gcc r15-2225] report message for operator %a on unaddressible operand

https://gcc.gnu.org/g:472eab9ab1fdfd0ba3a555ea9eb50e20307c7052 commit r15-2225-g472eab9ab1fdfd0ba3a555ea9eb50e20307c7052 Author: Jiufu Guo Date: Tue Jul 23 13:34:20 2024 +0800 report message for operator %a on unaddressible operand Hi, For PR96866, when printing asm code

[gcc r14-10504] testsuite: Disable finite math only for test [PR115826]

https://gcc.gnu.org/g:a544898f6dd6a1689bb25abfdc20d577c93b1162 commit r14-10504-ga544898f6dd6a1689bb25abfdc20d577c93b1162 Author: Torbjörn SVENSSON Date: Mon Jul 15 12:10:12 2024 +0200 testsuite: Disable finite math only for test [PR115826] As the test case requires +-Inf and NaN

[gcc r15-2224] testsuite: Disable finite math only for test [PR115826]

https://gcc.gnu.org/g:7793f5b4194253acaac0b53d8a1c95d9b5c8f4bb commit r15-2224-g7793f5b4194253acaac0b53d8a1c95d9b5c8f4bb Author: Torbjörn SVENSSON Date: Mon Jul 15 12:10:12 2024 +0200 testsuite: Disable finite math only for test [PR115826] As the test case requires +-Inf and NaN

[gcc r15-2223] tree-optimization/116002 - PTA solving slow with degenerate graph

https://gcc.gnu.org/g:15d3b2dab9182eff036a604169b5e6f4ab3b2a40 commit r15-2223-g15d3b2dab9182eff036a604169b5e6f4ab3b2a40 Author: Richard Biener Date: Tue Jul 23 10:29:58 2024 +0200 tree-optimization/116002 - PTA solving slow with degenerate graph When the constraint graph consists

[gcc r14-10503] libstdc++: Use [[maybe_unused]] attribute in src/c++23/print.cc

https://gcc.gnu.org/g:b41487a883282b28a136fa16e1d941e14dae commit r14-10503-gb41487a883282b28a136fa16e1d941e14dae Author: Jonathan Wakely Date: Tue Jul 23 10:08:52 2024 +0100 libstdc++: Use [[maybe_unused]] attribute in src/c++23/print.cc This avoids some warnings when the

[gcc r14-10502] libstdc++: Do not use isatty on avr [PR115482]

https://gcc.gnu.org/g:5fad8874300ef67c577cc204e339dca6bca15467 commit r14-10502-g5fad8874300ef67c577cc204e339dca6bca15467 Author: Detlef Vollmann Date: Tue Jul 23 09:25:22 2024 +0100 libstdc++: Do not use isatty on avr [PR115482] avrlibc has an incomplete unistd.h that doesn't hav

[gcc r15-2222] libstdc++: Use [[maybe_unused]] attribute in src/c++23/print.cc

https://gcc.gnu.org/g:b40156d69153364315e071dc968227ce1c3bd2a8 commit r15--gb40156d69153364315e071dc968227ce1c3bd2a8 Author: Jonathan Wakely Date: Tue Jul 23 10:08:52 2024 +0100 libstdc++: Use [[maybe_unused]] attribute in src/c++23/print.cc This avoids some warnings when the

[gcc r15-2221] libstdc++: Do not use isatty on avr [PR115482]

https://gcc.gnu.org/g:8439405e38c56b774cf3c65bdafae5f9e11d470a commit r15-2221-g8439405e38c56b774cf3c65bdafae5f9e11d470a Author: Detlef Vollmann Date: Tue Jul 23 09:25:22 2024 +0100 libstdc++: Do not use isatty on avr [PR115482] avrlibc has an incomplete unistd.h that doesn't have

[gcc r14-10501] ssa: Fix up maybe_rewrite_mem_ref_base complex type handling [PR116034]

https://gcc.gnu.org/g:084768c865cd50a6f7ff177db2dbdbb7aadaeee0 commit r14-10501-g084768c865cd50a6f7ff177db2dbdbb7aadaeee0 Author: Jakub Jelinek Date: Tue Jul 23 10:50:29 2024 +0200 ssa: Fix up maybe_rewrite_mem_ref_base complex type handling [PR116034] The folding into REALPART_EX

[gcc r15-2220] ssa: Fix up maybe_rewrite_mem_ref_base complex type handling [PR116034]

https://gcc.gnu.org/g:b9cefd67a2a464a3c9413e6b3f28e7dc7a9ef162 commit r15-2220-gb9cefd67a2a464a3c9413e6b3f28e7dc7a9ef162 Author: Jakub Jelinek Date: Tue Jul 23 10:50:29 2024 +0200 ssa: Fix up maybe_rewrite_mem_ref_base complex type handling [PR116034] The folding into REALPART_EXP

[gcc r15-2219] c++: Remove CHECK_CONSTR

https://gcc.gnu.org/g:58756c9f5507e5db0eaddcbaaa2de7f39c34b5d0 commit r15-2219-g58756c9f5507e5db0eaddcbaaa2de7f39c34b5d0 Author: Jakub Jelinek Date: Tue Jul 23 10:39:08 2024 +0200 c++: Remove CHECK_CONSTR On Mon, Jul 22, 2024 at 11:48:51AM -0400, Patrick Palka wrote: > FWIW th

[gcc r15-2218] [v2] rtl-optimization/116002 - cselib hash is bad

https://gcc.gnu.org/g:44e065a52fa6069d6c8cacebc8f876840d278dd0 commit r15-2218-g44e065a52fa6069d6c8cacebc8f876840d278dd0 Author: Richard Biener Date: Fri Jul 19 16:23:51 2024 +0200 [v2] rtl-optimization/116002 - cselib hash is bad The following addresses the bad hash function of c

[gcc r12-10636] Fixup unaligned load/store cost for znver4

https://gcc.gnu.org/g:f78eb9524bd97679c8baa47a62e82147272719ae commit r12-10636-gf78eb9524bd97679c8baa47a62e82147272719ae Author: Richard Biener Date: Mon Jul 15 13:01:24 2024 +0200 Fixup unaligned load/store cost for znver4 Currently unaligned YMM and ZMM load and store costs are

[gcc r13-8936] Fixup unaligned load/store cost for znver4

https://gcc.gnu.org/g:b35276655e6767a6e037e58edfa4738317498337 commit r13-8936-gb35276655e6767a6e037e58edfa4738317498337 Author: Richard Biener Date: Mon Jul 15 13:01:24 2024 +0200 Fixup unaligned load/store cost for znver4 Currently unaligned YMM and ZMM load and store costs are