[patch] Fix wrong code with boolean negation

2013-01-21 Thread Eric Botcazou
Hi, this is a regression present in the Ada compiler since 4.5: the issue had been latent for ages, but an unrelated streamlining of the IR made it appear. When make_range_step is invoked on: (integer)!b 0 where b is a boolean, it returns always true instead of always false. The sequence

RE: RE: [PATCH, ARM] New CPU support for Marvell PJ4 cores

2013-01-21 Thread Yi-Hsiu Hsu
Hi Ramana, Attached is the patch for marvell-pj4.md to fix the simple_alu_shift category. Thanks for your kindly help. Cheers, Yi-Hsiu, Hsu -Original Message- From: Ramana Radhakrishnan [mailto:ramra...@arm.com] Sent: Friday, January 18, 2013 10:28 PM To: Yi-Hsiu Hsu Cc:

Re: [PATCH, ARM] New CPU support for Marvell PJ4 cores

2013-01-21 Thread Ramana Radhakrishnan
On 01/20/13 20:36, Matthias Klose wrote: Am 18.01.2013 15:28, schrieb Ramana Radhakrishnan: On 06/20/12 03:53, Yi-Hsiu Hsu wrote: marvell-pj4 is added to BE8_LINK_SPEC. Sorry about the time it's taken to finish this patch up. I seem to have missed this one in the review process. I've now

Cortex-A15 vfnma/vfnms test patch

2013-01-21 Thread amol pise
Dear All, I am working on Cortex-A15 using latest GCC toolchain. As we know that VFPv4 and SIMDv2 are the Cortex-A15 CPU Features, so, compared to VFPv3/ SIMDv1, in VFPv4/SIMDv2 has following additional instruction support * VFMA, VFMS - Fused multiply accumulate, Fused multiply subtract. *

[PATCH,i386] Do not disable fma4 for TARGET_FMA

2013-01-21 Thread Uros Bizjak
On Mon, Jan 21, 2013 at 10:28 AM, Ekanathan, Saravanan saravanan.ekanat...@amd.com wrote: 2012-01-21 Uros Bizjak ubiz...@gmail.com * config/i386/i386.md (enabled): Do not disable fma4 for TARGET_FMA. Bootstrapped and regression tested on x86_64-pc-linux-gnu, also tested by AMD: Hi

Patch ARM - PR target/56058

2013-01-21 Thread Ramana Radhakrishnan
Fix up wrong file committed earlier to incorporate the changes as in my original patch. Additionally fix up copyright years. Applied to trunk. regards Ramana 2013-01-21 Ramana Radhakrishnan ramana.radhakrish...@arm.com PR target/56058 * config/arm/marvell-pj4.md: Update

[PATCH] Fix up ARM ICE (PR target/49069)

2013-01-21 Thread Jakub Jelinek
Hi! As can be seen on the testcase, this backend bug is still reproduceable even on trunk, the backend just can't rely on cstoredi4 or cbranchdi4 expansion not being performed with two constants, unless it has predicates that disallow it (Steven's patch in the PR). This patch just forces it into

Re: [PATCH, ARM] New CPU support for Marvell PJ4 cores

2013-01-21 Thread Ramana Radhakrishnan
Hi Yi-Hsiu Hsu, On 01/21/13 08:51, Yi-Hsiu Hsu wrote: Hi Ramana, Attached is the patch for marvell-pj4.md to fix the simple_alu_shift category. Thanks for your kindly help. In the future please submit patches with a Changelog entry. I've created one for this patch as it needed a bit of

[PATCH v2, haifa-sched]: Fix PR56023, -fcompare-debug failure due to sched1 pass on 4.6 branch

2013-01-21 Thread Uros Bizjak
On Sat, Jan 19, 2013 at 8:57 PM, Uros Bizjak ubiz...@gmail.com wrote: We should not update ticks of instructions, dependent on debug instruction. Without the patch, the scheduling order depends on the presence of debug instructions and leads to -fcompare-debug failures. Attached patch refines

[Patch] PR56064: Fold VIEW_CONVERT_EXPR with FIXED_CST

2013-01-21 Thread Georg-Johann Lay
This is tentative patch as discussed in http://gcc.gnu.org/ml/gcc/2013-01/msg00187.html fold-const.c gets 2 new function native_encode_fixed and native_interpret_fixed. Code common with the integer case is factored out and moved to the new constructor-like function double_int::from_buffer. The

Re: [PATCH] libstdc++: Add mem_order_hle_acquire/release to atomic.h v2

2013-01-21 Thread Jakub Jelinek
On Sun, Jan 13, 2013 at 10:06:05PM -0800, Andi Kleen wrote: 2013-01-12 Andi Kleen a...@linux.intel.com Jonathan Wakely jwakely@gmail.com PR libstdc++/55223 * testsuite/29_atomics/atomic_flag/test_and_set/explicit-hle.cc: Add. The test is broken on

Re: PATCH to libstdc++ to use __cxa_thread_atexit_impl if available

2013-01-21 Thread Jakub Jelinek
On Sat, Jan 19, 2013 at 12:22:23PM -0500, Jason Merrill wrote: Siddhesh has a patch to implement the thread atexit functionality in glibc in order to integrate better with the dynamic loader and run the cleanups in the correct order. Once it's available there, this patch will make the copy in

[PATCH] Multiversioning fixes (PR c++/55742, take 2)

2013-01-21 Thread Jakub Jelinek
On Sat, Jan 19, 2013 at 11:19:04AM -0500, Jason Merrill wrote: On 01/18/2013 03:22 PM, Jakub Jelinek wrote: else if (TREE_CODE (args) != STRING_CST) -gcc_unreachable (); +{ + error (invalid %target% attribute value); + return false; +} Maybe say that it needs to

[PATCH] Fix init_reload memory leak

2013-01-21 Thread Jakub Jelinek
Hi! While working on the multiversioning patch I've just posted, I've noticed that on say: void foo (); void foo () __attribute__((target (avx))); void foo () __attribute__((target (default))); __attribute__((target (default))) void foo () { } __attribute__((target (avx))) void foo () { } void

Re: [PATCH, haifa-sched]: Fix PR56023, -fcompare-debug failure due to sched1 pass on 4.6 branch

2013-01-21 Thread Vladimir Makarov
On 13-01-19 2:57 PM, Uros Bizjak wrote: Hello! We should not update ticks of instructions, dependent on debug instruction. Without the patch, the scheduling order depends on the presence of debug instructions and leads to -fcompare-debug failures. 2012-01-19 Uros Bizjak ubiz...@gmail.com

Re: [PATCH] Fix init_reload memory leak

2013-01-21 Thread Jeff Law
On 01/21/2013 07:36 AM, Jakub Jelinek wrote: Hi! While working on the multiversioning patch I've just posted, I've noticed that on say: void foo (); void foo () __attribute__((target (avx))); void foo () __attribute__((target (default))); __attribute__((target (default))) void foo () { }

Re: [patch] PR inline-asm/55934

2013-01-21 Thread Vladimir Makarov
On 13-01-19 11:57 AM, Steven Bosscher wrote: On Sat, Jan 19, 2013 at 1:15 AM, Vladimir Makarov wrote: On 13-01-17 6:45 PM, Steven Bosscher wrote: Hello Vlad, Attached is my attempt to fix PR55934, an error recovery issue in LRA with incorrect constraints in an asm. I'm not 100% sure this is

[PATCH, PR 56022] Correct order of calls to invoke_set_current_function_hook and aggregate_value_p

2013-01-21 Thread Martin Jambor
Hi, segfault reported as PR 56022 happens because cfun-returns_struct is erroneously set. This happens because aggregate_value_p (called from allocate_struct_function) relies on that invoke_set_current_function_hook has already been called. The patch below moves the call up bit, although not

Re: [ARM] Turning off 64bits ops in Neon and gfortran/modulo-scheduling problem

2013-01-21 Thread Christophe Lyon
Ping? http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01197.html On 16 January 2013 14:46, Christophe Lyon christophe.l...@linaro.org wrote: Ping^2 ? On 8 January 2013 17:24, Christophe Lyon christophe.l...@linaro.org wrote: Ping? http://gcc.gnu.org/ml/gcc-patches/2012-12/msg01197.html

Re: [PATCH, PR 56022] Correct order of calls to invoke_set_current_function_hook and aggregate_value_p

2013-01-21 Thread Jakub Jelinek
On Mon, Jan 21, 2013 at 05:49:46PM +0100, Martin Jambor wrote: 2013-01-21 Martin Jambor mjam...@suse.cz PR middle-end/56022 * function.c (allocate_struct_function): Call invoke_set_current_function_hook earlier. testsuite/ * gcc.target/i386/pr56022.c: New test.

Re: [google gcc-4_7, integration] Add lightweight checks for front()/back() on empty vector

2013-01-21 Thread Diego Novillo
On Sun, Jan 20, 2013 at 1:15 PM, Paul Pluzhnikov ppluzhni...@google.com wrote: On Sun, Jan 20, 2013 at 3:16 AM, Gerald Pfeifer ger...@pfeifer.com wrote: Isn't the error message wrong, then? Thanks for catching that! Updated patch attached. OK for google branches. Diego.

Re: [PATCH v2, haifa-sched]: Fix PR56023, -fcompare-debug failure due to sched1 pass on 4.6 branch

2013-01-21 Thread Uros Bizjak
On Mon, Jan 21, 2013 at 1:27 PM, Uros Bizjak ubiz...@gmail.com wrote: We should not update ticks of instructions, dependent on debug instruction. Without the patch, the scheduling order depends on the presence of debug instructions and leads to -fcompare-debug failures. Attached patch

[patch,avr] Ad PR54222: Add bitsfx and fxbits to stdint.h

2013-01-21 Thread Georg-Johann Lay
This adds the Embedded C bitsfx and fxbits functions to stdfix.h. The original stdfix.h is installed as stdfix-gcc.h and included by the new, avr-specific stdfix.h. The implementation uses __builtin_memcpy to get a no-op implementation. Ok for trunk? Johann PR target/54222 *

Re: [patch, fortran] Fix PR 55919

2013-01-21 Thread Thomas Koenig
Hi Steve, The patch looks OK to me. As this is a Windows, hopefully someone will confirm that the patch fixes the Windows issue before you commit. Thanks! Committed as rev. 195348 after Brad's confirmation that the patch works on Windows. One more regression down, 24 to go. Thomas

Re: [PATCH] PR c++/53609 - Wrong argument deduction for pack expansion in argument pack

2013-01-21 Thread Jason Merrill
On 01/21/2013 03:09 PM, Dodji Seketeli wrote: + ith_elem_is_expansion |= + PACK_EXPANSION_P (TREE_VEC_ELT (ARGUMENT_PACK_ARGS (arg_pack), + index)); Let's use argument_pack_element_is_expansion_p here, too. + /* Do we need to use the

RE: [PATCH, ARM] New CPU support for Marvell PJ4 cores

2013-01-21 Thread Yi-Hsiu Hsu
Hi Ramana, Sorry for missing the Changelog, I will add it for future patches. Thanks for your kindly help. Cheers, Compiler Team @ MTL Yi-Hsiu, Hsu -Original Message- From: Ramana Radhakrishnan [mailto:ramra...@arm.com] Sent: Monday, January 21, 2013 6:56 PM To: Yi-Hsiu Hsu Cc:

C++ PATCH for c++/56059 (ICE on error with decltype)

2013-01-21 Thread Jason Merrill
Here when I rebuilt the TREE_VEC of template arguments, I forgot to preserve the count of non-default args. Tested x86_64-pc-linux-gnu, applying to trunk and 4.7. commit ac41deca2b7fcbda67a0e99f112e116589e56ad8 Author: Jason Merrill ja...@redhat.com Date: Mon Jan 21 15:46:57 2013 -0500

Re: Cortex-A15 vfnma/vfnms test patch

2013-01-21 Thread amol pise
Dear All, Please let me know the patch is OK for trunk ? Thank You, Amol Pise On 1/21/13, amol pise amolpis...@gmail.com wrote: Dear All, I am working on Cortex-A15 using latest GCC toolchain. As we know that VFPv4 and SIMDv2 are the Cortex-A15 CPU Features, so, compared to VFPv3/ SIMDv1,

[google gcc-4_7, integration] Add more lightweight checks for dangling vectors

2013-01-21 Thread Paul Pluzhnikov
This patch sets destructed vector into an invalid state, such that subsequent calls to begin(), end(), size(), etc. all throw logic_error. Google ref b/7248326 Ok for google/gcc-4_7 and google/integration? Thanks, -- Paul Pluzhnikov Index: libstdc++-v3/include/bits/stl_vector.h

Re: [patch,avr] Ad PR54222: Add bitsfx and fxbits to stdint.h

2013-01-21 Thread Denis Chertykov
2013/1/21 Georg-Johann Lay a...@gjlay.de: This adds the Embedded C bitsfx and fxbits functions to stdfix.h. The original stdfix.h is installed as stdfix-gcc.h and included by the new, avr-specific stdfix.h. The implementation uses __builtin_memcpy to get a no-op implementation. Ok for