Abe Skolnik wrote:
Hi everybody!
In the current implementation of if conversion, loads and stores are
if-converted in a thread-unsafe way:
* loads were always executed, even when they should have not been.
Some source code could be rendered invalid due to null pointers
that were OK
Obivious coding style fix.
2015-06-22 Jiong Wang jiong.w...@arm.com
gcc/
* config/aarch64/aarch64.c (aarch64_expand_move_immediate): Sort case
label alphabetically.
--
Regards,
Jiong
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 16c8dba..dddf401 100644
Currently, there is only small model support for TLS Global Dynamic
(Desciptor) on AArch64. While TLS Global Dynamic (Descriptor) is
actually the same for all memory mode.
We always generate below code sequences:
R0 = GOT entry address of tls descriptor for var.
Rx = speialize_func
.tlsdesccall
As we have generalized GD Descriptor support for all memory model in
the first patch. Support for tiny model is quite straightforward. We
just need to output different instruction sequences according on memory
model.
OK for trunk?
2015-06-22 Jiong Wang jiong.w...@arm.com
gcc/
*
On 06/17/2015 04:44 PM, Jason Merrill wrote:
Now that reshape_init can return a non-CONSTRUCTOR, we need to call it
earlier in implicit_conversion.
I haven't noticed any problems with the original patch, but just to be
safe this patch limits the new reshape to the same conditions as the old
Hi,
when you pass a response file at link time and you use the GNU linker, then
collect2 creates another, temporary response file and passes it to the linker.
But it fails to delete the file after it is done. This can easily be seen
with the following manipulation:
On 06/09/2015 11:31 AM, Patrick Palka wrote:
This patch improves the heuristics of the warning in a number of ways.
The improvements are hopefully adequately documented in the code
comments.
The additions to the test case also highlight the improvements.
I tested an earlier version of this
Hello,
The ARM backend records FPU features as booleans, one for each feature. This
means that adding support for a new feature involves updating every entry in the
list of FPU descriptions in arm-fpus.def. This patch series changes the
representation of FPU features to use a simple bit-set and
Dear Andre,
It was indeed the associate(pam = im(:, c)) that I had in mind. If
you have that working and in the tescase, that's good enough for me.
Cheers
Paul
On 22 June 2015 at 17:15, Andre Vehreschild ve...@gmx.de wrote:
Hi Paul,
On Mon, 22 Jun 2015 16:04:09 +0200
Paul Richard Thomas
Hello,
The ARM backend uses an unsigned long to record CPU feature flags and there are
currently 30 bits in use. To be able to support new architecture features, the
current representation will need to be replaced so that more flags can be
recorded.
This series of patches replaces the single
On 06/22/2015 09:38 AM, Nick Clifton wrote:
Hi Guys,
The test file gcc/testsuite/gcc.dg/graphite/isl-ast-gen-if-1.c file
was generating an unexpected failure for the RX. When I investigated
I found that a return address on the stack was being corrupted, and I
tracked it down to the
On 04/05/15 17:37, Alexander Monakov wrote:
This patch introduces option -fno-plt that allows to expand calls that would
go via PLT to load the address of the function immediately at call site (which
introduces a GOT load). Cover letter explains the motivation for this patch.
New option
On 06/22/15 11:18, Bernd Schmidt wrote:
You can have a hint that it is desirable, but not a hint that it is correct
(because passes in between may invalidate that). The OpenACC directives
guarantee to the compiler that the program can be transformed into a parallel
form. If we lose them early
On 06/19/2015 11:36 AM, Paolo Bonzini wrote:
On 09/06/2015 16:22, Michael Haubenwallner wrote:
Hi build machinery maintainers,
since we always build the C++ compiler now, I fail to see the need to still
use RAW_CXX_TARGET_EXPORTS for libvtv.
The situation to expose the problem is:
* Use a
On 20/05/15 21:14, Joseph Myers wrote:
Again, the condition you propose to add doesn't make sense. arm_arch_X_ok
is only appropriate for tests using an explicit -march=X. Testing with
-march=armv7* should automatically skip this test anyway because it would
cause arm_thumb1_ok to fail.
Hi,
Hi,
I realized that transform_to_exit_first_loop_alt is missing an
update_stmt for the gimple_cond_set_rhs (transform_to_exit_first_loop
has an update_stmt after a similar gimple_cond_set_lhs).
Bootstrapped and reg-tested on x86_64.
Committed as trivial.
Thanks,
- Tom
Add missing
Hello,
Patch in the bottom adds support of IA MCU psABI to libgcc
(enables soft-fp) and libdecnumber (enables it for IA MCU).
Bootstrapped and regtested on top of [1/3] patch.
config/
* dfp.m4 (enable_decimal_float): Also set to yes for
i?86*-*-elfiamcu target.
gcc/
*
Hello,
The ARM backend uses an unsigned long to record CPU feature flags and there are
currently 30 bits in use. This series of patches replaces the single unsigned
long with a representation based on an array of values.
This patch replaces the existing representation of CPU feature sets with
Hi,
I would like to ping this. There are still few things to fix to make our
merging compliant at least for C/C++/Fortran rules (the array bounds for
Fortran and union ordering for C I believe) and I would like to progress
on this.
I don't like the changes to
On 06/22/15 12:20, Jakub Jelinek wrote:
OpenMP worksharing loop is just coordination between the threads in the
team, which thread takes which subset of the loop's iterations, and
optionally followed by a barrier. OpenMP simd loop is a loop that has
certain properties guaranteed by the user
On 06/22/2015 09:54 AM, Paolo Carlini wrote:
I think this also qualifies as obvious given the past work / discussion:
use in one more place declspecs-locations to improve the location of
the error message.
Agreed, thanks.
Jason
On 06/09/2015 11:31 AM, Patrick Palka wrote:
This patch refactors the entry point of -Wmisleading-indentation from:
void
warn_for_misleading_indentation (location_t guard_loc,
location_t body_loc,
location_t
On 06/19/2015 08:23 PM, Mikhail Maltsev wrote:
I see that version 5.2 is set as target milestone for this bug. Should I
backport the patch?
Please.
Jason
On Mon, Jun 22, 2015 at 01:00:51PM -0400, Nathan Sidwell wrote:
+ if (GET_CODE (arg) != CONST_INT
+ || (unsigned HOST_WIDE_INT)INTVAL (arg) = OACC_HWM)
Don't we have UINTVAL for this? So UINTVAL (arg).
Marek
On 22/06/15 13:47, Richard Biener wrote:
On Mon, Jun 22, 2015 at 1:33 PM, Tom de Vries tom_devr...@mentor.com wrote:
On 22/06/15 12:14, Richard Biener wrote:
On Mon, Jun 22, 2015 at 10:04 AM, Tom de Vries tom_devr...@mentor.com
wrote:
Hi,
during development of a patch I ran into a case
On 19/06/15 11:26, Tom de Vries wrote:
Hi,
DEF_GOMP_BUILTIN tests for 'flag_parallelize_loops'. But if
flag_parallelize_loops is one (which is also the default), then
pass_parloops doesn't do anything, and won't generate any OMP constructs.
This patch makes DEF_GOMP_BUILTIN tests
On 06/09/2015 11:31 AM, Patrick Palka wrote:
This patch removes the function is_first_nonwhitespace_on_line() in
favor of augmenting the function get_visual_column() to optionally
return the visual column corresponding to the first non-whitespace character
on the line. Existing usage of
Hi Jeff,
I'd tend to prefer to change the size of the array -- adding another
conditional in the loop may have unintended consequences that possibly
scramble things just enough to compromise the test.
Okey dokey, here is a revised version. Is this one OK ?
Cheers
Nick
gcc/ChangeLog
On 06/22/15 03:37, Andreas Schwab wrote:
Nathan Sidwell nat...@acm.org writes:
On 06/20/15 02:09, Andreas Schwab wrote:
This also fails on powerpc.
what is the build compiler?
It is a bootstrapped build, so the build compiler should not matter.
ok, thanks.
I've just built me a
On 06/18/2015 10:39 AM, David Malcolm wrote:
On Thu, 2015-06-18 at 11:41 -0400, Patrick Palka wrote:
On Tue, Jun 9, 2015 at 1:31 PM, Patrick Palka patr...@parcs.ath.cx wrote:
This patch refactors the entry point of -Wmisleading-indentation from:
void
warn_for_misleading_indentation
I have no more comments on this patch.
--
Joseph S. Myers
jos...@codesourcery.com
On 22/06/15 13:47, Richard Biener wrote:
(eventually also for the case where we
end up only computing the fast-query stuff).
Like this?
...
diff --git a/gcc/dominance.c b/gcc/dominance.c
index 9c66ca2..58fc6fd 100644
--- a/gcc/dominance.c
+++ b/gcc/dominance.c
@@ -679,6 +679,12 @@
Hi Paul,
On Mon, 22 Jun 2015 16:04:09 +0200
Paul Richard Thomas paul.richard.tho...@gmail.com wrote:
Hi Andre,
Some questions: The first and second chunks look a bit awkward in
parse.c. Do they have to be there in order that primary.c does the
right thing?
I tried at first to do this rank
Add query for template-dependent arguments to -fdump-ada-spec:
http://gcc.gnu.org/ml/gcc-patches/2015-06/msg00403.html
Get rid of assembly file with -fdump-ada-spec:
http://gcc.gnu.org/ml/gcc-patches/2015-06/msg00420.html
Thanks in advance.
--
Eric Botcazou
Hello,
The documentation for the ARMv8.1 +rdma option doesn't mention that enabling it
also implies enabling Adv.SIMD. This patch fixes that.
The documentation for the -march and -mcpu options are also a little messy, this
patch tries to make the text clearer and adds a (texinfo) link to the
On 06/22/2015 10:07 AM, Nicholas Clifton wrote:
Hi Jeff,
I'd tend to prefer to change the size of the array -- adding another
conditional in the loop may have unintended consequences that possibly
scramble things just enough to compromise the test.
Okey dokey, here is a revised version. Is
I think we should keep a comment to clarify why we don't care about
type_quals here.
Jason
Hi,
On 06/22/2015 06:56 PM, Jason Merrill wrote:
I think we should keep a comment to clarify why we don't care about
type_quals here.
Ok, I will commit with a comment added.
Thanks,
Paolo.
On Mon, 22 Jun 2015 16:24:56 +0200
Jakub Jelinek ja...@redhat.com wrote:
On Mon, Jun 22, 2015 at 02:55:49PM +0100, Julian Brown wrote:
One problem is that (at least on the GPU hardware we've considered
so far) we're somewhat constrained in how much control we have over
how the underlying
Hello,
This patch series changes the representation of FPU features to use a simple
bit-set and flags, as is done elsewhere.
This patch uses the new representation of FPU feature sets.
Tested the series for arm-none-linux-gnueabihf with check-gcc
Ok for trunk?
Matthew
gcc/
2015-06-22
On 06/22/2015 04:24 PM, Jakub Jelinek wrote:
I don't understand why lowering the way you suggest helps here at all.
In the proposed scheme, you essentially have whole function
in e.g. worker-single or vector-single mode, which you need to be able to
handle properly in any case, because users can
Hello,
The ARM backend uses an unsigned long to record CPU feature flags and there are
currently 30 bits in use. This series of patches replaces the single unsigned
long with a representation based on an array of values.
This patch adds, but doesn't use, type arm_feature_set and macros prefixed
On 06/06/2015 05:34 AM, Marc Glisse wrote:
Hello,
as discussed around
https://gcc.gnu.org/ml/gcc-patches/2015-06/msg00041.html
we are currently guessing the type of a?b:c incorrectly. This does not
affect current simplifications, because the only 'cond' in output
patterns are at the outermost
Hello,
The ARM backend uses an unsigned long to record CPU feature flags and there are
currently 30 bits in use. This series of patches replaces the single unsigned
long with a representation based on an array of values.
This patch updates the entries in the arm-core.def and arm-arches.def
On Mon, Jun 22, 2015 at 12:08:36PM -0400, Nathan Sidwell wrote:
On 06/22/15 11:18, Bernd Schmidt wrote:
You can have a hint that it is desirable, but not a hint that it is correct
(because passes in between may invalidate that). The OpenACC directives
guarantee to the compiler that the
On 06/22/15 13:04, Marek Polacek wrote:
On Mon, Jun 22, 2015 at 01:00:51PM -0400, Nathan Sidwell wrote:
+ if (GET_CODE (arg) != CONST_INT
+ || (unsigned HOST_WIDE_INT)INTVAL (arg) = OACC_HWM)
Don't we have UINTVAL for this? So UINTVAL (arg).
Oh, thanks! will fix
nathan
--
Nathan
Hi Guys,
The test file gcc/testsuite/gcc.dg/graphite/isl-ast-gen-if-1.c file
was generating an unexpected failure for the RX. When I investigated
I found that a return address on the stack was being corrupted, and I
tracked it down to the foo() function:
foo (int a[], int n)
{
On 06/18/2015 10:57 AM, Patrick Palka wrote:
[ big snip ]
These bogus warnings are pre-existing, however (i.e. not caused by this
patch).
(nods) Fixing the false positives from libpng/bdwgc sounds like a
separate issue and thus a separate patch then.
Agreed.
jeff
I've committed this patch to the gomp4 branch, after testing. It does a number
of cleanups
1) removes the ptx-specific TID, NTID, CTAID NCTAID builtins, replacing them
with openacc-specific GOACC_id and GOACC_nid builtins, using gang/worker
vector level enumeration. These are mapped by
I recently added a debug mode assertion that std::polar is not called
with a negative rho argument, which this test does.
Tested powerpc64le-linux, committed to trunk.
commit 3592c4a31ba7f3af4eb8111565888651652ad7b1
Author: Jonathan Wakely jwak...@redhat.com
Date: Mon Jun 22 15:08:55 2015
On 17/06/15 21:36 +0100, Jonathan Wakely wrote:
I didn't get time to finish this for 5.1, but this adds missing C++11
allocator support to std::list.
François pointed out that this change means we can update
__gnu_debug::list to derive from an allocator-aware _Safe_sequence.
We can do the
On 20/06/15 12:59 +0100, Jonathan Wakely wrote:
On 20/06/15 12:03 +0200, François Dumont wrote:
Hi
2 experimental tests are failing in debug mode because
__do_str_codecvt is sometimes taking address of string front() and
back() even if empty. It wasn't use so not a big issue but it still
On Mon, 22 Jun 2015, Jan Hubicka wrote:
On Mon, 8 Jun 2015, Jan Hubicka wrote:
I think we should instead work towards eliminating the get_alias_set
langhook first. The LTO langhook variant contains the same handling,
btw,
so just inline that into get_alias_set
On Sat, Jun 20, 2015 at 9:12 AM, Kugan
kugan.vivekanandara...@linaro.org wrote:
As discussed in PR64130, this patch improves the VRP value ranges for
unsigned division.
Bootstrapped and regression tested on x86_64-linux-gnu and regression
tested on arm-none-linux-gnu with no new regression.
On 29/04/15 16:22 +0100, Jonathan Wakely wrote:
I think this covers all the places in the library where we do:
++i, ++j
I missed one. Tested powerpc64-linux, committed to trunk.
commit 28542877cbeae9e1da3bdc8e3a5a3053b2f0ee23
Author: Jonathan Wakely jwak...@redhat.com
Date: Mon Jun 22
On 06/22/15 13:04, Marek Polacek wrote:
On Mon, Jun 22, 2015 at 01:00:51PM -0400, Nathan Sidwell wrote:
+ if (GET_CODE (arg) != CONST_INT
+ || (unsigned HOST_WIDE_INT)INTVAL (arg) = OACC_HWM)
Don't we have UINTVAL for this? So UINTVAL (arg).
Applied the attached, after testing. Also
I've committed the following patch to gcc 5 branch as rev.224761.
The patch was bootstrapped on x86-64.
2015-06-22 Vladimir Makarov vmaka...@redhat.com
PR bootstrap/63740
* lra-lives.c (process_bb_lives): Check insn copying the same
reload pseudo and don't create a
On Mon, Jun 22, 2015 at 09:24:07AM +0200, Eric Botcazou wrote:
* rtlanal.c (commutative_operand_precedence): Correct comments.
* simplify-rtx.c (simplify_plus_minus_op_data_cmp): Delete forward
declaration. Return an int. Distinguish REG,REG return from
others.
Hi,
this patch fixes thinko when initializing ao oracle in
ipa_polymorphic_call_context::get_dynamic_type. It took get_deref_alias_set of
vptr type
instead of get_alias_set that now makes difference because pointer types are
different.
Bootstrapped/regtested x86_64-linux, comitted.
Honza
On Mon, 8 Jun 2015, Jan Hubicka wrote:
I think we should instead work towards eliminating the get_alias_set
langhook first. The LTO langhook variant contains the same handling,
btw,
so just inline that into get_alias_set and see what remains?
I see, i completely
Hi,
this patch extends earlier Martin's patch. I completely removed
parse_tree_args because it assumed that every function has only one set
of parm types and one return value type. We really want to compare two
sets of parameter types (DECL_ARGUMENTS and TYPE_PARM_TYPES) as they do not
need to
This avoids doing $subject in the vectorizer.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2015-06-22 Richard Biener rguent...@suse.de
* tree-vectorizer.h (_loop_vec_info): Add scalar_cost_vec
and single_scalar_iteration_cost members.
On 22/06/15 12:14, Richard Biener wrote:
On Mon, Jun 22, 2015 at 10:04 AM, Tom de Vries tom_devr...@mentor.com wrote:
Hi,
during development of a patch I ran into a case where
compute_dominance_frontiers was called with incorrect dominance info.
The result was a segmentation violation
On Mon, Jun 22, 2015 at 1:33 PM, Tom de Vries tom_devr...@mentor.com wrote:
On 22/06/15 12:14, Richard Biener wrote:
On Mon, Jun 22, 2015 at 10:04 AM, Tom de Vries tom_devr...@mentor.com
wrote:
Hi,
during development of a patch I ran into a case where
compute_dominance_frontiers was
This is the ARM version of the patches to strengthen memory barriers for the
__sync builtins on ARMv8 targets
(https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01989.html).
This patch adds tests for the code generated by the ARM backend for the __sync
builtins.
Tested the series for
On Mon, Jun 22, 2015 at 10:04 AM, Tom de Vries tom_devr...@mentor.com wrote:
Hi,
during development of a patch I ran into a case where
compute_dominance_frontiers was called with incorrect dominance info.
The result was a segmentation violation somewhere in the bitmap code while
executing
Nathan Sidwell nat...@acm.org writes:
On 06/20/15 02:09, Andreas Schwab wrote:
This also fails on powerpc.
what is the build compiler?
It is a bootstrapped build, so the build compiler should not matter.
Andreas.
--
Andreas Schwab, SUSE Labs, sch...@suse.de
GPG Key fingerprint = 0196
Hi,
during development of a patch I ran into a case where
compute_dominance_frontiers was called with incorrect dominance info.
The result was a segmentation violation somewhere in the bitmap code
while executing this bitmap_set_bit in compute_dominance_frontiers_1:
...
if
On 21/05/15 13:42, ber...@gcc.gnu.org wrote:
Author: bernds
Date: Thu May 21 11:42:14 2015
New Revision: 223478
URL: https://gcc.gnu.org/viewcvs?rev=223478root=gccview=rev
Log:
* omp-low.c (struct omp_region): Add a gwv_this field.
(bb_region_map): New variable.
Hello!
As shown in the PR [1], RTX costs can reject combination of the
operation and its embedded comparison. Attached patch fixes this by
ignoring the cost of embedded comparison.
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65871#c10
2015-06-22 Uros Bizjak ubiz...@gmail.com
PR
This is the ARM version of the patches to strengthen memory barriers for the
__sync builtins on ARMv8 targets
(https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01989.html).
This patch changes the code generated for __sync_type_compare_and_swap to remove
the acquire-barrier from the load and end the
This patch fixes
FAIL: gcc.target/powerpc/ti_math1.c scan-assembler-times adde 1
a failure caused by combine simplifying this i2src
(plus:DI (plus:DI (reg:DI 165 [ val+8 ])
(reg:DI 169 [+8 ]))
(reg:DI 76 ca))
to this
(plus:DI (plus:DI (reg:DI 76 ca)
(reg:DI 165 [
This is the ARM version of the patches to strengthen memory barriers for the
__sync builtins on ARMv8 targets
(https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01989.html).
The problem is that the barriers generated for the __sync builtins for ARMv8
targets are too weak. This affects the full and
Hi,
attached patch handles reductions in oacc kernels region.
The approach uses the normal parloops reduction handling code, with
these modifications:
1.
For each reduction, we look for this pattern in the oacc-lowered code,
and store 'addr' in the corresponding struct reduction_info:
...
On Mon, 22 Jun 2015 16:24:56 +0200
Jakub Jelinek ja...@redhat.com wrote:
On Mon, Jun 22, 2015 at 02:55:49PM +0100, Julian Brown wrote:
One problem is that (at least on the GPU hardware we've considered
so far) we're somewhat constrained in how much control we have over
how the underlying
Hi,
the gomp-4_0-branch contains the kernels oacc pass group. I've run into
trouble before with this pass group due to the fact that it uses passes
in an unusual location or order (pass_lim before pass_stdarg,
https://gcc.gnu.org/ml/gcc/2015-01/msg00282.html ).
In an attempt to find this
On Mon, Jun 22, 2015 at 06:48:10PM +0100, Julian Brown wrote:
In vector-single or worker-single mode, divergence of threads within a
warp or a CTA is controlled by broadcasting the controlling expression
of conditional branches to the set of inactive threads, so each of
those follows along
I've committed patch for PR63740 to the trunk as rev. 224753.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63740
The patch was bootstrapped on x86-64.
2015-06-22 Vladimir Makarov vmaka...@redhat.com
PR bootstrap/63740
* lra-lives.c (process_bb_lives): Check insn copying the
On Fri, Jun 19, 2015 at 05:51:53PM +0200, Marc Glisse wrote:
On Fri, 19 Jun 2015, Marek Polacek wrote:
+/* x + y - (x | y) - x y */
+(simplify
+ (minus (plus @0 @1) (bit_ior @0 @1))
+ (if (!TYPE_OVERFLOW_SANITIZED (type) !TYPE_SATURATING (type))
+ (bit_and @0 @1)))
+
+/* (x + y) - (x
On 06/22/2015 09:33 AM, Eric Botcazou wrote:
Add query for template-dependent arguments to -fdump-ada-spec:
http://gcc.gnu.org/ml/gcc-patches/2015-06/msg00403.html
Get rid of assembly file with -fdump-ada-spec:
http://gcc.gnu.org/ml/gcc-patches/2015-06/msg00420.html
OK for both.
jeff
On Mon, 22 Jun 2015, Jiong Wang wrote:
Have done a quick experiment, -fno-plt doesn't work on AArch64.
it's because although this patch force the function address into register,
but the combine pass runs later combine it back as AArch64 have defined such
insn pattern.
For X86, it's not
On Mon, Jun 22, 2015 at 1:29 PM, Jeff Law l...@redhat.com wrote:
On 06/09/2015 11:31 AM, Patrick Palka wrote:
This patch refactors the entry point of -Wmisleading-indentation from:
void
warn_for_misleading_indentation (location_t guard_loc,
The following patch fixes PR63740 which is describedin details on
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63740
Committed as rev. 224752.
I'll commit later the same patch for the trunk.
2015-06-22 Vladimir Makarov vmaka...@redhat.com
PR bootstrap/63740
* lra-lives.c
On Sun, Jun 21, 2015 at 05:05:14PM -0600, Martin Sebor wrote:
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/addr_builtin-pr66516.c
@@ -0,0 +1,59 @@
+/* { dg-do compile } */
One more nit: I think I'd prefer naming the test addr-builtin-1.c
and then putting /* PR c/66516 */ on the first line of the
On 06/15/2015 02:32 PM, Patrick Palka wrote:
On Mon, Jun 15, 2015 at 2:05 PM, Jason Merrill ja...@redhat.com wrote:
Any reason not to use grow_tree_vec?
Doing so causes a lot of ICEs in the testsuite. I think it's because
grow_tree_vec invalidates the older parameter_vec which some trees may
It seems like this patch regresess pr59630.c testcase; I don't see
the testcase being addressed in this patch.
Thanks for the review and for pointing out this regression!
I missed it among all the C test suite failures (I see 157
of them in 24 distinct tests on x86_64.)
pr59630 is marked
Hello,
I am starting (hopefully small) serie of patches to support
new ABI dedicated for Intel's MicroController Units [1].
Support for new arch was introduced into Binutils in a few threads, e.g. [2].
This patchset includes:
- Support in GCC: new switch (-miamcu), macro etc.
- Changes to
Dear All,
This patch enables submodule support in gfortran. Submodules are a
feature of F2008 but are fully described in ISO/IEC TR 19767:2004(E).
The patch has one significant non-conformance (that I know about,
anyway!); whilst private derived type components are correctly dealt
with, symbols
Hi,
I think this qualifies as obvious: we reset type_quals to
TYPE_UNQUALIFIED and then we only use it in a 'if (type_quals !=
TYPE_UNQUALIFIED)' test before returning.
Thanks,
Paolo.
///
2015-06-22 Paolo Carlini paolo.carl...@oracle.com
* decl.c
On 06/19/2015 03:45 PM, Jakub Jelinek wrote:
I actually believe having some optimization passes in between the ompexp
and the lowering of the IR into the form PTX wants is highly desirable,
the form with the worker-single or vector-single mode lowered will contain
too complex CFG for many
On Mon, Jun 22, 2015 at 03:59:57PM +0200, Bernd Schmidt wrote:
On 06/19/2015 03:45 PM, Jakub Jelinek wrote:
I actually believe having some optimization passes in between the ompexp
and the lowering of the IR into the form PTX wants is highly desirable,
the form with the worker-single or
On Thu, 18 Jun 2015, Tom de Vries wrote:
On 13/06/15 16:24, Tom de Vries wrote:
Hi,
this patch allows try_transform_to_exit_first_loop_alt to succeed when
handling cases where the expression representing the number of
iterations contains a cast.
Currently,
Hello,
This patch introduces basic support into GCC.
Bootstrapped and regtested.
/
* configure.ac (ospace_frag): Enable for i?86*-*-elfiamcu
target.
* configure: Regenerate.
gcc/
* config.gcc: Support i[34567]86-*-elfiamcu target.
* config/i386/iamcu.h:
On Sun, Jun 21, 2015 at 05:05:14PM -0600, Martin Sebor wrote:
Attached is a patch to reject C and C++ constructs that result
in obtaining a pointer (or a reference in C++) to a builtin
function. These constructs are currently silently accepted by
GCC and, in most cases(*), result in a linker
On Fri, 19 Jun 2015, Marek Polacek wrote:
On Thu, Jun 18, 2015 at 05:41:18PM +0200, Marek Polacek wrote:
Again for symmetry, it seems like this comes with
x + y - (x | y) - x y
x + y - (x y) - x | y
which seem fine when overflow is undefined or wraps, but not if for
instance
Hi,
I think this also qualifies as obvious given the past work / discussion:
use in one more place declspecs-locations to improve the location of
the error message.
Thanks,
Paolo.
/cp
2015-06-22 Paolo Carlini paolo.carl...@oracle.com
* decl.c
On Sun, 21 Jun 2015, Martin Sebor wrote:
diff --git a/gcc/c/c-typeck.c b/gcc/c/c-typeck.c
index 636e0bb..637a292 100644
--- a/gcc/c/c-typeck.c
+++ b/gcc/c/c-typeck.c
@@ -58,6 +58,8 @@ along with GCC; see the file COPYING3. If not see
#include cilk.h
#include gomp-constants.h
On Mon, Jun 22, 2015 at 02:55:49PM +0100, Julian Brown wrote:
One problem is that (at least on the GPU hardware we've considered so
far) we're somewhat constrained in how much control we have over how the
underlying hardware executes code: it's possible to draw up a scheme
where OpenACC
On Thu, 18 Jun 2015, Marek Polacek wrote:
On Tue, Jun 16, 2015 at 03:35:15PM +0200, Richard Biener wrote:
We already have
/* (x y) ^ (x | y) - x ^ y */
(simplify
(bit_xor:c (bit_and @0 @1) (bit_ior @0 @1))
(bit_xor @0 @1))
but of course with minus it doesn't commutate so
On Fri, 19 Jun 2015 14:25:57 +0200
Jakub Jelinek ja...@redhat.com wrote:
On Fri, Jun 19, 2015 at 11:53:14AM +0200, Bernd Schmidt wrote:
On 05/28/2015 05:08 PM, Jakub Jelinek wrote:
I understand it is more work, I'd just like to ask that when
designing stuff for the OpenACC offloading
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