Issue
-
This patch covers the following issues:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=51259
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64965
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66317
According to:
https://gcc.gnu.org/onlinedocs/gcc-5.3.0/cpp/Preprocessor-Output.html#Preproces
This function is used to validate REG_EQUIV notes generated by ira,
and to validate potential insn combines performed by ira. The two
conditions are not exactly the same, with reload being more
restrictive. Separate them so more combines/moves can occur.
For example, this sequence from cfgexpand
This patch actually improves generated code, because REG_DEAD notes
used by the old insn scan are not always present. On x86_64, see
gcc/wide-int-print.o:print_hex for an example of a function that is
smaller and uses one less callee saved reg.
* ira.c (combine_and_move_insns): Rather tha
Notes added by add_store_equivs are not used directly or indirectly by
combine_and_move_insns. add_store_equivs can therefore run later
without affecting the output of combine_and_move_insns, and thus
add_store_equivs need not take into account potentially moved insns.
Since not all potentially co
df_analyze set up luids are more-or-less still valid. The only
insn changes at this point are due to combine_and_move_insns.
* ira.c (add_store_equivs): Use DF_INSN_LUID rather than
bitmap seen_insns.
diff --git a/gcc/ira.c b/gcc/ira.c
index cfd448c..1cace25 100644
--- a/gcc/ira.
Lose a couple of static vars.
* ira.c (struct equiv_mem_data): New.
(equiv_mem, equiv_mem_modified): Delete static vars.
(validate_equiv_mem_from_store): Use "data" param to communicate..
(validate_equiv_mem): ..from here.
diff --git a/gcc/ira.c b/gcc/ira.c
index a
This just splits up add_store_equivs.
* ira.c (add_store_equivs, combine_and_move_insns): New functions,
split out from..
(update_reg_equivs): ..here. Move allocation and freeing of
reg_equiv, and calls to grow_reg_equivs, init_alias_analysis,
end_alias_ana
Where pdx_subregs[regno] is used, reg_equiv[regno] is also used.
* ira.c (pdx_subregs): Delete.
(struct equivalence): Add pdx_subregs field.
(set_paradoxical_subreg): Remove pdx_subregs param. Update
pdx_subregs access.
(update_equiv_regs): Don't create or
This series tidies some of the early ira code, in the process making a
tiny improvement to register pressure. Patches 1 to 3 are fairly
simple tidies, with zero impact on generated code. Patch 4 also is
mainly a tidy, but could see some extra REG_EQUIV notes added by
add_store_equivs. In practic
On 03/16/2016 06:43 PM, Martin Sebor wrote:
@@ -3974,6 +3974,38 @@ build_vec_cmp (tree_code code, tree type,
return build3 (VEC_COND_EXPR, type, cmp, minus_one_vec, zero_vec);
}
+/* Possibly warn about an address never being NULL. */
+
+static void
+warn_for_null_address (location_t locat
On Thu, Mar 17, 2016 at 5:31 PM, Robin Dapp wrote:
> The attached patch is a first and somewhat hideous attempt to fix the
> missed optimization discussed here:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69526
>
> where (paraphrasing) a spurious
> n = n - 1
> n = (sizetype) n
> n = n + 1
> is
Hi!
The following testcase is diagnosed as errorneous, because the preprocessor
mishandles
#define c(x) x
vector c;
and
#define int(x) x
vector int n;
The thing is if a function-like macro is not followed by (, then it is kept
as is, but the builtin conditional macro handling expects it always
On 03/14/2016 03:25 PM, Martin Sebor wrote:
The attached patch fixes the outstanding cases mentioned in comment
10 on bug c++/67376. While testing the fix I uncovered a number of
other related problems without which the test would have been
incomplete. They include:
PR c++/70170 - [6 regressio
Marc Glisse writes:
> Or do you mean that it is supported, from gcc's directory, to call:
> make configure-stage1-gmp
> make all-stage1-gmp CFLAGS="something new"
Yes, that is mandated by the GCS.
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756
POINTER_SIZE is the proper macro to retrieve pointer size in bits for the
target ABI, but new code incorrectly used BITS_PER_WORD, breaking 32-bit
code generation.
* config/nvptx/nvptx.c (nvptx_init_unisimt_predicate): Use
POINTER_SIZE instead of BITS_PER_WORD.
(nvptx_decla
static tree cxx_eval_constant_expression (const constexpr_ctx *, tree,
- bool, bool *, bool *, tree * = NULL);
+ bool, bool *, bool *, bool * = NULL,
+ tree * = NULL);
I didn't look deeply, but do you end up fixi
On Sun, 20 Mar 2016, Andreas Schwab wrote:
Marc Glisse writes:
For most packages, providing CFLAGS for configure is enough, you don't
have to give them *again* to make.
The toplevel GCC Makefile needs to pass down any CFLAGS setting that has
been passed in by the user.
Yes, and passing th
Marc Glisse writes:
> For most packages, providing CFLAGS for configure is enough, you don't
> have to give them *again* to make.
The toplevel GCC Makefile needs to pass down any CFLAGS setting that has
been passed in by the user.
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fing
On 03/18/2016 06:43 AM, Joseph Myers wrote:
On Thu, 17 Mar 2016, Hongxu Jia wrote:
+ if (add_file_prefix_map(arg) < 0)
+ if (add_file_prefix_map (arg) < 0)
I will correct them in V3.
Bad formatting (missing space before '('). Likewise elsewhere in this
patch.
+@item -ffile-pr
On Sun, 20 Mar 2016, Bernd Edlinger wrote:
On 20.03.2016 11:03, Marc Glisse wrote:
On Sun, 20 Mar 2016, Bernd Edlinger wrote:
So I looked for a way to disable the asm code, and found it can be
done, but differently than for in-tree gmp. See the attached patch.
As noted in PR 67728, it seems
On 20.03.2016 11:03, Marc Glisse wrote:
> On Sun, 20 Mar 2016, Bernd Edlinger wrote:
>
>>> So I looked for a way to disable the asm code, and found it can be
>>> done, but differently than for in-tree gmp. See the attached patch.
>>>
>>> As noted in PR 67728, it seems that gcc's intrusive w
On Thu, Mar 17, 2016 at 01:32:15PM +, Joern Rennecke wrote:
> > Note that during register allocation / reload, REGNO equivalence is
> > generally wrong,
> as it fails to distinguish between the frame pointer and a hard register that
> has the
> same regno as the frame pointer which has been c
I am testing the following to fix PR70271
Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.
Richard.
2016-03-17 Richard Biener
PR debug/70271
* dwarf2out.c (dwarf2out_early_finish): Process deferred_asm_name
last.
* g++.dg/debug/pr70271.C: New t
On Sun, 20 Mar 2016, Bernd Edlinger wrote:
So I looked for a way to disable the asm code, and found it can be
done, but differently than for in-tree gmp. See the attached patch.
As noted in PR 67728, it seems that gcc's intrusive way of overriding
CFLAGS also breaks GMP itself, not just MPFR,
On 19.03.2016 21:29, Marc Glisse wrote:
> On Tue, 5 Jan 2016, Richard Biener wrote:
>> On January 5, 2016 2:20:42 PM GMT+01:00, Bernd Edlinger
>> wrote:
>>> On 05.01.2016 13:58, Bernd Schmidt wrote:
On 01/05/2016 09:44 AM, Bernd Edlinger wrote:
> Using asm code is generally not desirable
The attached patch is a first and somewhat hideous attempt to fix the
missed optimization discussed here:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69526
where (paraphrasing) a spurious
n = n - 1
n = (sizetype) n
n = n + 1
is being created.
The patch tries to avoid this on tree level as well a
On Thu, Mar 17, 2016 at 3:36 PM, Kumar, Venkataramanan
wrote:
> Hi Uros,
>
> The below patch changes the latency values for fp type load reservations.
>
> It passes normal bootstrap and bootstrap with BOOT_CFLAGS="-O2 -g -
> march=znver1 -mno-clzero -mno-sha " on avx2 target.
> Also compiled and
Ping.
On Fri, Mar 11, 2016 at 9:09 AM, H.J. Lu wrote:
> We can't set flag_pie to the default when flag_pic == 0, which may be
> set by -fno-pic or -fno-PIC, since the default value of flag_pie is
> non-zero when GCC is configured with --enable-default-pie. We need
> to initialize flag_pic to -1
On Fri, Mar 18, 2016 at 1:46 PM, Bernd Schmidt wrote:
> On 03/17/2016 06:23 AM, David Wohlferd wrote:
>>
>> 2016-03-16 David Wohlferd
>> Bernd Schmidt
>>
>> * doc/extend.texi: Doc basic asm behavior re clobbers.
>>
>
> Any objections from the release managers if I install this f
On 15/03/16 12:37, Richard Biener wrote:
On Mon, 14 Mar 2016, Tom de Vries wrote:
Hi,
this patch fixes PR70161, a 4.9/5/6 regression.
Currently when using -fdump-ipa-all-graph, the compiler ICEs in
execute_function_dump when testing for pass->graph_dump_initialized, because
pass == NULL.
The
Hi Senthil,
> diff --git a/gcc/testsuite/gcc.c-torture/compile/20151204.c
> b/gcc/testsuite/gcc.c-torture/compile/20151204.c
> index 036316c..0a60871 100644
> --- a/gcc/testsuite/gcc.c-torture/compile/20151204.c
> +++ b/gcc/testsuite/gcc.c-torture/compile/20151204.c
> @@ -1,3 +1,5 @@
> +/* { dg-s
update_equiv_regs will search for (set (MEM) (REG)) where the REG is
only used in a single basic block and is always equivalent to the memory
location in that block and if moving the store from its present location
to the insn which sets REG would be safe. If those conditions are met,
then
> Hi,
>
> this patch fixes lto PR70187, a 6 regression.
>
> We run into an ICE in in possible_polymorphic_call_targets when
> accessing nodes[0]->decl because nodes == vNULL:
> ...
> if (!outer_type->all_derivations_known)
> {
> if (!speculative && final_warning_records
> &&
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