Re: [PATCH v7] genemit.c (main): split insn-emit.c for compiling parallelly

Ping …. …. Jojo 在 2020年10月24日 +0800 PM2:02，Jojo R ，写道： > Hi, > > Has this patch been merged ? > > I track this some weeks and the patch has reviewed still on the way ... > > Could someone help me ? > > Thanks so much. > > Jojo > 在 2020年10月8日 +0800 AM10:01，Jojo R ，写道： > >

Re: move sincos after pre

On Oct 23, 2020, Richard Biener wrote: > Can you move it one pass further after sink please? I did, but it didn't solve the recip regressions that my first attempt brought about. > Also I don't > remember exactly but does pass_sincos only handle sin/cos unifying? It rearranges some powi

[RS6000] Separate dg-require-effective-target options

Subject was "[RS6000] Tests that use int128_t and -m32" I meant to make this change before committing too. Pushed. * gcc.target/powerpc/vsx_mask-count-runnable.c: Separate options passed to dg-require-effective-target. * gcc.target/powerpc/vsx_mask-expand-runnable.c:

Re: [RS6000] Unsupported test options for -m32

On Mon, Oct 26, 2020 at 7:35 PM Alan Modra wrote: > $ grep mcmodel gcc/config/rs6000/*.opt > gcc/config/rs6000/aix64.opt:mcmodel= > gcc/config/rs6000/aix64.opt:Known code models (for use with the -mcmodel= > option): > gcc/config/rs6000/linux64.opt:mcmodel= > gcc/config/rs6000/linux64.opt:Known

float.h: C2x NaN and Inf macros

C2x adds macros for NaNs and infinities to , some of them previously in (and some still in as well in C2x as an obsolescent feature). Add these macros to GCC's implementation. This omits the macros for DFP signaling NaNs, leaving those to be added in a separate patch which will also need to

[RS6000] Adjust testcases for power10 instructions V2

Revised version. * gcc.dg/pr56727-2.c, gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c, gcc.target/powerpc/fold-vec-load-builtin_vec_xl-char.c, gcc.target/powerpc/fold-vec-load-builtin_vec_xl-double.c,

Re: [RS6000] Unsupported test options for -m32

On Mon, Oct 26, 2020 at 04:28:20PM +, Iain Sandoe wrote: > David Edelsohn via Gcc-patches wrote: > > > FAIL: gcc.target/powerpc/swaps-p8-22.c (test for excess errors) > > Excess errors: > > cc1: error: '-mcmodel' not supported in this configuration > > > > *

Re: Fix fnspecs for math builtins

On Mon, 26 Oct 2020, Jan Hubicka wrote: > Hi, > this patch makes us to use ".C" and ".P" fnspecs where > applicable. I also noticed that gamma and variants are > declared as storing to memory while they are not (gamma_r does) I think the point is that they store to the global signgam. --

Re: [RS6000] Tests that use int128_t and -m32

On Mon, Oct 26, 2020 at 07:33:49AM -0500, Segher Boessenkool wrote: > On Sun, Oct 25, 2020 at 09:50:01PM +1030, Alan Modra wrote: > > All these tests fail with -m32 due to lack of int128 support, > > Is there any good reason __int128 is not enabled for rs6000 -m32, btw? Lack of addti3 and subti3

Re: [PATCH][middle-end][i386][Version 4] Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

Hi, Uros, Could you please check the change compared to the previous version for i386.c as following: Let me know any issue there. Thanks a lot. Qing --- gcc/config/i386/i386.c | 136 ++--- .../gcc.target/i386/zero-scratch-regs-28.c | 17

Re: PowerPC: Use __float128 instead of __ieee128 in tests.

On Thu, 2020-10-22 at 18:12 -0400, Michael Meissner via Gcc-patches wrote: > PowerPC: Use __float128 instead of __ieee128 in tests. > > I have split all of these patches into separate patches to hopefully get them > into the tree. > > Two of the tests used the __ieee128 keyword instead of

Re: PowerPC: Add -mno-gnu-attributes to ibm-ldouble.o

On Thu, 2020-10-22 at 18:05 -0400, Michael Meissner via Gcc-patches wrote: > PowerPC: Add -mno-gnu-attributes to ibm-ldouble.o. > > I have split all of these patches into separate patches to hopefully get them > into the tree. > > This patch is split off from the patch adding __float128 <->

Re: PowerPC: Allow C/C++ to change long double type on GLIBC 2.32.

On Thu, 2020-10-22 at 18:15 -0400, Michael Meissner via Gcc-patches wrote: > PowerPC: Allow C/C++ to change long double type on GLIBC 2.32. > > This is a new patch. It turns off the warning about switching the long double > type via compile line if the GLIBC is 2.32 or newer. It only does this

Re: PowerPC: Map IEEE 128-bit long double built-in functions

On Thu, 2020-10-22 at 18:03 -0400, Michael Meissner via Gcc-patches wrote: > PowerPC: Map IEEE 128-bit long double built-in functions > > This patch is revised from the first and second versions of the patch posted. > It now uses the names that are not in the user's namespace (i.e. __sinieee128 >

Re: [RS6000] Non-pcrel tests when power10

On Mon, Oct 26, 2020 at 03:18:39PM -0500, Segher Boessenkool wrote: > Hi! > > On Thu, Oct 22, 2020 at 05:28:17PM +1030, Alan Modra wrote: > > These tests require -mno-pcrel because they are testing features > > of the non-pcrel ABI. > > > --- a/gcc/testsuite/gcc.target/powerpc/cprophard.c > >

libgo patch committed: Additional BSD-specific syscall wrappers

This libgo patch by Nikhil Benesch imports additional code from upstream for handing system calls on BSD systems. This makes the syscall package on NetBSD complete enough to compile the standard library. Boostrapped and ran Go testsuite on x86_64-pc-linux-gnu. Committed to mainline. Ian

Use EAF_RETURN_ARG in tree-ssa-ccp.c

Hi, while looking for special cases of buitins I noticed that tree-ssa-ccp can use EAF_RETURNS_ARG. I wonder if same should be done by value numbering and other propagators Bootstrapped/regtested x86_64-linux, OK? Honza * tree-ssa-ccp.c (evaluate_stmt): Use EAF_RETURNS_ARG; do not

Fix fnspecs for math builtins

Hi, this patch makes us to use ".C" and ".P" fnspecs where applicable. I also noticed that gamma and variants are declared as storing to memory while they are not (gamma_r does) Bootstrapped/regtested x86_64-linux, OK? gcc/ChangeLog: 2020-10-26 Jan Hubicka * builtin-attrs.def

[PATCH] Combine logical OR ranges properly. pr97567

In the core of gori_compute::logical_combine we are suppose to combine the calculated true and false ranges on each side of  the operation. when encountering [0,0] =   c_3  | c_4 we know we only need to consider the FALSE values of the range carried by c_3 and c_4, but it can be EITHER of

[PATCH] libstdc++: Add C++2a synchronization support

From: Thomas Rodgers Add support for - * atomic_flag::wait/notify_one/notify_all * atomic::wait/notify_one/notify_all * counting_semaphore * binary_semaphore * latch libstdc++-v3/ChangeLog: * include/Makefile.am (bits_headers): Add new header. * include/Makefile.in:

Fix builtin decls generated in tree.c

Hi, tree.c still produces "fn spec" attribute for memcpy, memmove and memset. This is not desirable since "1" is less informative than fnspec builtin_fnspec returns. Also the buitin would fire checker, since it misses the second caracter, so probably the whole logic is unused.

Add string builtins to builtin_fnspec

Hi, this patch adds missing string builtins to builtin_fnspec. Bootstrapped/regtested x86_64-linux, OK? gcc/ChangeLog: 2020-10-26 Jan Hubicka * builtins.c (builtin_fnspec): Add bzero, memcmp, memcmp_eq, bcmp, strncmp, strncmp_eq, strncasecmp, rindex, strlen, strlnen,

[PATCH,rs6000] Add patterns for combine to support p10 fusion

From: Aaron Sawdey This patch adds the first couple patterns to support p10 fusion. These will allow combine to create a single insn for a pair of instructions that that power10 can fuse and execute. These particular ones have the requirement that only cr0 can be used when fusing a load with a

[PATCH] c++: Check constraints before instantiation from mark_used [PR95132]

This makes mark_used check constraints of a function _before_ calling maybe_instantiate_decl, so that we don't try instantiating a function (as part of return type deduction) with unsatisfied constraints. Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk and perhaps

[PATCH] c++: Check constraints only on candidate conversion functions

In the testcase below, we're overeagerly checking the constraints on the conversion function B::operator bool() as part of finding an implicit conversion sequence from B to const A&. This behavior seems to be nonconforming because according to [over.match.copy] and [over.match.conv], only those

Re: [PATCH][middle-end][i386][Version 4] Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

> On Oct 26, 2020, at 3:33 PM, Uros Bizjak wrote: > > On Mon, Oct 26, 2020 at 9:05 PM Uros Bizjak wrote: >> >> On Mon, Oct 26, 2020 at 8:10 PM Qing Zhao wrote: >>> >>> >>> On Oct 26, 2020, at 1:42 PM, Uros Bizjak wrote: On Mon, Oct 26, 2020 at 6:30 PM Qing Zhao wrote:

[PATCH, rs6000] improve vec_ctf invalid parameter handling. (pr91903)

[PATCH, rs6000] improve vec_ctf invalid parameter handling. Hi, Per PR91903, GCC ICEs when we attempt to pass a variable (or out of range value) into the vec_ctf() builtin. Per investigation, the parameter checking exists for this builtin with the int types, but was missing for the long long

[committed] libstdc++: Fix error in experimental::strand

libstdc++-v3/ChangeLog: * include/experimental/executor (strand::_State): Fix thinko. Tested powerpc64le-linux. Committed to trunk. commit b784bbbe45414084551a824504650f21cb653ca1 Author: Jonathan Wakely Date: Mon Oct 26 21:00:06 2020 libstdc++: Fix error in experimental::strand

Re: [PATCH] rs6000: Don't split constant operator add before reload, move to temp register for future optimization

On Wed, Oct 21, 2020 at 03:25:29AM -0500, Xionghu Luo wrote: > Don't split code from add3 for SDI to allow a later pass to split. This is very problematic. > This allows later logic to hoist out constant load in add instructions. Later logic should be able to do that any way (I do not say that

Re: [PATCH] libstdc++: Implement C++20 features for

On 26/10/20 13:47 -0700, Thomas Rodgers wrote: From: Thomas Rodgers New ctors and ::view() accessor for - * basic_stingbuf * basic_istringstream * basic_ostringstream * basic_stringstreamm New ::get_allocator() accessor for basic_stringbuf. libstdc++-v3/ChangeLog: * acinclude.m4

[PATCH] PR fortran/97491 - Wrong restriction for VALUE arguments of pure procedures

As found/reported by Thomas, the redefinition of dummy arguments with the VALUE attribute was erroneously rejected for pure procedures. A related purity check did not take VALUE into account and was therefore adjusted. Regtested on x86_64-pc-linux-gnu. OK for master? Thanks, Harald PR

[PATCH v3] builtins: (not just) rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

Changes since v2[1]: - Added documentation for the new optabs; - Remove use of non portable __builtin_clz; - Changed feclearexcept and feraiseexcept to accept all 4 valid flags at the same time and added more test for that case; - Extended feclearexcept and feraiseexcept testcases to

[PATCH] libstdc++: Implement C++20 features for

From: Thomas Rodgers New ctors and ::view() accessor for - * basic_stingbuf * basic_istringstream * basic_ostringstream * basic_stringstreamm New ::get_allocator() accessor for basic_stringbuf. libstdc++-v3/ChangeLog: * acinclude.m4 (glibcxx_SUBDIRS): Add src/c++20. *

Re: [RFC] Add support for the "retain" attribute utilizing SHF_GNU_RETAIN

On Mon, Oct 26, 2020 at 07:08:06PM +, Pedro Alves via Gcc-patches wrote: > On 10/6/20 12:10 PM, Jozef Lawrynowicz wrote: > > > Should "used" apply SHF_GNU_RETAIN? > > === > > Another talking point is whether the existing "used" attribute should > > apply the

Re: [RS6000] Link power10 testcases

On Thu, Oct 22, 2020 at 05:31:15PM +1030, Alan Modra wrote: > Running the assembler and linker catches more errors. > > * gcc.target/powerpc/cfuged-1.c, > * gcc.target/powerpc/cntlzdm-1.c, There should be no star on the second and next line of one entry. Okay for trunk. Thanks!

Re: [PATCH][middle-end][i386][Version 4] Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

On Mon, Oct 26, 2020 at 9:05 PM Uros Bizjak wrote: > > On Mon, Oct 26, 2020 at 8:10 PM Qing Zhao wrote: > > > > > > > > > On Oct 26, 2020, at 1:42 PM, Uros Bizjak wrote: > > > > > > On Mon, Oct 26, 2020 at 6:30 PM Qing Zhao wrote: > > >> > > >> > > >> The following is the current change in

Re: [RS6000] dimode_off.c test

On Thu, Oct 22, 2020 at 05:29:49PM +1030, Alan Modra wrote: > This tests behaviour near the limit of 16-bit signed offsets. If > power10 prefix instructions are enabled, no such testing occurs. > > * gcc.target/powerpc/dimode_off.c: Add -mno-prefixed to options. > > Regstrapped

Re: [RS6000] Non-pcrel tests when power10

Hi! On Thu, Oct 22, 2020 at 05:28:17PM +1030, Alan Modra wrote: > These tests require -mno-pcrel because they are testing features > of the non-pcrel ABI. > --- a/gcc/testsuite/gcc.target/powerpc/cprophard.c > +++ b/gcc/testsuite/gcc.target/powerpc/cprophard.c > @@ -1,6 +1,6 @@ > /* { dg-do

Re: [PATCH][middle-end][i386][Version 4] Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

On Mon, Oct 26, 2020 at 8:10 PM Qing Zhao wrote: > > > > > On Oct 26, 2020, at 1:42 PM, Uros Bizjak wrote: > > > > On Mon, Oct 26, 2020 at 6:30 PM Qing Zhao wrote: > >> > >> > >> The following is the current change in i386.c, could you check whether the > >> logic is good? > > > > x87 handling

Re: [PATCH] Re: error: ‘EVRP_MODE_DEBUG’ was not declared – was: [PUSHED] Ranger classes.

On Mon, 26 Oct 2020, Andrew MacLeod wrote: > > It is still broken at `-O0', does not build with `--enable-werror-always' > > (which IMO should be on by default except for releases, just as we do with > > binutils AFAIK, so as to make sure people do not introduce build problems > > too easily):

Re: [PATCH] rs6000, Power 10 testsuite fixes

Hi! On Fri, Oct 23, 2020 at 02:43:40PM -0700, Carl Love wrote: > The following patch fixes a few issues with the tests. The DEBUG is > defined in each of the files thus the #ifdef DEBUG should just be #if > DEBUG. The other issue is a some of the line lengths for the error > prints exceed 80

Re: [RFC] Add support for the "retain" attribute utilizing SHF_GNU_RETAIN

On 10/6/20 12:10 PM, Jozef Lawrynowicz wrote: > The changes would also only affect targets > that support the GNU ELF OSABI, which would lead to inconsistent > behavior between non-GNU OS's. Well, a separate __attribute__((retain)) will necessarily only work on GNU ELF targets, so that just

Re: [PATCH][middle-end][i386][Version 4] Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

> On Oct 26, 2020, at 1:42 PM, Uros Bizjak wrote: > > On Mon, Oct 26, 2020 at 6:30 PM Qing Zhao wrote: >> >> >> The following is the current change in i386.c, could you check whether the >> logic is good? > > x87 handling looks good to me. > > One remaining question: If the function

Re: [RFC] Add support for the "retain" attribute utilizing SHF_GNU_RETAIN

On 10/6/20 12:10 PM, Jozef Lawrynowicz wrote: > Should "used" apply SHF_GNU_RETAIN? > === > Another talking point is whether the existing "used" attribute should > apply the SHF_GNU_RETAIN flag to the containing section. > > It seems unlikely that a user applies

Re: [PATCH][middle-end][i386][Version 4] Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

Qing Zhao writes: > diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi > index c9f7299..3a884e1 100644 > --- a/gcc/doc/extend.texi > +++ b/gcc/doc/extend.texi > @@ -3992,6 +3992,49 @@ performing a link with relocatable output (i.e.@: > @code{ld -r}) on them. > A declaration to which

Re: [RS6000] biarch test fail

On Sun, Oct 25, 2020 at 09:55:32PM +1030, Alan Modra wrote: > I thought this one was worth at least commenting as to why it fails > when biarch testing. OK? > > * gcc.target/powerpc/bswap64-4.c: Comment. > > diff --git a/gcc/testsuite/gcc.target/powerpc/bswap64-4.c >

Re: [PATCH][middle-end][i386][Version 4] Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

On Mon, Oct 26, 2020 at 6:30 PM Qing Zhao wrote: > > > The following is the current change in i386.c, could you check whether the > logic is good? x87 handling looks good to me. One remaining question: If the function uses MMX regs (either internally or as an argument register), but exits in

Re: [RS6000] Remove -mpcrel from tests

On Sun, Oct 25, 2020 at 09:52:40PM +1030, Alan Modra wrote: > When running with -m32 > FAIL: gcc.target/powerpc/pr94740.c (test for excess errors) > Excess errors: > cc1: error: '-mpcrel' requires '-mcmodel=medium' > > The others don't run for -m32, but remove the unnecessary -mpcrel > anyway. >

Re: [RS6000] Unsupported test options for -m32

On Sun, Oct 25, 2020 at 09:51:29PM +1030, Alan Modra wrote: > FAIL: gcc.target/powerpc/swaps-p8-22.c (test for excess errors) > Excess errors: > cc1: error: '-mcmodel' not supported in this configuration This is because your build is not biarch. We really should not allow such configurations,

[PATCH] lto: no sub-make when --jobserver-auth= is missing

We newly correctly detect that a job server is not active for a LTO linking: lto-wrapper: warning: jobserver is not available: '--jobserver-auth=' is not present in 'MAKEFLAGS' In that situation we should not call make -f abc.mk as it can leed to N^2 LTRANS units. Ready for master? Thanks,

Re: Implement three-level optimize_for_size predicates

> On Mon, Oct 26, 2020 at 10:14 AM Jan Hubicka wrote: > > > > > > > > > > For example you had patch that limited "rep cmpsb" expansion for > > > > -minline-all-stringops. Now the conditions could be > > > > -minline-all-stringops || optimize_insn_for_size () == OPTIMIZE_SIZE_MAX > > > > since it

Re: Make default duplicate and insert methods of summaries abort; fix fallout

> > gcc/ChangeLog: > > * symbol-summary.h (function_summary_base::unregister_hooks): > Call disable_insertion_hook and disable_duplication_hook. > (function_summary_base::symtab_insertion): New field. > (function_summary_base::symtab_removal): Likewise. >

Re: Make default duplicate and insert methods of summaries abort; fix fallout

On 10/25/20 2:22 PM, Jan Hubicka wrote: Hi, the default duplicate and insert methods of sumaries produce empty summary that is not useful for anything and makes it easy to introduce bugs. This patch makes the default hooks to abort and summaries that do not need dupicaito/insertion disable the

Re: [RS6000] VSX_MM_SUFFIX

On Sun, Oct 25, 2020 at 05:16:10AM -0500, Segher Boessenkool wrote: > On Sun, Oct 25, 2020 at 11:55:39AM +1030, Alan Modra wrote: > > > If you use a macro that doesn't exist, the compiler simply does not > > > build! > > > > My empirical evidence to the contrary says your theoretical arguments >

[PATCH] Handle signed 1-bit ranges in irange::invert.

The problem here is we are trying to add 1 to a -1 in a signed 1-bit field and coming up with UNDEFINED because of the overflow. Signed 1-bits are annoying because you can't really add or subtract one, because the one is unrepresentable. For invert() we have a special subtract_one() function

Re: [PATCH 2/2] combine: Don't turn (mult (extend x) 2^n) into extract

On Mon, Oct 26, 2020 at 01:18:54PM +, Alex Coplan wrote: > - else if (GET_CODE (inner) == ASHIFT > + else if ((GET_CODE (inner) == ASHIFT || GET_CODE (inner) == MULT) As I wrote in the other mail, write this as two cases. Write something in the comment for the mult one that this is for the

Re: [PATCH 2/2] combine: Don't turn (mult (extend x) 2^n) into extract

On Mon, Oct 26, 2020 at 01:28:42PM +, Alex Coplan wrote: > On 26/10/2020 07:12, Segher Boessenkool wrote: > > On Thu, Oct 15, 2020 at 09:59:24AM +0100, Alex Coplan wrote: > > Can you instead replace the mult by a shift somewhere earlier in > > make_extract? That would make a lot more sense

Re: [PATCH V2] aarch64: Add vcopy(q)__lane(q)_bf16 intrinsics

Andrea Corallo via Gcc-patches writes: > diff --git > a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c > > b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcopy_lane_bf16_indices_1.c > new file mode 100644 > index 000..9cbb5ea8110 > --- /dev/null

Re: [PATCH][middle-end][i386][Version 4] Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

The following is the current change in i386.c, could you check whether the logic is good? thanks. Qing /* Check whether the register REGNO should be zeroed on X86. When ALL_SSE_ZEROED is true, all SSE registers have been zeroed together, no need to zero it again. When

Re: Implement three-level optimize_for_size predicates

On Mon, Oct 26, 2020 at 10:14 AM Jan Hubicka wrote: > > > > > > > For example you had patch that limited "rep cmpsb" expansion for > > > -minline-all-stringops. Now the conditions could be > > > -minline-all-stringops || optimize_insn_for_size () == OPTIMIZE_SIZE_MAX > > > since it is still

Re: Implement three-level optimize_for_size predicates

> > > > For example you had patch that limited "rep cmpsb" expansion for > > -minline-all-stringops. Now the conditions could be > > -minline-all-stringops || optimize_insn_for_size () == OPTIMIZE_SIZE_MAX > > since it is still useful size optimization. > > > > I am not sure if you had other

Re: [PATCH v2] builtins: rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Mon, Oct 26, 2020 at 01:05:00PM -0300, Raoni Fassina Firmino wrote: > On Mon, Sep 28, 2020 at 11:42:13AM -0500, will schmidt wrote: > > > +;; FE_INEXACT, FE_DIVBYZERO, FE_UNDERFLOW and FE_OVERFLOW flags. > > > +;; It doesn't handle values out of range, and always returns 0. > > > +;; Note that

Re: [PATCH][middle-end][i386][Version 4] Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

> On Oct 26, 2020, at 11:13 AM, Uros Bizjak wrote: > > On Mon, Oct 26, 2020 at 3:45 PM Qing Zhao > wrote: >> >> >> +/* Generate insns to zero all st/mm registers together. >> + Return true when zeroing instructions are generated. >> + Assume the number of

Re: [RS6000] Unsupported test options for -m32

David Edelsohn via Gcc-patches wrote: FAIL: gcc.target/powerpc/swaps-p8-22.c (test for excess errors) Excess errors: cc1: error: '-mcmodel' not supported in this configuration * gcc.target/powerpc/swaps-p8-22.c: Disable for -m32. diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-22.c

Re: [PATCH V2] aarch64: Add bfloat16 vldN_lane_bf16 + vldNq_lane_bf16 intrisics

Richard Sandiford writes: > Andrea Corallo via Gcc-patches writes: >> Hi all, >> >> Second version of the patch here implementing the bfloat16_t neon >> related load intrinsics: vld2_lane_bf16, vld2q_lane_bf16, >> vld3_lane_bf16, vld3q_lane_bf16 vld4_lane_bf16, vld4q_lane_bf16. >> >> This

Re: [PATCH][middle-end][i386][Version 4] Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

On Mon, Oct 26, 2020 at 3:45 PM Qing Zhao wrote: > > > +/* Generate insns to zero all st/mm registers together. > + Return true when zeroing instructions are generated. > + Assume the number of st registers that are zeroed is num_of_st, > + we will emit the following sequence to zero them

Re: [RS6000] Unsupported test options for -m32

FAIL: gcc.target/powerpc/swaps-p8-22.c (test for excess errors) Excess errors: cc1: error: '-mcmodel' not supported in this configuration * gcc.target/powerpc/swaps-p8-22.c: Disable for -m32. diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-22.c

Re: [PATCH v2] builtins: rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Mon, Sep 28, 2020 at 11:42:13AM -0500, will schmidt wrote: > > +/* Expand call EXP to either feclearexcept or feraiseexcept builtins (from > > C99 > > +fenv.h), returning the result and setting it in TARGET. Otherwise > > return > > +NULL_RTX on failure. */ > > +static rtx > >

[PATCH 2/x] arm: add vst1_lane_bf16 + vstq_lane_bf16 intrinsics

Hi all, Second patch of the serie here adding vst1_lane_bf16, vst1q_lane_bf16 bfloat16 related neon intrinsics. Please see refer to: ACLE ISA Regtested and bootstrapped. Okay for trunk? Andrea

[PATCH 1/x] arm: Add vld1_lane_bf16 + vldq_lane_bf16 intrinsics

Hi all, I'd like to submit the following patch implementing the bfloat16_t neon related load intrinsics: vld1_lane_bf16, vld1q_lane_bf16. Please see refer to: ACLE ISA Regtested and bootstrapped.

Re: [PATCH V2] aarch64: Add bfloat16 vldN_lane_bf16 + vldNq_lane_bf16 intrisics

Andrea Corallo via Gcc-patches writes: > Hi all, > > Second version of the patch here implementing the bfloat16_t neon > related load intrinsics: vld2_lane_bf16, vld2q_lane_bf16, > vld3_lane_bf16, vld3q_lane_bf16 vld4_lane_bf16, vld4q_lane_bf16. > > This better narrows testcases so they do not

[PATCH] Move SLP nodes to an alloc-pool

This introduces a global alloc-pool for SLP nodes to reduce overhead on SLP allocation churn which will get worse and to eventually release SLP cycles which will retain a refcount of one and thus are never freed at the moment. Bootstrap / regtest pending on x86_64-unknown-linux-gnu. 2020-10-26

Re: [PATCH v2] builtins: rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Mon, Oct 05, 2020 at 10:36:22AM -0500, Segher Boessenkool wrote: > Should this pattern not allow setting more than one exception bit at > once, btw? Turns out allowing more than one bit was no problem at all. On Mon, Oct 05, 2020 at 10:36:22AM -0500, Segher Boessenkool wrote: > On Sun, Oct

Re: [PATCH v2] builtins: (not just) rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Thu, Oct 01, 2020 at 03:08:19PM -0500, Segher Boessenkool wrote: > On Thu, Oct 01, 2020 at 08:08:01AM +0200, Richard Biener wrote: > > On Wed, 30 Sep 2020, Segher Boessenkool wrote: > > > It's going to be challenging to find a reasonable spot in there. > > > Oh well. > > > > Put it next to

Re: Extend builtin fnspecs

On Mon, 19 Oct 2020, Jan Hubicka wrote: > > > + /* True if memory reached by the argument is read. > > > + Valid only if all loads are known. */ > > > + bool > > > + arg_read_p (unsigned int i) > > > + { > > > +unsigned int idx = arg_idx (i); > > > +gcc_checking_assert

Re: Implement three-level optimize_for_size predicates

On Mon, Oct 26, 2020 at 7:36 AM Jan Hubicka wrote: > > > On Mon, Oct 26, 2020 at 7:23 AM Jan Hubicka wrote: > > > > > > Hi, > > > this patch implements thre two-state optimize_for_size predicates, so > > > with -Os > > > and with profile feedback for never executed code it returns > > >

[PATCH] Refactor SLP instance analysis

This refactors the toplevel entry to analyze an SLP instance to expose a worker analyzing from a vector of stmts and an SLP entry kind. Bootstrap & regtest running on x86_64-unknown-linux-gnu. 2020-10-26 Richard Biener * tree-vect-slp.c (enum slp_instance_kind): New.

*PING* RE: [Patch] testsuite: Avoid TCL errors when rootme or ASAN/TSAN/UBSAN is not available (was: Re: [Patch] testsuite: Avoid TCL errors when ASAN/TSAN/UBSAN is not available)

-Original Message- From: Tobias Burnus [mailto:tob...@codesourcery.com] Sent: Monday, October 19, 2020 6:03 PM To: gcc-patches ; Rainer Orth ; Mike Stump Subject: [Patch] testsuite: Avoid TCL errors when rootme or ASAN/TSAN/UBSAN is not available (was: Re: [Patch] testsuite: Avoid

Re: [PATCH][middle-end][i386][Version 4] Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-arg|used-gpr|all-gpr|used|all]

>> >> +/* Generate insns to zero all st/mm registers together. >> + Return true when zeroing instructions are generated. >> + Assume the number of st registers that are zeroed is num_of_st, >> + we will emit the following sequence to zero them together: >> + fldz; \

Re: Implement three-level optimize_for_size predicates

> On Mon, Oct 26, 2020 at 7:23 AM Jan Hubicka wrote: > > > > Hi, > > this patch implements thre two-state optimize_for_size predicates, so with > > -Os > > and with profile feedback for never executed code it returns > > OPTIMIZE_SIZE_MAX > > while in cases we decide to optimize for size based

Re: Implement three-level optimize_for_size predicates

> On 10/26/20 3:22 PM, Jan Hubicka wrote: > > Hi, > > this patch implements thre two-state optimize_for_size predicates, so with > > -Os > > and with profile feedback for never executed code it returns > > OPTIMIZE_SIZE_MAX > > while in cases we decide to optimize for size based on branch

Re: Implement three-level optimize_for_size predicates

On 10/26/20 3:22 PM, Jan Hubicka wrote: Hi, this patch implements thre two-state optimize_for_size predicates, so with -Os and with profile feedback for never executed code it returns OPTIMIZE_SIZE_MAX while in cases we decide to optimize for size based on branch prediction logic it return

Re: Implement three-level optimize_for_size predicates

On Mon, Oct 26, 2020 at 7:23 AM Jan Hubicka wrote: > > Hi, > this patch implements thre two-state optimize_for_size predicates, so with -Os > and with profile feedback for never executed code it returns OPTIMIZE_SIZE_MAX > while in cases we decide to optimize for size based on branch prediction

Re: [PATCH] nvptx: Cache stacks block for OpenMP kernel launch

On Mon, Oct 26, 2020 at 07:14:48AM -0700, Julian Brown wrote: > This patch adds caching for the stack block allocated for offloaded > OpenMP kernel launches on NVPTX. This is a performance optimisation -- > we observed an average 11% or so performance improvement with this patch > across a set of

[PATCH] Re: error: ‘EVRP_MODE_DEBUG’ was not declared – was: [PUSHED] Ranger classes.

On 10/25/20 8:37 PM, Maciej W. Rozycki wrote: On Tue, 6 Oct 2020, Andrew MacLeod via Gcc-patches wrote: Build fails here now with: gimple-range.h:168:59: error: ‘EVRP_MODE_DEBUG’ was not declared in this scope And now builds – as the "Hybrid EVRP and testcases" was pushed as well, a bit more

Implement three-level optimize_for_size predicates

Hi, this patch implements thre two-state optimize_for_size predicates, so with -Os and with profile feedback for never executed code it returns OPTIMIZE_SIZE_MAX while in cases we decide to optimize for size based on branch prediction logic it return OPTIMIZE_SIZE_BALLANCED. The idea is that for

[PATCH] nvptx: Cache stacks block for OpenMP kernel launch

Hi, This patch adds caching for the stack block allocated for offloaded OpenMP kernel launches on NVPTX. This is a performance optimisation -- we observed an average 11% or so performance improvement with this patch across a set of accelerated GPU benchmarks on one machine (results vary according

Re: [PATCH] cp/decl.c: Set DECL_INITIAL before attribute processing

On Mon, Oct 26, 2020 at 01:30:29PM +, Jozef Lawrynowicz wrote: > Attribute handlers may want to examine DECL_INITIAL for a decl, to > validate the attribute being applied. For C++, DECL_INITIAL is currently > not set until cp_finish_decl, by which time attribute validation has > already been

[PATCH] cp/decl.c: Set DECL_INITIAL before attribute processing

Attribute handlers may want to examine DECL_INITIAL for a decl, to validate the attribute being applied. For C++, DECL_INITIAL is currently not set until cp_finish_decl, by which time attribute validation has already been performed. For msp430-elf this causes the "persistent" attribute to always

Re: [PATCH 2/2] combine: Don't turn (mult (extend x) 2^n) into extract

On 26/10/2020 07:12, Segher Boessenkool wrote: > Hi! > > On Thu, Oct 15, 2020 at 09:59:24AM +0100, Alex Coplan wrote: > > @@ -7650,20 +7650,27 @@ make_extraction (machine_mode mode, rtx inner, > > HOST_WIDE_INT pos, > > is_mode = GET_MODE (SUBREG_REG (inner)); > >inner = SUBREG_REG

Re: [PATCH 2/2] combine: Don't turn (mult (extend x) 2^n) into extract

On 26/10/2020 06:51, Segher Boessenkool wrote: > On Mon, Oct 26, 2020 at 11:06:22AM +, Alex Coplan wrote: > > Well, only the low 32 bits of the subreg are valid. But because those > > low 32 bits are shifted left 2 times, the low 34 bits of the ashift are > > valid: the bottom 2 bits of the

Fix simdclones pass

Hi, this patch makes cleaning of stmt pointers in references more robust so late IPA passes do not break. Bootstrapped/regtested x86_64-linux, comitted. Honza gcc/ChangeLog: 2020-10-26 Jan Hubicka PR ipa/97576 * cgraphclones.c (cgraph_node::materialize_clone): Clear stmt

Re: [PATCH PR94442] [AArch64] Redundant ldp/stp instructions emitted at -O3

xiezhiheng writes: >> -Original Message- >> From: Richard Sandiford [mailto:richard.sandif...@arm.com] >> Sent: Wednesday, October 21, 2020 12:54 AM >> To: xiezhiheng >> Cc: Richard Biener ; gcc-patches@gcc.gnu.org >> Subject: Re: [PATCH PR94442] [AArch64] Redundant ldp/stp instructions

Re: [PATCH]AArch64 Fix overflow in memcopy expansion on aarch64.

Tamar Christina writes: > Hi Richard, > > The 10/26/2020 11:29, Richard Sandiford wrote: >> Tamar Christina writes: >> >/* We can't do anything smart if the amount to copy is not constant. */ >> >if (!CONST_INT_P (operands[2])) >> > return false; >> > >> > - n = INTVAL

[committed] libstdc++: Fix declarations of memalign etc. for freestanding [PR 97570]

libstdc++-v3/ChangeLog: PR libstdc++/97570 * libsupc++/new_opa.cc: Declare size_t in global namespace. Remove unused header. Tested x86_64-linux. Successfully built for avr cross (with avr-libc 2.0). Committed to trunk. commit 93e9a7bcd5434a24c945de33cd7fa01a25f68418

Re: [RS6000] Tests that use int128_t and -m32

On Mon, Oct 26, 2020 at 10:34:20PM +1030, Alan Modra wrote: > On Sun, Oct 25, 2020 at 10:43:12AM -0400, David Edelsohn wrote: > > Another problem with all of the vsx_mask test cases is that they use > > -mcpu=power10 instead of -mdejagnu-cpu=power10. Can you follow up > > with that fix or do you

Re: [RS6000] Tests that use int128_t and -m32

Hi Alan, On Sun, Oct 25, 2020 at 09:50:01PM +1030, Alan Modra wrote: > All these tests fail with -m32 due to lack of int128 support, Is there any good reason __int128 is not enabled for rs6000 -m32, btw? > in some > cases with what I thought was not the best error message. For example >

Re: [PATCH] g++, libstdc++: implement __is_nothrow_{constructible, assignable}

On 24/10/20 02:32 +0300, Ville Voutilainen via Libstdc++ wrote: @@ -1118,15 +1080,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION }; template -struct __is_nt_assignable_impl -: public integral_constant() = declval<_Up>())> -{ }; - - template -struct __is_nothrow_assignable_impl -

Re: [PATCH 2/2] combine: Don't turn (mult (extend x) 2^n) into extract

Hi! On Thu, Oct 15, 2020 at 09:59:24AM +0100, Alex Coplan wrote: > @@ -7650,20 +7650,27 @@ make_extraction (machine_mode mode, rtx inner, > HOST_WIDE_INT pos, > is_mode = GET_MODE (SUBREG_REG (inner)); >inner = SUBREG_REG (inner); > } > + else if ((GET_CODE (inner) == ASHIFT

Re: [RS6000] Tests that use int128_t and -m32

On Sun, Oct 25, 2020 at 10:43:12AM -0400, David Edelsohn wrote: > On Sun, Oct 25, 2020 at 7:20 AM Alan Modra wrote: > > > > All these tests fail with -m32 due to lack of int128 support, in some > > cases with what I thought was not the best error message. For example > >

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