On Tue, Jun 8, 2021 at 7:59 PM H.J. Lu wrote:
>
> 1. Update vec_duplicate to allow to fail so that backend can only allow
> broadcasting an integer constant to a vector when broadcast instruction
> is available. This can be used by memset expander to avoid vec_duplicate
> when loading from consta
The patch improves JSON examples so that they are a valid JSON.
That will help us with syntax highlighting in Sphinx-generated
documentation.
Pushed to master.
Martin
gcc/ChangeLog:
* doc/gcov.texi: Create a proper JSON files.
* doc/invoke.texi: Remove dots in order to make it a
Hi,
PR100328 has some details about this issue, I am trying to
brief it here. In the hottest function LBM_performStreamCollideTRT
of SPEC2017 bmk 519.lbm_r, there are many FMA style expressions
(27 FMA, 19 FMS, 11 FNMA). On rs6000, this kind of FMA style
insn has two flavors: FLOAT_REG and VSX_R
On 2021/6/9 04:11, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Jun 04, 2021 at 09:40:58AM +0800, Xionghu Luo wrote:
Combine still fail to merge the two instructions:
Trying 6 -> 7:
6: r120:KF#0=r125:KF#0<-<0x40
REG_DEAD r125:KF
7: [sfp:DI+r123:D
On 2021/6/9 05:07, Segher Boessenkool wrote:
> Hi!
>
> On Tue, Jun 08, 2021 at 09:11:33AM +0800, Xionghu Luo wrote:
>> On P8LE, extra rot64+rot64 load or store instructions are generated
>> in float128 to vector __int128 conversion.
>>
>> This patch teaches pass swaps to also handle such patten
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-December/562015.html
BR,
Kewen
on 2021/5/26 上午11:04, Kewen.Lin via Gcc-patches wrote:
> Hi,
>
> Gentle ping this:
>
> https://gcc.gnu.org/pipermail/gcc-patches/2020-December/562015.html
>
> BR,
> Kewen
>
> on 2021/5/7 上午10
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-May/569792.html
BR,
Kewen
on 2021/5/26 上午11:02, Kewen.Lin via Gcc-patches wrote:
> Hi,
>
> Gentle ping this:
>
> https://gcc.gnu.org/pipermail/gcc-patches/2021-May/569792.html
>
>
> BR,
> Kewen
>
> on 2021/5/7 上午10:30
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-May/571258.html
BR,
Kewen
on 2021/5/26 上午10:59, Kewen.Lin via Gcc-patches wrote:
> Hi,
>
> This is the updated version of patch to deal with the bwaves_r
> degradation due to vector construction fed by strided loads.
>
> As
From: Andrew Pinski
While debugging PR 100925, I found that the gimple verifiers
don't reject NEGATE on pointer or offset type.
This patch adds the check on some unary and binary gimple which
should not have operated on pointer/offset types.
OK? Bootstrapped and tested on x86_64-linux-gnu with n
From: Andrew Pinski
The problem here is with offset (and pointer) types is we produce
a negative expression when this optimization hits.
It is easier to disable this optimization for all non-integeral types
instead of finding an integer type which is the same precission as the
type to do the nega
I recently introduced the fur_source class as an intermediary between
the Fold_Using_Ranges (FUR) class and where to pick up any ssa_names
that it needs. The initial idea was to abstract out a set of
frequently changing parameters so the client fold routines wouldn't have
to change every tim
Hello,
This makes things a good bit shorter, and reduces complexity by removing
a bunch of index variables.
bootstrapped and regtested on x86_64-linux-gnu, ok?
Trev
gcc/analyzer/ChangeLog:
* call-string.cc (call_string::call_string): Iterate over vec<>
with range based for.
Before my r277864, build_new_op promoted enums to int before passing them on
to cp_build_binary_op; after that commit, it doesn't, so
warn_for_sign_compare sees the enum operands and gives a redundant warning.
This warning dates back to 1995, and seems to have been dead code for a long
time--likely
We weren't passing 'flags' to the recursive call to cp_parser_declarator
in the ptr-operator case and as an effect, delayed parsing of noexcept
didn't work as advertised. The following change passes more than just
CP_PARSER_FLAGS_DELAY_NOEXCEPT but that doesn't seem to break anything.
I'm not pas
[PATCH 3/3] Add IEEE 128-bit fp conditional move on PowerPC.
This patch adds the support for power10 IEEE 128-bit floating point conditional
move and for automatically generating min/max.
In this patch, I simplified things compared to previous patches. Instead of
allowing any four of the modes t
[PATCH 2/3] Fix IEEE 128-bit min/max test.
This patch fixes the float128-minmax.c test so that it can accommodate the
generation of xsmincqp and xsmaxcqp instructions on power10. I changed
the effective target from 'float128' to 'ppc_float128_hw', since this
needs the IEEE 128-bit float hardware
[PATCH 1/3] Add IEEE 128-bit min/max support on PowerPC.
This patch adds the support for the IEEE 128-bit floating point C minimum and
maximum instructions. The next patch will add the support for using the
compare and set mask instruction to implement conditional moves.
This patch does not try
This is a revision of the patches I sent on May 18th.
I tested it on 3 platforms:
* Power9 little endian, --with-code=power9;
* Power8 big endian, --with-code=power8, both 32/64-bit tests done;
* Power10 little endian, --with-code=power10.
All systems bootstrapped and there wer
On Mon, Jun 07, 2021 at 05:31:50PM -0500, Segher Boessenkool wrote:
> On Tue, May 18, 2021 at 04:28:27PM -0400, Michael Meissner wrote:
> > In this patch, I simplified things compared to previous patches. Instead of
> > allowing any four of the modes to be used for the conditional move
> > compar
On Mon, Jun 07, 2021 at 03:25:06PM -0500, Segher Boessenkool wrote:
> On Tue, May 18, 2021 at 04:26:06PM -0400, Michael Meissner wrote:
> > This patch adds the support for the IEEE 128-bit floating point C minimum
> > and
> > maximum instructions.
>
> > gcc/
> > 2021-05-18 Michael Meissner
> >
On Mon, May 24, 2021 at 04:02:13AM -0500, Xionghu Luo wrote:
> vmrghb only accepts permute index {0, 16, 1, 17, 2, 18, 3, 19, 4, 20,
> 5, 21, 6, 22, 7, 23} no matter for BE or LE in ISA, similarly for vmrghlb.
(vmrglb)
> + if (BYTES_BIG_ENDIAN)
> +emit_insn (
> + gen_altivec_vmrghb_dire
DT_INIT_ARRAY/DT_FINI_ARRAY support was added to glibc by
commit fcf70d4114db9ff7923f5dfeb3fea6e2d623e5c2
Author: Ulrich Drepper
Date: Sat Jul 24 19:45:13 1999 +
Update.
1999-07-24 Ulrich Drepper
* elf/dl-fini.c: Handle DT_FINI_ARRAY.
* elf/link.h (stru
Tested x86_64-pc-linux-gnu, committed to master, backported to
releases/gcc-11.
On Fri, Jun 4, 2021 at 1:30 PM Jonathan Wakely wrote:
>
>
> On Fri, 4 Jun 2021 at 20:54, Thomas Rodgers wrote:
>
>> This is a remnant of poorly executed refactoring.
>>
>
> OK for trunk and gcc-11, thanks.
>
>
>
>> l
Tested x86_64-pc-linux-gnu, committed to master, backported to
releases/gcc-11.
On Tue, Jun 8, 2021 at 8:44 AM Jonathan Wakely wrote:
> On Tue, 8 Jun 2021 at 01:29, Thomas Rodgers wrote:
>
>> This time without the repeatred [PR] in the subject line.
>>
>> Fixes libstdc++/100889
>>
>
> This s
From: Andrew Pinski
This improves match_simplify_replace in phi-opt to handle the
case where there is one cheap (non-call) preparation statement in the
middle basic block similar to xor_replacement and others.
This allows to remove xor_replacement which it does too.
OK? Bootstrapped and tested
The problem in this PR is that we call VPSEL with a mask of vector
type instead of HImode. This happens because operand 3 in vcond_mask
is the pre-computed vector comparison and has vector type. The fix is
to transfer this value to VPR.P0 by comparing operand 3 with a vector
of constant 1 of the sa
This patch fixes a problem in arm_expand_vcond() where the result
would be a vector of 0 or 1 instead of operand 1 or 2. The
mve-vcmp-f32-2.c testcase is an update from mve-vcmp-f32.c using a
conditional with 2.0f and 3.0f constants to help scan-assembler-times.
2021-06-09 Christophe Lyon
On 6/7/21 8:06 PM, Marek Polacek wrote:
When we have explicit() with a value-dependent argument, we can't
evaluate it at parsing time, so cp_parser_function_specifier_opt stashes
the argument into the decl-specifiers and grokdeclarator then stores it
into explicit_specifier_map, which is then use
On Tue, Jun 8, 2021 at 5:05 PM Bernd Edlinger
wrote:
> On 6/8/21 3:54 PM, Jason Merrill wrote:
> >
> > This breaks bootstrap2.
> >
> > Jason
> >
>
>
> Sorry for the breakage,
>
> I've committed the following as obvious after
> confirming that it fixes bootstrap2:
>
Thanks.
Jason
Hi!
On Tue, Jun 08, 2021 at 09:11:33AM +0800, Xionghu Luo wrote:
> On P8LE, extra rot64+rot64 load or store instructions are generated
> in float128 to vector __int128 conversion.
>
> This patch teaches pass swaps to also handle such pattens to remove
> extra swap instructions.
> +/* Return 1 if
On 6/8/21 3:54 PM, Jason Merrill wrote:
>
> This breaks bootstrap2.
>
> Jason
>
Sorry for the breakage,
I've committed the following as obvious after
confirming that it fixes bootstrap2:
Subject: [PATCH] Fix bootstrap2 breakage due to re-use of obj-c checksum
gcc/objc:
2021-06-08 Bernd Edl
On 6/7/21 12:48 PM, Bill Schmidt wrote:
On 6/7/21 12:45 PM, Richard Biener wrote:
On Mon, Jun 7, 2021 at 5:38 PM Bill Schmidt
wrote:
On 6/7/21 8:36 AM, Richard Biener wrote:
Some maybe obvious issue - what about DOS-style path hosts?
You seem to build ../ strings to point to parent dirs... I'
Hi!
On Fri, Jun 04, 2021 at 09:40:58AM +0800, Xionghu Luo wrote:
> >> Combine still fail to merge the two instructions:
> >>
> >> Trying 6 -> 7:
> >> 6: r120:KF#0=r125:KF#0<-<0x40
> >>REG_DEAD r125:KF
> >> 7: [sfp:DI+r123:DI]=r120:KF#0<-<0x40
> >>REG_DEAD r120:KF
> >> Suc
Copy the test for _mm_minpos_epu16 from
gcc/testsuite/gcc.target/i386/sse4_1-phminposuw.c, with
a few adjustments:
- Adjust the dejagnu directives for powerpc platform.
- Make the data not be monotonically increasing,
such that some of the returned values are not
always the first value (index
Add a naive implementation of the subject x86 intrinsic to
ease porting.
2021-06-08 Paul A. Clarke
gcc/ChangeLog:
* config/rs6000/smmintrin.h (_mm_minpos_epu16): New.
---
gcc/config/rs6000/smmintrin.h | 25 +
1 file changed, 25 insertions(+)
diff --git a/gcc/c
Added compatible implementation of _mm_minpos_epu16 for powerpc.
Copied, improved, and fixed testcase from i386.
Tested on BE, LE (32 and 64bit).
Paul A. Clarke (2):
rs6000: Add support for _mm_minpos_epu16
rs6000: Add test for _mm_minpos_epu16
gcc/config/rs6000/smmintrin.h |
Here's a three line patch to implement constant folding for fmod,
fmodf and fmodl, which resolves an enhancement request from 2012.
The following patch has been tested on x86_64-pc-linux-gnu with
a make bootstrap and make -k check with no new failures.
Ok for mainline?
2020-06-08 Roger Sayle
This patch verifies the previous fix for bitfield sizes by implementing
enough support for bitfields in the analyzer to get the test cases to pass.
The patch implements support in the analyzer for reading from a
BIT_FIELD_REF, and support for folding BIT_AND_EXPR of a mask, to handle
the cases gen
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as c957d38044d7eb6a45f57a8a9f707c3c0a798e9f.
gcc/analyzer/ChangeLog:
* analyzer.h (int_size_in_bits): New decl.
* region.cc (int_size_in_bits): New function.
(region::get_bit_size): Reimplement i
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as 6b400aef1bdc84bbdf5011caff3fe5f82c68d253.
gcc/analyzer/ChangeLog:
* store.cc (concrete_binding::dump_to_pp): Move bulk of
implementation to...
(bit_range::dump_to_pp): ...this new function.
Delete an overzealous copy&paste.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as 8c5a5404cb68e5e39e296849944019b93a591646.
gcc/analyzer/ChangeLog:
* svalue.h (conjured_svalue::iterator_t): Delete.
Signed-off-by: David Malcolm
---
gcc/analyzer/svalue.h
2021-03-24 Bill Schmidt
gcc/testsuite/
* gcc.target/powerpc/bfp/scalar-extract-exp-2.c: Adjust.
* gcc.target/powerpc/bfp/scalar-extract-sig-2.c: Adjust.
* gcc.target/powerpc/bfp/scalar-insert-exp-2.c: Adjust.
* gcc.target/powerpc/bfp/scalar-insert-exp-5.c: Adjust
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_init_file):
Initialize new_builtins_are_live to 1.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/altivec.h: Delete a number of #defines that are
now superfluous; include rs6000-vecdefines.h; include some
synonyms.
---
gcc/config/rs6000/altivec.h | 516 +++-
1 file changed, 41 insertions(+)
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_debug_type): New function.
(def_builtin): Change debug formatting for easier parsing and
include more information.
(rs6000_init_builtins): Add dump of autogenerated builtins.
(altivec_init
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000.c (rs6000_builtin_reciprocal): Use
rs6000_builtin_decls_x when appropriate.
(add_condition_to_bb): Likewise.
(rs6000_atomic_assign_expand_fenv): Likewise.
---
gcc/config/rs6000/rs6000.c | 19 ---
This is another patch that looks bigger than it really is. Because we
have a new namespace for the builtins, allowing us to have both the old
and new builtin infrastructure supported at once, we need versions of
these functions that use the new builtin namespace. Otherwise the code is
unchanged.
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (new_htm_spr_num): New function.
(new_htm_expand_builtin): Implement.
(rs6000_expand_new_builtin): Handle 32-bit and endian cases.
---
gcc/config/rs6000/rs6000-call.c | 202
1 fi
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_new_builtin_decl): New
function.
(rs6000_builtin_decl): Call it.
---
gcc/config/rs6000/rs6000-call.c | 20
1 file changed, 20 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-cal
2021-03-25 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (new_mma_expand_builtin):
Implement.
---
gcc/config/rs6000/rs6000-call.c | 92 +
1 file changed, 92 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (elemrev_icode): Implement.
(ldv_expand_builtin): Likewise.
(lxvrse_expand_builtin): Likewise.
(lxvrze_expand_builtin): Likewise.
(stv_expand_builtin): Likewise.
---
gcc/config/rs6000/rs6000-call
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (new_cpu_expand_builtin):
Implement.
---
gcc/config/rs6000/rs6000-call.c | 100
1 file changed, 100 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_invalid_new_builtin):
Implement.
(rs6000_expand_ldst_mask): Likewise.
(rs6000_init_builtins): Initialize altivec_builtin_mask_for_load.
---
gcc/config/rs6000/rs6000-call.c | 101 +
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_expand_new_builtin): New
forward decl.
(rs6000_invalid_new_builtin): New stub function.
(rs6000_expand_builtin): Call rs6000_expand_new_builtin.
(rs6000_expand_ldst_mask): New stub functio
2021-03-05 Bill Schmidt
gcc/
* config/rs6000/rs6000.c (rs6000-builtins.h): New include.
(rs6000_new_builtin_vectorized_function): New function.
(rs6000_new_builtin_md_vectorized_function): Likewise.
(rs6000_builtin_vectorized_function): Call
rs6000_new_bu
Although this patch looks quite large, the changes are fairly minimal.
Most of it is duplicating the large function that does the overload
resolution using the automatically generated data structures instead of
the old hand-generated ones. This doesn't make the patch terribly easy to
review, unfor
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Remove
TARGET_EXTRA_BUILTINS guard.
---
gcc/config/rs6000/rs6000-call.c | 51 -
1 file changed, 24 insertions(+), 27 deletions(-)
diff --git a/gcc/config/rs6000/r
It seems quite strange for these to be "vector long" for 64-bit and
"vector long long" for 32-bit, when "vector long long" will do for both.
2021-03-04 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Change
initialization of V2DI_type_node and unsigned_V
2021-03-04 Bill Schmidt
gcc/
* config/rs6000/darwin.h (SUBTARGET_INIT_BUILTINS): Use the new
decl when new_builtins_are_live.
* config/rs6000/rs6000-builtin-new.def (__builtin_cfstring): New
built-in.
---
gcc/config/rs6000/darwin.h | 8 ++--
gc
2021-03-04 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000-builtins.h): New #include.
(rs6000_init_builtins): Call rs6000_autoinit_builtins; skip the old
initialization logic when new builtins are enabled.
---
gcc/config/rs6000/rs6000-call.c | 12
1
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add cell stanza.
---
gcc/config/rs6000/rs6000-builtin-new.def | 27
1 file changed, 27 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/config/rs6000/rs6000-builtin-
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add ieee128-hw, dfp,
crypto, and htm stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 215 +++
1 file changed, 215 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.de
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add mma stanza.
---
gcc/config/rs6000/rs6000-builtin-new.def | 404 +++
1 file changed, 404 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/config/rs6000/rs6000-builtin-
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add power10 and power10-64
stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 427 +++
1 file changed, 427 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/c
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Initialize
various pointer type nodes.
* config/rs6000/rs6000.h (rs6000_builtin_type_index): Add enum
values for various pointer types.
(ptr_V16QI_type_node): New macro.
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add power8-vector stanza.
---
gcc/config/rs6000/rs6000-builtin-new.def | 438 +++
1 file changed, 438 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/config/rs6000/rs600
2021-04-01 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add power9-vector, power9,
and power9-64 stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 360 +++
1 file changed, 360 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-ne
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add power7 and power7-64
stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 39
1 file changed, 39 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/conf
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add always, power5, and
power6 stanzas.
---
gcc/config/rs6000/rs6000-builtin-new.def | 72
1 file changed, 72 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gc
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Add vsx stanza.
---
gcc/config/rs6000/rs6000-builtin-new.def | 857 +++
1 file changed, 857 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def
b/gcc/config/rs6000/rs6000-builtin-
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: Finish altivec stanza.
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Move
initialization of pcvoid_type_node here...
(altivec_init_builtins): ...from here.
* config/rs6000/rs6000
2021-06-07 Bill Schmidt
gcc/
* config.gcc (target_gtfiles): Add ./rs6000-builtins.h.
* config/rs6000/t-rs6000 (EXTRA_GTYPE_DEPS): Set.
---
gcc/config.gcc | 1 +
gcc/config/rs6000/t-rs6000 | 1 +
2 files changed, 2 insertions(+)
diff --git a/gcc/config.gcc b/gcc/con
2021-06-07 Bill Schmidt
gcc/
* config.gcc (extra_objs): Include rs6000-builtins.o and
rs6000-c.o.
* config/rs6000/t-rs6000 (rs6000-gen-builtins.o): New target.
(rbtree.o): Likewise.
(rs6000-gen-builtins): Likewise.
(rs6000-builtins.c): Likewise.
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_ovld_static_init): New
function.
(write_init_file): Call write_ovld_static_init.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 53 +
1 file changed, 53 insertions(+)
diff
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_bif_static_init): New
function.
(write_init_file): Call write_bif_static_init.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 106
1 file changed, 106 insertions(+)
diff -
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (typemap): New struct.
(TYPE_MAP_SIZE): New macro.
(type_map): New initialized variable.
(map_token_to_type_node): New function.
(write_type_node): Likewise.
(write_fntype_init): I
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_init_bif_table):
Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 81 +
1 file changed, 81 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
b/gcc/config
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_fntype): New
callback function.
(write_fntype_init): New stub function.
(write_init_bif_table): Likewise.
(write_init_ovld_table): New function.
(write_init_file): Implement
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c
(write_autogenerated_header): New function.
(write_decls): Likewise.
(write_extern_fntype): New callback function.
(write_header_file): Implement.
---
gcc/config/rs6000/rs6000-gen-builtin
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_defines_file):
Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
b/gcc/config/rs6000/rs
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (complete_vector_type): New
function.
(complete_base_type): Likewise.
(construct_fntype_id): Likewise.
(parse_bif_entry): Call contruct_fntype_id.
(parse_ovld_entry): Likewise.
---
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (ovld_stanza): New struct.
(MAXOVLDSTANZAS): New macro.
(ovld_stanzas): New variable.
(curr_ovld_stanza): Likewise.
(MAXOVLDS): New macro.
(ovlddata): New struct.
(ovlds):
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (parse_bif_attrs):
Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 102
1 file changed, 102 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
b/gcc/config/rs6
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (parse_args): New function.
(parse_prototype): Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 142
1 file changed, 142 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (bif_stanza): New enum.
(curr_bif_stanza): New variable.
(stanza_entry): New struct.
(stanza_map): New initialized variable.
(enable_string): Likewise.
(fnkinds): New enum.
2021-06-08 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (rbtree.h): New #include.
(num_bifs): New variable.
(num_ovld_stanzas): Likewise.
(num_ovlds): Likewise.
(parse_codes): New enum.
(bif_rbt): New variable.
(ovld_rbt): Likew
This patch adds a tiny subset of the built-in and overload descriptions.
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: New.
* config/rs6000/rs6000-overload.def: New.
---
gcc/config/rs6000/rs6000-builtin-new.def | 199 +++
gcc/config/r
2021-06-08 Bill Schmidt
gcc/
* config/rs6000/rbtree.c: New file.
* config/rs6000/rbtree.h: New file.
---
gcc/config/rs6000/rbtree.c | 242 +
gcc/config/rs6000/rbtree.h | 52
2 files changed, 294 insertions(+)
create mode 100644 gcc
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (restriction): New enum.
(typeinfo): Add restr field.
(match_bracketed_pair): New function.
(match_const_restriction): Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 115 +++
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (match_basetype): Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 64 +
1 file changed, 64 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
b/gcc/config/rs6000/rs6000
Currently gengtype supports scanning target-specific files for GC roots,
but those files must exist in the source tree. This patch extends the
support to include header files generated into the build directory. It
also allows targets to specify build dependencies for s-gtype to ensure
the built h
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (void_status): New enum.
(basetype): Likewise.
(typeinfo): Likewise.
(handle_pointer): New function.
(match_basetype): New stub function.
(match_const_restriction): Likewise.
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (consume_whitespace): New
function.
(advance_line): Likewise.
(safe_inc_pos): Likewise.
(match_identifier): Likewise.
(match_integer): Likewise.
(match_to_right_bracket): L
2021-06-07 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (bif_file): New variable.
(ovld_file): Likewise.
(header_file): Likewise.
(init_file): Likewise.
(defines_file): Likewise.
(pgm_path): Likewise.
(bif_path): Likewise.
Original patch series here:
https://gcc.gnu.org/pipermail/gcc-patches/2021-April/568840.html
Segher and others, thanks for reviewing the first chunk of patches
from this series! Some of the stylistic changes turn out to affect
many of the remaining patches, so in addition to addressing the
review
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c: New.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 165
1 file changed, 165 insertions(+)
create mode 100644 gcc/config/rs6000/rs6000-gen-builtins.c
diff --git a/gcc/config/rs6000/rs6000-gen-
> On Jun 8, 2021, at 11:59 AM, Kees Cook wrote:
>
> On Tue, Jun 08, 2021 at 09:41:38AM +0200, Richard Biener wrote:
>> On Mon, 7 Jun 2021, Qing Zhao wrote:
>>>
>>> Personally, I am okay with splitting padding initialization from this
>>> current patch,
>>> Kees, what’s your opinion on this? i
1. Update move expanders to convert the CONST_WIDE_INT and CONST_VECTO
operands to vector broadcast from an integer with AVX2.
2. Add ix86_gen_scratch_sse_rtx to return a scratch SSE register which
won't increase stack alignment requirement and blocks transformation by
the combine pass.
3. Update P
1. Update move expanders to convert the CONST_WIDE_INT and CONST_VECTO
operands to vector broadcast from an integer with AVX2.
2. Add ix86_gen_scratch_sse_rtx to return a scratch SSE register which
won't increase stack alignment requirement and blocks transformation by
the combine pass.
3. Update P
1. Update vec_duplicate to allow to fail so that backend can only allow
broadcasting an integer constant to a vector when broadcast instruction
is available. This can be used by memset expander to avoid vec_duplicate
when loading from constant pool is more efficient.
2. Add vec_duplicate expander
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