[PATCH v4] libgo: Don't use pt_regs member in mcontext_t

From: Sören Tempel The .regs member is primarily intended to be used in conjunction with ptrace. Since this code is not using ptrace, using .regs is a bad idea. Furthermore, the code currently fails to compile on musl since the pt_regs type (used by .regs) is in an incomplete type which has to

[PATCH] middle-end/104854: Limit strncmp overread warnings

The size argument in strncmp only describe the maximum length to which to compare two strings and is not an indication of sizes of the two source strings. Do not warn if it is larger than the two input strings because it is entirely likely that the size argument is a conservative maximum to

Re: [PATCH] Check if loading const from mem is faster

Hi! Richard Biener writes: > On Thu, 10 Mar 2022, Jiufu Guo wrote: > >> >> Hi! >> >> Richard Biener writes: >> >> > On Wed, 9 Mar 2022, Jiufu Guo wrote: >> > >> >> >> >> Hi! >> >> >> >> Richard Biener writes: >> >> >> >> > On Tue, 8 Mar 2022, Jiufu Guo wrote: >> >> > >> >> >> Jiufu

[PATCH] Fix DImode to TImode sign extend issue, PR target/104868

Fix DImode to TImode sign extend issue, PR target/104898 PR target/104868 had had an issue where my code that updated the DImode to TImode sign extension for power10 failed. In looking at the failure message, the reason is when extendditi2 tries to split the insn, it generates an insn that does

[r12-7607 Regression] FAIL: g++.dg/other/pr84964.C -std=c++98 (test for warnings, line 6) on Linux/x86_64

On Linux/x86_64, a717376e99fb33ba3b06bd8122e884f4b63a60c9 is the first bad commit commit a717376e99fb33ba3b06bd8122e884f4b63a60c9 Author: Roger Sayle Date: Thu Mar 10 23:49:15 2022 + PR c++/84964: Middle-end patch to expand_call for ICE after sorry. caused FAIL:

Re: [PATCH] tree-optimization/102943 - avoid (re-)computing dominance bitmap

On 3/10/2022 4:50 AM, Richard Biener via Gcc-patches wrote: Currently back_propagate_equivalences tries to optimize dominance queries in a smart way but it fails to notice that when fast indexes are available the dominance query is fast (when called from DOM). It also re-computes the

[PATCH 2/2] Enable libsanitizer build on mips64

Bootstrapped and regtested on mips64el-linux-gnuabi64. bootstrap-ubsan revealed 3 bugs (PR 104842, 104843, 104851). bootstrap-asan did not reveal any new bug. gcc/ * config/mips/mips.h (SUBTARGET_SHADOW_OFFSET): Define. * config/mips/mips.cc (mips_option_override): Make

[PATCH 1/2] libsanitizer: cherry-pick db7bca28638e from upstream

libsanitizer/ * sanitizer_common/sanitizer_atomic_clang.h: Ensures to only include sanitizer_atomic_clang_mips.h for O32. --- libsanitizer/sanitizer_common/sanitizer_atomic_clang.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [PATCH RFC] mips: add TARGET_ZERO_CALL_USED_REGS hook [PR104817, PR104820]

On Thu, 2022-03-10 at 20:31 +, Qing Zhao wrote: > > > +  SET_HARD_REG_BIT (zeroed_hardregs, HI_REGNUM); > > > +  if (TEST_HARD_REG_BIT (need_zeroed_hardregs, LO_REGNUM)) > > > +   SET_HARD_REG_BIT (zeroed_hardregs, LO_REGNUM); > > > +  else > > > +   emit_clobber

[committed] libstdc++: Do not use fast_float for 16-bit size_t [PR104870]

Tested x86_64-linux and built on msp430-elf, pushed to trunk. -- >8 -- The preprocessor condition for using fast_float should match the one in the header, and require at least 32-bit size_t. libstdc++-v3/ChangeLog: PR libstdc++/104870 * src/c++17/floating_from_chars.cc: Check

[PATCH] PR middle-end/98420: Don't fold x - x to 0.0 with -frounding-math

This patch addresses PR middle-end/98420, which is inappropriate constant folding of x - x to 0.0 (in match.pd) when -frounding-math is specified. Specifically, x - x may be -0.0 with FE_DOWNWARD as the rounding mode. To summarize, the desired IEEE behaviour, x - x for floating point x, (1)

[PATCH v2] RISCV: Add support for inlining subword atomics

RISC-V has no support for subword atomic operations; code currently generates libatomic library calls. This patch changes the default behavior to inline subword atomic calls (using the same logic as the existing library call). Behavior can be specified using the -minline-atomics and

Re: [PATCH] c++: ICE with template code in constexpr [PR104284]

On Thu, Mar 10, 2022 at 05:04:59PM -0500, Marek Polacek via Gcc-patches wrote: > Since r9-6073 cxx_eval_store_expression preevaluates the value to > be stored, and that revealed a crash where a template code (here, > code=IMPLICIT_CONV_EXPR) leaks into cxx_eval*. > > It happens because we're

[PATCH] c++: ICE with template code in constexpr [PR104284]

Since r9-6073 cxx_eval_store_expression preevaluates the value to be stored, and that revealed a crash where a template code (here, code=IMPLICIT_CONV_EXPR) leaks into cxx_eval*. It happens because we're performing build_vec_init while processing a template, which calls get_temp_regvar which

[committed] analyzer: fix ICE with -fanalyzer-transitivity [PR104863]

Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r12-7605-gd016dd7dbb8140f03cde7e2179ebaf9ec3e9d2f1. gcc/analyzer/ChangeLog: PR analyzer/104863 * constraint-manager.cc (constraint_manager::add_constraint): Refresh the EC IDs when adding

[committed] [PR103074] LRA: Check new conflicts when splitting hard reg live range

The following patch solves https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103074 The patch was successfully bootstrapped and tested on x86-64 and aarch64. commit d8e5fff6b74b82c2ac3254be9a1f0fb6b30dbdbf Author: Vladimir N. Makarov Date: Thu Mar 10 16:16:00 2022 -0500 [PR103074] LRA:

[committed] libstdc++: Move closing brace outside #endif [PR104866]

From: Detlef Vollmann Tested x86_64-linux, pushed to trunk. -- >8-- Author: Detlef Vollmann libstdc++-v3/ChangeLog: PR libstdc++/104866 * include/bits/this_thread_sleep.h: Fix order of #endif and closing brace of namespace. ---

Re: [PATCH] c++: return-type-req in constraint using only outer tparms [PR104527]

On Thu, 10 Mar 2022, Jason Merrill wrote: > On 2/16/22 15:56, Patrick Palka wrote: > > On Tue, 15 Feb 2022, Jason Merrill wrote: > > > > > On 2/14/22 11:32, Patrick Palka wrote: > > > > Here the template context for the atomic constraint has two levels of > > > > template arguments, but since

Re: [PATCH, V2] Eliminate power8 fusion options, use power8 tuning, PR target/102059

On Thu, Mar 10, 2022 at 01:49:36PM -0600, Segher Boessenkool wrote: > On Thu, Mar 10, 2022 at 10:44:52AM -0600, will schmidt wrote: > > On Wed, 2022-03-09 at 22:49 -0500, Michael Meissner wrote: > > > --- a/gcc/config/rs6000/rs6000-cpus.def > > > +++ b/gcc/config/rs6000/rs6000-cpus.def > > > @@

Re: [PATCH] rs6000: Fix up __SIZEOF_{FLOAT,IBM}128__ defines [PR99708]

On Mon, Mar 07, 2022 at 03:37:18PM -0600, Segher Boessenkool wrote: > Hi! > > On Sat, Mar 05, 2022 at 09:21:51AM +0100, Jakub Jelinek wrote: > > As mentioned in the PR, right now on powerpc* __SIZEOF_{FLOAT,IBM}128__ > > macros are predefined unconditionally, because {ieee,ibm}128_float_type_node

Re: [PATCH] rs6000, v3: Fix up __SIZEOF_{FLOAT, IBM}128__ defines [PR99708]

On Wed, Mar 09, 2022 at 04:57:01PM -0600, Segher Boessenkool wrote: > On Wed, Mar 09, 2022 at 10:10:07PM +0100, Jakub Jelinek wrote: > > On Wed, Mar 09, 2022 at 02:57:20PM -0600, Segher Boessenkool wrote: > > > But __ibm128 should *always* be supported, so this is a hypothetical > > > problem. > >

Re: [PATCH, V2] Eliminate power8 fusion options, use power8 tuning, PR target/102059

On Thu, Mar 10, 2022 at 01:49:36PM -0600, Segher Boessenkool wrote: > On Thu, Mar 10, 2022 at 10:44:52AM -0600, will schmidt wrote: > > On Wed, 2022-03-09 at 22:49 -0500, Michael Meissner wrote: > > > --- a/gcc/config/rs6000/rs6000-cpus.def > > > +++ b/gcc/config/rs6000/rs6000-cpus.def > > > @@

Re: [PATCH RFC] mips: add TARGET_ZERO_CALL_USED_REGS hook [PR104817, PR104820]

> On Mar 9, 2022, at 12:25 PM, Richard Sandiford via Gcc-patches > wrote: > > Xi Ruoyao writes: >> Bootstrapped and regtested on mips64el-linux-gnuabi64. >> >> I'm not sure if it's "correct" to clobber other registers during the >> zeroing of scratch registers. But I can't really come up

Re: [PATCH] c++: Fix ICE with non-constant satisfaction [PR98644]

On 3/1/22 00:10, Patrick Palka wrote: On Tue, 19 Jan 2021, Jason Merrill wrote: On 1/13/21 12:05 PM, Patrick Palka wrote: In the below testcase, the expression of the atomic constraint after substitution is (int *) NON_LVALUE_EXPR <1> != 0B which is not a C++ constant expression, but its

Re: [PATCH] c++: improve location of fold expressions

On 3/1/22 00:14, Patrick Palka wrote: This improves diagnostic quality for unsatisfied atomic constraints that consist of a fold expression, e.g. in concepts/diagnostics3.C: .../diagnostic3.C:10:22: note: the expression ‘(foo && ...) [with Ts = {int, char}]’ evaluated to ‘false’ 10 |

Re: [PATCH, V2] Eliminate power8 fusion options, use power8 tuning, PR target/102059

On Thu, 2022-03-10 at 13:49 -0600, Segher Boessenkool wrote: > On Thu, Mar 10, 2022 at 10:44:52AM -0600, will schmidt wrote: > > On Wed, 2022-03-09 at 22:49 -0500, Michael Meissner wrote: > > > --- a/gcc/config/rs6000/rs6000-cpus.def > > > +++ b/gcc/config/rs6000/rs6000-cpus.def > > > @@ -43,9

Re: [PATCH, V2] Eliminate power8 fusion options, use power8 tuning, PR target/102059

On Thu, Mar 10, 2022 at 10:44:52AM -0600, will schmidt wrote: > On Wed, 2022-03-09 at 22:49 -0500, Michael Meissner wrote: > > --- a/gcc/config/rs6000/rs6000-cpus.def > > +++ b/gcc/config/rs6000/rs6000-cpus.def > > @@ -43,9 +43,7 @@ > > | OPTION_MASK_ALTIVEC

Re: [PATCH] c++: return-type-req in constraint using only outer tparms [PR104527]

On 2/16/22 15:56, Patrick Palka wrote: On Tue, 15 Feb 2022, Jason Merrill wrote: On 2/14/22 11:32, Patrick Palka wrote: Here the template context for the atomic constraint has two levels of template arguments, but since it depends only on the innermost argument T we use a single-level

[PATCH] c++: Fix ICE with bad conversion shortcutting [PR104622]

When shortcutting bad conversions during overload resolution, we assume argument conversions get computed in sequential order and that therefore we just need to inspect the last conversion in order to determine if _any_ conversion is missing. But this assumption turns out to be false for

[RFC v2] RISCV: Combine Pass Clobber Ops

RISC-V's C-extension describes 2-byte instructions with special constraints. One of those constraints is that one of the sources/dest registers are equal (op will clobber one of it's operands). This patch adds support for combining simple sequences: r1 = r2 + r3 (4 bytes) r2 DEAD r4 = r1 + r5 (4

Re: [PATCH] libgomp : OMPD implementation

Hi all, We remind you of this patch. Thanks Mohamed في الأربعاء، ١٦ فبراير، ٢٠٢٢ ١١:٠٤ م Mohamed Atef كتب: > Sorry I forgot to uncomment 2 lines, > here's the Patch Again. > > Thanks > Mohamed > > On Wed, Feb 16, 2022 at 10:54 PM Mohamed Atef > wrote: > >> HI, >> I am sorry that the

Re: [committed] libstdc++: Support VAX floats in std::strong_order

> On Mar 10, 2022, at 9:27 AM, Jonathan Wakely via Gcc-patches > wrote: > > On Thu, 10 Mar 2022 at 12:16, Jonathan Wakely wrote: >> >> On Thu, 10 Mar 2022 at 11:53, Jonathan Wakely via Libstdc++ >> wrote: >>> >>> Tested x86_64-linux, and basic soundness check on vax-dec-netbsdelf. >> >>

Re: [RFC] RISCV: Combine Pass Clobber Ops

On Thu, Mar 10, 2022 at 9:36 AM Patrick O'Neill wrote: > > RISC-V's C-extension describes 2-byte instructions with special > constraints. One of those constraints is that one of the sources/dest > registers are equal (op will clobber one of it's operands). This patch > adds support for combining

[RFC] RISCV: Combine Pass Clobber Ops

RISC-V's C-extension describes 2-byte instructions with special constraints. One of those constraints is that one of the sources/dest registers are equal (op will clobber one of it's operands). This patch adds support for combining simple sequences: r1 = r2 + r3 (4 bytes) r2 DEAD r4 = r1 + r5 (4

Re: [PATCH, V2] Eliminate power8 fusion options, use power8 tuning, PR target/102059

On Wed, 2022-03-09 at 22:49 -0500, Michael Meissner wrote: > Eliminate power8 fusion options, use power8 tuning, PR target/102059 Hi, > > The power8 fusion support used to be set automatically when -mcpu=power8 or > -mtune=power8 was used, and it was cleared for other cpu's. However, if you >

Re: [PATCH] c++: naming a dependently-scoped template for CTAD [PR104641]

On Wed, 9 Mar 2022, Jason Merrill wrote: > On 3/9/22 10:39, Patrick Palka wrote: > > On Tue, 8 Mar 2022, Jason Merrill wrote: > > > > > On 3/2/22 14:32, Patrick Palka wrote: > > > > In order to be able to perform CTAD for a dependently-scoped template > > > > such as A::B in the testcase below,

Re: [PATCH] OpenMP, libgomp: Add new runtime routine omp_get_mapped_ptr.

On Thu, Mar 10, 2022 at 05:01:35PM +0100, Marcel Vollweiler wrote: > --- a/gcc/omp-low.cc > +++ b/gcc/omp-low.cc > @@ -3962,6 +3962,7 @@ omp_runtime_api_call (const_tree fndecl) >"target_is_present", >"target_memcpy", >"target_memcpy_rect", > + "get_mapped_ptr", >

Re: [PATCH] OpenMP, libgomp: Add new runtime routine omp_get_mapped_ptr.

Hi Jakub, This is an update to the patch from Tue Mar 8: https://gcc.gnu.org/pipermail/gcc-patches/2022-March/591343.html I just added "get_mapped_ptr" to the "omp_runtime_apis" array in omp-low.cc and replaced "omp_get_num_devices" by "gomp_get_num_devices" in target.c. Marcel

Re: [PATCH] c++: fold calls to std::move/forward [PR96780]

On Thu, 10 Mar 2022 at 15:27, Patrick Palka wrote: > Here's a patch that extends the folding to as_const and addressof (as > well as __addressof, which I'm kind of unsure about since it's > non-standard). N.B. libstdc++ almost never uses std::addressof, because that calls std::__addressof, so we

Re: [PATCH] c++: fold calls to std::move/forward [PR96780]

On Wed, 9 Mar 2022, Jason Merrill wrote: > On 3/1/22 18:08, Patrick Palka wrote: > > A well-formed call to std::move/forward is equivalent to a cast, but the > > former being a function call means it comes with bloated debug info, which > > persists even after the call has been inlined away, for

Re: [committed] libstdc++: Support VAX floats in std::strong_order

On Thu, 10 Mar 2022 at 12:16, Jonathan Wakely wrote: > > On Thu, 10 Mar 2022 at 11:53, Jonathan Wakely via Libstdc++ > wrote: > > > > Tested x86_64-linux, and basic soundness check on vax-dec-netbsdelf. > > But apparently not enough of a soundness check, because > isnan(__builtin_nan("")) is true

[committed] analyzer: add notes to write-to-const/string from access attr [PR104793]

The previous patch extended -Wanalyzer-write-to-const -Wanalyzer-write-to-string-literal to make use of __attribute__ ((access, ), but the results could be inscrutable. This patch adds notes to such diagnostics to give the user a reason for why the analyzer is complaining. Example

[committed] analyzer: check for writes to consts via access attr [PR104793]

This patch extends: -Wanalyzer-write-to-const -Wanalyzer-write-to-string-literal so that they will check for __attribute__ ((access, ) on calls to externally-defined functions, and complain about read-only regions pointed to by arguments marked with a "write_only" or "read_write"

Re: [PATCH] call mark_dfs_back_edges() before testing EDGE_DFS_BACK [PR104761]

On 3/2/22 19:15, Martin Sebor wrote: The -Wdangling-pointer code tests the EDGE_DFS_BACK but the pass never calls the mark_dfs_back_edges() function that initializes the bit (I didn't know about it).  As a result the bit is not set when expected, which can cause false positives under the right

[committed] analyzer: fix duplicates in check_for_tainted_size_arg

Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r12-7594-g708646de75cba2. gcc/analyzer/ChangeLog: * sm-taint.cc (taint_state_machine::check_for_tainted_size_arg): Avoid generating duplicate saved_diagnostics by only handling the rdwr_map

Re: [PATCH] c++: allow variadic operator[] for C++23 [PR103460]

On 3/10/22 04:34, Jakub Jelinek wrote: Hi! wg21.link/p2128 removed "with exactly one parameter" from over.sub section. grok_op_properties has for that the last 2 lines in: case OVL_OP_FLAG_BINARY: if (arity != 2) { if (operator_code == ARRAY_REF && cxx_dialect

Re: [PATCH] PR c++/84964: Middle-end patch to expand_call for ICE after sorry.

On 2/28/22 03:52, Roger Sayle wrote: This patch resolves PR c++/84964 which is an ICE in the middle-end after emitting a "sorry, unimplemented" message, and is a regression from earlier releases of GCC. This issue is that after encountering a function call requiring an unreasonable amount of

[PATCH v2 RFC, resend] mips: add TARGET_ZERO_CALL_USED_REGS hook [PR104817, PR104820]

On Thu, 2022-03-10 at 21:41 +0800, Xi Ruoyao wrote: > Changes from v1: > >  * Added all zeroed registers into the return value of >    TARGET_ZERO_CALL_USED_REGS.  **The question: is this allowed?** >  * Define mips_zero_fcc insn only for ISA_HAS_8CC and mips_isa > >    MIPS_ISA_MIPS4, because

Re: [PATCH v2 RFC] mips: add TARGET_ZERO_CALL_USED_REGS hook [PR104817, PR104820]

Changes from v1: * Added all zeroed registers into the return value of TARGET_ZERO_CALL_USED_REGS.  **The question: is this allowed?** * Define mips_zero_fcc insn only for ISA_HAS_8CC and mips_isa > MIPS_ISA_MIPS4, because MIPS I-IV and MIPSr6 don't support "ISA_HAS_8CC && mips_isa >

Re: [PATCH] [i386] Don't fold builtin into gimple when isa mismatches.

On Tue, Mar 8, 2022 at 9:30 AM Hongtao Liu wrote: > > ping^1 > > On Fri, Feb 25, 2022 at 1:51 PM Hongtao Liu wrote: > > > > On Fri, Feb 25, 2022 at 1:50 PM liuhongt wrote: > > > > > > The patch fixes ICE in ix86_gimple_fold_builtin. > > > > > Bootstrapped and regtested on

Re: [PATCH] ada/104861 - use target_noncanonial for Target_Name

> The following arranges for s-oscons.ads to record target_noncanonical > for Target_Name, matching the install directory layout and what > gcc -dumpmachine says. This fixes build issues with gprbuild. > > Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed as > approved in bugzilla. >

[PATCH] tree-optimization/102943 - use tree form for sbr_sparse_bitmap

The following arranges to remove an indirection do the bitvector in sbr_sparse_bitmap by embedding bitmap_head instead of bitmap and using the tree form (since we only ever set/query individual aligned bit chunks). That shaves off 6 seconds from 70 seconds of the slowest 521.wrf_r LRANS unit

[PATCH] ada/104861 - use target_noncanonial for Target_Name

The following arranges for s-oscons.ads to record target_noncanonical for Target_Name, matching the install directory layout and what gcc -dumpmachine says. This fixes build issues with gprbuild. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed as approved in bugzilla. OK also for

Re: [committed] libstdc++: Support VAX floats in std::strong_order

On Thu, 10 Mar 2022 at 11:53, Jonathan Wakely via Libstdc++ wrote: > > Tested x86_64-linux, and basic soundness check on vax-dec-netbsdelf. But apparently not enough of a soundness check, because isnan(__builtin_nan("")) is true for VAX, so GCC seems to have a NaN pattern, despite what I read

Re: [PATCH RFC] mips: add TARGET_ZERO_CALL_USED_REGS hook [PR104817, PR104820]

On Wed, 2022-03-09 at 18:25 +, Richard Sandiford wrote: > Xi Ruoyao writes: > > Bootstrapped and regtested on mips64el-linux-gnuabi64. > > > > I'm not sure if it's "correct" to clobber other registers during the > > zeroing of scratch registers.  But I can't really come up with a > > better

[committed] libstdc++: Support VAX floats in std::strong_order

Tested x86_64-linux, and basic soundness check on vax-dec-netbsdelf. Pushed to trunk. -- >8 -- The VAX float and double format does not support NaN, so the std::partial_ordering returned by <=> will never be 'unordered'. We can just use the partial_ordering value as the strong_ordering.

[PATCH] tree-optimization/102943 - avoid (re-)computing dominance bitmap

Currently back_propagate_equivalences tries to optimize dominance queries in a smart way but it fails to notice that when fast indexes are available the dominance query is fast (when called from DOM). It also re-computes the dominance bitmap for each equivalence recorded on an edge, which for FP

Re: [Patch] Fortran: OpenMP/OpenACC avoid uninit access in size calc for mapping

Hi Thomas, hi all, (Updated patch attached – only changes the goacc testcases. I intent to commit the patch tomorrow, unless more comments come up.) On 10.03.22 10:00, Thomas Schwinge wrote: [OpenACC testcases:] I recently added that checking in ... [...] to document the status quo. (1), as

Re: [PATCH] contrib: Avoid use of "echo -n" in git customization [PR102664]

On 09/03/2022 15:05, Jonathan Wakely via Gcc-patches wrote: On 09/03/22 12:15 +, Richard Earnshaw wrote: The -n option to echo is non-portable.  The generally recommended alternative is to use the shell printf command. contrib/ChangeLog: PR other/102664 *

Re: [PATCH v2] cse: avoid signed overflow in compute_const_anchors [PR 104843]

On Thu, 2022-03-10 at 09:01 +0100, Richard Biener wrote: > On Wed, Mar 9, 2022 at 5:12 PM Xi Ruoyao > wrote: > > > > On Wed, 2022-03-09 at 15:55 +0100, Richard Biener wrote: > > > > > isn't it better to make targetm.const_anchor unsigned? > > > The & and ~ are not subject to overflow rules. > >

Re: [PATCH] libphobos: Enable on Solaris/SPARC or with /bin/as [PR 103528]

Excerpts from Rainer Orth's message of März 10, 2022 11:19 am: > libphobos is currently only enabled on Solaris/x86 with gas. As > discovered when gdc was switched to the dmd frontend, this initially > broke bootstrap for the other Solaris configurations. > > However, it's now well possible to

[OpenACC privatization] Analyze 'lookup_decl'-translated DECL [PR90115, PR102330, PR104774]

Hi! On 2022-02-15T13:40:09+, Julian Brown wrote: > On Mon, 14 Feb 2022 16:56:35 +0100 > Thomas Schwinge wrote: >> Two more questions here, in context of >> "[12 Regression] ICE in expand_gimple_stmt_1, at cfgexpand.c:3932 >> since r12-980-g29a2f51806c": >> >>

[committed][nvptx] Use no,yes for attribute predicable

Hi, The documentation states about the predicable instruction attribute: ... This attribute must be a boolean (i.e. have exactly two elements in its list-of-values), with the possible values being no and yes. ... The nvptx port has instead: ... (define_attr "predicable" "false,true"

[committed][nvptx] Disable warp sync in simt region

Hi, I ran into a hang for this code: ... #pragma omp target map(tofrom: counter_N0) #pragma omp simd for (int i = 0 ; i < 1 ; i++ ) { #pragma omp atomic update counter_N0 = counter_N0 + 1 ; } ... This has to do with the nature of -muniform-simt. It has two modes of

[committed][nvptx] Handle unused result in nvptx_unisimt_handle_set

Hi, For an example: ... #pragma omp target map(tofrom: counter_N0) #pragma omp simd for (int i = 0 ; i < 1 ; i++ ) { #pragma omp atomic update counter_N0 = counter_N0 + 1 ; } ... I noticed that the result of the atomic update (%r30) is propagated: ... @%r33

[committed][nvptx] Use bit-bucket operand for atom insns

Hi, For an atomic fetch operation that doesn't use the result: ... __atomic_fetch_add (p64, v64, MEMMODEL_RELAXED); ... we currently emit: ... atom.add.u64 %r26, [%r25], %r27; ... Detect the REG_UNUSED reg-note for %r26, and emit instead: ... atom.add.u64 _, [%r25], %r27; ... Likewise for

[committed][nvptx] Use atom.and.b64 instead of atom.b64.and

Hi, The ptx manual prescribes the instruction format atom{.space}.op.type but the compiler currently emits: ... atom.b64.and %r31, [%r30], %r32; ... which uses the instruction format atom{.space}.type.op. Fix this by emitting instead: ... atom.and.b64 %r31, [%r30], %r32; ... Tested on

[committed][nvptx] Add multilib mptx=3.1

Hi, With commit 5b5e456f018 ("[nvptx] Build libraries with mptx=3.1") the intention was that the ptx isa version for all libraries was switched back to 3.1 using MULTILIB_EXTRA_OPTS, without changing the default 6.0. Further testing revealed that this is not the case, and some libs were still

[committed][nvptx] Restore default to sm_30

Hi, With commit 07667c911b1 ("[nvptx] Build libraries with misa=sm_30") the intention was that the sm_xx for all libraries was switched back to sm_30 using MULTILIB_EXTRA_OPTS, without changing the default sm_35. Testing on an sm_30 board revealed that still some libs were build with sm_35, so

Add 'c-c++-common/goacc/kernels-decompose-pr104774-1.c' [PR104774]

Hi! On 2022-03-10T12:13:29+0100, I wrote: > On 2022-02-14T16:56:35+0100, I wrote: >> [...] give rise to "[12 Regression] ICE in >> expand_gimple_stmt_1, at cfgexpand.c:3932 since r12-980-g29a2f51806c". > > Pushed to master branch commit

Add 'gfortran.dg/goacc-gomp/pr102330-{1,2,3}.f90' [PR102330]

Hi! On 2022-02-14T16:56:35+0100, I wrote: > [...] give rise to "[12 Regression] ICE in > expand_gimple_stmt_1, at cfgexpand.c:3932 since r12-980-g29a2f51806c". Pushed to master branch commit 687091257820f4a6a005186437917270ecd27416 "Add

Enhance further testcases to verify handling of OpenACC privatization level [PR90115]

Hi! On 2021-05-21T21:29:19+0200, I wrote: > I've pushed "[OpenACC privatization] Largely extend diagnostics and > corresponding testsuite coverage [PR90115]" to master branch in commit > 11b8286a83289f5b54e813f14ff56d730c3f3185 To demonstrate that later changes don't vs. how they do change

Re: [PATCH] rs6000, v3: Fix up __SIZEOF_{FLOAT, IBM}128__ defines [PR99708]

Hi! On Thu, Mar 10, 2022 at 10:35:36AM +0100, Jakub Jelinek wrote: > On Wed, Mar 09, 2022 at 04:57:01PM -0600, Segher Boessenkool wrote: > > > > If you are fed up with all this, please commit what you have now (after > > > > testing of course ;-) ), and I'll pick up things myself. Either way, >

[PATCH] libphobos: Enable on Solaris/SPARC or with /bin/as [PR 103528]

libphobos is currently only enabled on Solaris/x86 with gas. As discovered when gdc was switched to the dmd frontend, this initially broke bootstrap for the other Solaris configurations. However, it's now well possible to enable it both for Solaris/x86 with as and Solaris/SPARC (both as and gas)

Re: [PATCH] rs6000: Improve .machine

Hi! On Thu, Mar 10, 2022 at 09:25:21AM +0100, Sebastian Huber wrote: > On 04/03/2022 17:51, Segher Boessenkool wrote: > >This adds more correct .machine for most older CPUs. It should be > >conservative in the sense that everything we handled before we handle at > >least as well now. This does

Re: [PATCH] rs6000, v3: Fix up __SIZEOF_{FLOAT, IBM}128__ defines [PR99708]

On Wed, Mar 09, 2022 at 04:57:01PM -0600, Segher Boessenkool wrote: > > > If you are fed up with all this, please commit what you have now (after > > > testing of course ;-) ), and I'll pick up things myself. Either way, > > > thank you for all your work on this! > > > > Ok, here is what I'll

Re: [Patch] Fortran: OpenMP/OpenACC avoid uninit access in size calc for mapping

Hi Tobias! On 2022-03-08T15:25:07+0100, Tobias Burnus wrote: > found when working on the deep-mapping patch* with OpenMP code > (and part of that patch) but it already shows up in an existing > OpenACC testcase. I think it makes sense to fix it already for GCC 12. > > Problem: Also for

[PATCH] c++: allow variadic operator[] for C++23 [PR103460]

Hi! wg21.link/p2128 removed "with exactly one parameter" from over.sub section. grok_op_properties has for that the last 2 lines in: case OVL_OP_FLAG_BINARY: if (arity != 2) { if (operator_code == ARRAY_REF && cxx_dialect >= cxx23) break; but unfortunately

Re: [PATCH] rs6000: Improve .machine

On 04/03/2022 17:51, Segher Boessenkool wrote: Hi! This adds more correct .machine for most older CPUs. It should be conservative in the sense that everything we handled before we handle at least as well now. This does not yet revamp the server CPU handling, it is too risky at this point in

Re: [PATCH v2] Add TARGET_MOVE_WITH_MODE_P

On Wed, Mar 9, 2022 at 7:08 PM H.J. Lu wrote: > > On Wed, Mar 9, 2022 at 12:25 AM Richard Biener > wrote: > > > > On Tue, Mar 8, 2022 at 4:44 PM H.J. Lu wrote: > > > > > > On Mon, Mar 7, 2022 at 5:45 AM Richard Biener > > > wrote: > > > > > > > > On Wed, Mar 2, 2022 at 10:18 PM H.J. Lu wrote:

Re: [PATCH v2] Add TARGET_MOVE_WITH_MODE_P

On Wed, Mar 9, 2022 at 7:04 PM Richard Sandiford wrote: > > Richard Biener via Gcc-patches writes: > > On Wed, Mar 2, 2022 at 10:18 PM H.J. Lu wrote: > >> > >> On Wed, Mar 02, 2022 at 09:51:26AM +0100, Richard Biener wrote: > >> > On Tue, Mar 1, 2022 at 11:41 PM H.J. Lu via Gcc-patches > >> >

Re: [PATCH v2] cse: avoid signed overflow in compute_const_anchors [PR 104843]

On Wed, Mar 9, 2022 at 5:12 PM Xi Ruoyao wrote: > > On Wed, 2022-03-09 at 15:55 +0100, Richard Biener wrote: > > > isn't it better to make targetm.const_anchor unsigned? > > The & and ~ are not subject to overflow rules. > > It's not enough: if n is the minimum value of HOST_WIDE_INT and >