Re: [PATCH] RISC-V: Fix SEW64 of vrsub.vx runtime fail in RV32 system

On 4/2/23 22:18, juzhe.zh...@rivai.ai wrote: OK， would you mind telling me some tool can help for formatting of .MD file? Since clang-format only works on .cc/.h file. No idea. I don't use clang-format. But I've also had 30+ years in this codebase, so most of its coding conventions are

Re: [PATCH] Less warnings for parameters declared as arrays [PR98541, PR98536]

On 4/3/23 13:34, Martin Uecker via Gcc-patches wrote: With the relatively new warnings (11..) affecting VLA bounds, I now get a lot of false positives with -Wall. In general, I find the new warnings very useful, but they seem a bit too aggressive and some minor tweaks are needed, otherwise

Re: [PATCH v2] RISC-V: Add Z*inx imcompatible check in gcc.

On 4/3/23 19:46, Hans-Peter Nilsson wrote: On Tue, 28 Mar 2023, Jiawei wrote: + // Zfinx is conflict with float extensions. + if (TARGET_ZFINX && TARGET_HARD_FLOAT) +error ("z*inx is conflict with float extensions"); + While I'm not a native English speaker, "is conflict with"

Re: [PATCH] Check hard_regno_mode_ok before setting lowest memory move cost for the mode with different reg classes.

On 4/3/23 23:13, liuhongt via Gcc-patches wrote: There's a potential performance issue when backend returns some unreasonable value for the mode which can be never be allocate with reg class. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ok for trunk(or GCC14 stage1)?

Re: [PATCH] RISC-V: Fix PR109399 VSETVL PASS bug

On 4/4/23 02:46, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong This patch fix bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109399 PR 109399 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local

Re: [PATCH] RISC-V: Fix typo

On 4/4/23 01:49, Li Xu wrote: gcc/ChangeLog: * config/riscv/riscv-vector-builtins.def: Fix typo. * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto. * config/riscv/vector-iterators.md: Ditto. Thanks. Installed on the trunk. jeff

[committed] doc: md.texi (Including Patterns): Fix page break

Committed as obvious. See also the previous discussion regarding my define_split doc patch. -- >8 -- The line-break in the example looked odd, even more so with a page-break in the middle of it, due to recently added text in preceding pages. * doc/md.texi (Including Patterns): Fix page

[PATCH 1/4] libstdc++: Harmonize and other headers

Due to recent, large changes in libstdc++, the feature test macros declared in got out of sync with the other headers that possibly declare them. libstdc++-v3/ChangeLog: * include/bits/unique_ptr.h (__cpp_lib_constexpr_memory): Synchronize the definition block with... *

[PATCH 3/4] libstdc++: Downgrade DEBUG to ASSERTIONS when !HOSTED

Supporting the debug mode in freestanding is a non-trivial job, so instead, as a best-effort, enable assertions, which are light and easy. libstdc++-v3/ChangeLog: * include/bits/c++config: When __STDC_HOSTED__ is zero, disable _GLIBCXX_DEBUG and, if it was set, enable

[PATCH 4/4] libstdc++: Fix some freestanding test failures

At some point, was added to the non-hosted bit of the C++17 block, which induced failures in many tests. In addition, some tests also lacked a dg-require-effective-target hosted tag. libstdc++-v3/ChangeLog: * include/precompiled/stdc++.h (C++17): Don't double-include , once

[PATCH 2/4] libstdc++: Add a test for FTM redefinitions

This test detects redefinitions by compiling stdc++.h with -Wsystem-headers. Thanks Patrick Palka for the suggestion. libstdc++-v3/ChangeLog: * testsuite/17_intro/versionconflict.cc: New test. --- libstdc++-v3/testsuite/17_intro/versionconflict.cc | 6 ++ 1 file changed, 6

Ping: [PATCH v2] libcpp: Handle extended characters in user-defined literal suffix [PR103902]

May I please ping this one? https://gcc.gnu.org/pipermail/gcc-patches/2023-March/613247.html Thanks! -Lewis On Thu, Mar 2, 2023 at 6:21 PM Lewis Hyatt wrote: > > The PR complains that we do not handle UTF-8 in the suffix for a user-defined > literal, such as: > > bool operator ""_π (unsigned

Re: [aarch64] Use dup and zip1 for interleaving elements in initializing vector

Prathamesh Kulkarni writes: > On Mon, 13 Mar 2023 at 13:03, Richard Biener wrote: >> On GIMPLE it would be >> >> _1 = { a, ... }; // (a) >> _2 = { _1, ... }; // (b) >> >> but I'm not sure if (b), a VL CTOR of fixed len(?) sub-vectors is >> possible? But at least a CTOR of vectors is what we

Re: [PATCHv4] [AARCH64] Fix PR target/103100 -mstrict-align and memset on not aligned buffers

Andrew Pinski via Gcc-patches writes: > The problem here is that aarch64_expand_setmem does not change the alignment > for strict alignment case. > This is version 4 of the fix, major changes from the last version is fixing > the way store pairs are handled which allows handling of storing 2 SI

[PATCH] Add -fsarif-time-report [PR109361]

Richi, Jakub: I can probably self-approve this, but it's technically a new feature. OK if I push this to trunk in stage 4? I believe it's low risk, and is very useful for benchmarking -fanalyzer. This patch adds support for embeddding profiling information about the compiler itself into the

Re: [PATCH] ree: Improvement of ree pass for rs6000 target.

On Tue, Apr 04, 2023 at 05:26:26PM +0200, Jakub Jelinek wrote: > On Tue, Apr 04, 2023 at 10:19:23AM -0500, Segher Boessenkool wrote: > > > > +/* Enable -free for zero extension and sign extension > > > > elimination.*/ > > > > +{ OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 }, > > > > > > I

Re: [PATCH] ree: Improvement of ree pass for rs6000 target.

On Tue, Apr 04, 2023 at 10:19:23AM -0500, Segher Boessenkool wrote: > Hi! > > On Tue, Apr 04, 2023 at 01:53:46PM +0200, Jakub Jelinek wrote: > > On Tue, Apr 04, 2023 at 05:02:35PM +0530, Ajit Agarwal via Gcc-patches > > wrote: > > > --- a/gcc/common/config/rs6000/rs6000-common.cc > > > +++

Re: [PATCH] ree: Improvement of ree pass for rs6000 target.

Hi! On Tue, Apr 04, 2023 at 01:53:46PM +0200, Jakub Jelinek wrote: > On Tue, Apr 04, 2023 at 05:02:35PM +0530, Ajit Agarwal via Gcc-patches wrote: > > --- a/gcc/common/config/rs6000/rs6000-common.cc > > +++ b/gcc/common/config/rs6000/rs6000-common.cc > > @@ -30,6 +30,8 @@ > > /* Implement

Re: [Patch] libgomp/nvptx: Prepare for reverse-offload callback handling

Hi! During GCC/OpenMP/nvptx reverse offload investigations, about how to replace the problematic global 'GOMP_REV_OFFLOAD_VAR', I may have found something re: On 2022-08-26T11:07:28+0200, Tobias Burnus wrote: > Better suggestions are welcome for the busy loop in > libgomp/plugin/plugin-nvptx.c

Re: [wwwdocs] Add Ada's GCC13 changelog entry

Fernando Oleo Blanco via Gcc-patches writes: > Hi all, > > a bit belated but just like last year, I've made a patch for the Ada > entry in the changelog. You can find the patch attached to this email. > > If I have forgotten anything relevant or if I have done something > incorrectly, please,

Re: [PATCH] range-op-float: Fix reverse ops of comparisons [PR109386]

OK. On Mon, Apr 3, 2023, 21:54 Jakub Jelinek wrote: > Hi! > > I've missed one of my recent range-op-float.cc changes (likely the > r13-6967 one) caused > FAIL: libphobos.phobos/std/math/algebraic.d execution test > FAIL: libphobos.phobos_shared/std/math/algebraic.d execution test > regressions,

Fwd: [V6][PATCH 2/2] Update documentation to clarify a GCC extension

Ping…. Qing Begin forwarded message: From: Qing Zhao mailto:qing.z...@oracle.com>> Subject: [PATCH 2/2] Update documentation to clarify a GCC extension Date: March 28, 2023 at 11:49:44 AM EDT To: ja...@redhat.com, jos...@codesourcery.com

Fwd: [V6][PATCH 1/2] Handle component_ref to a structre/union field including flexible array member [PR101832]

Ping… Qing Begin forwarded message: From: Qing Zhao mailto:qing.z...@oracle.com>> Subject: [V6][PATCH 1/2] Handle component_ref to a structre/union field including flexible array member [PR101832] Date: March 28, 2023 at 11:49:43 AM EDT To: ja...@redhat.com,

RE: [PATCH] aarch64: update ampere1 vectorization cost

Hi Philipp, > -Original Message- > From: Philipp Tomsich > Sent: Monday, April 3, 2023 12:46 PM > To: Kyrylo Tkachov > Cc: gcc-patches@gcc.gnu.org; Richard Sandiford > ; Tamar Christina > ; Manolis Tsamis > Subject: Re: [PATCH] aarch64: update ampere1 vectorization cost > > Kyrill, >

Re: arm: Fix MVE vcreate definition

On 29/03/2023 13:16, Kyrylo Tkachov wrote: -Original Message- From: Stam Markianos-Wright Sent: Wednesday, March 29, 2023 11:50 AM To:gcc-patches@gcc.gnu.org Cc: Kyrylo Tkachov Subject: arm: Fix MVE vcreate definition Hi all, I just found a bug that goes back to the initial merge of

Re: [PATCH] ree: Improvement of ree pass for rs6000 target.

On Tue, Apr 04, 2023 at 05:02:35PM +0530, Ajit Agarwal via Gcc-patches wrote: > This patch eliminates unnecessary redundant extension within basic and across > basic blocks. For rs6000 target we see > redundant zero and sign extension and done to improve ree pass to eliminate > such redundant

Re: Patch ping Re: [PATCH] ipa: Avoid another ICE when dealing with type-incompatibilities (PR 108959)

> On Thu, Mar 23, 2023 at 11:09:19AM +0100, Martin Jambor wrote: > > Hi, > > > > PR 108959 shows one more example where undefined code with type > > incompatible accesses to stuff passed in parameters can cause an ICE > > because we try to create a VIEW_CONVERT_EXPR of mismatching sizes: > > > >

[PATCH] ree: Improvement of ree pass for rs6000 target.

Hello All: This patch eliminates unnecessary redundant extension within basic and across basic blocks. For rs6000 target we see redundant zero and sign extension and done to improve ree pass to eliminate such redundant zero and sign extension. Bootstrapped and regtested on powerpc64-linux-gnu.

[committed] libstdc++: Fix outdated docs about demangling exception messages

Pushed to trunk. -- >8 -- The string returned by std::bad_exception::what() hasn't been a mangled name since PR libstdc++/14493 was fixed for GCC 4.2.0, so remove the docs showing how to demangle it. libstdc++-v3/ChangeLog: * doc/xml/manual/extensions.xml: Remove std::bad_exception

Patch ping Re: [PATCH] ipa: Avoid another ICE when dealing with type-incompatibilities (PR 108959)

Hi! Honza, could you please have a look? This is one of the few remaining P1s. On Thu, Mar 23, 2023 at 11:09:19AM +0100, Martin Jambor wrote: > Hi, > > PR 108959 shows one more example where undefined code with type > incompatible accesses to stuff passed in parameters can cause an ICE >

Re: [PATCH] tree-optimization/109304 - properly handle instrumented aliases

> On Tue, Apr 04, 2023 at 01:21:40AM +0200, Jan Hubicka via Gcc-patches wrote: > > It is however really side case and I am worried about dropping > > pure/const from builtin declarations... > > Yeah, that can certainly break stuff. See e.g. the recently fixed > ICE when memcmp wasn't pure in

[committed] amdgcn: Add 64-bit vector not

I've committed this patch to add a missing vector operator on amdgcn. The architecture doesn't have a 64-bit not instruction so we didn't have an insn for it, but the vectorizer didn't like that and caused the v64df_pow function to use 2MB of stack frame. This is a problem when you typically

Re: [PATCH] riscv: Fix bootstrap [PR109384]

ok, thanks! On Tue, Apr 4, 2023 at 5:01 PM Jakub Jelinek via Gcc-patches wrote: > > Hi! > > The following patch unbreaks riscv bootstrap, where it previously failed > on -Werror=format-diag warning promoted to error. > > Ok for trunk? > > Or shall it say e.g. > "%<-march=%s%>: % extension

Re: [GCC14 PATCH] LoongArch: Optimize additions with immediates

在 2023/4/4 下午4:40, Xi Ruoyao 写道: On Tue, 2023-04-04 at 16:00 +0800, Xi Ruoyao via Gcc-patches wrote: On Tue, 2023-04-04 at 11:01 +0800, Lulu Cheng wrote: /* snip */ +unsigned long f10 (unsigned long x) { return x - 0x8000l * 2; } +unsigned long f11 (unsigned long x) { return x -

Re: [GCC14 PATCH v2] LoongArch: Optimize additions with immediates

在 2023/4/4 下午4:38, Xi Ruoyao 写道: 1. Use addu16i.d for TARGET_64BIT and suitable immediates. 2. Split one addition with immediate into two addu16i.d or addi.{d/w} instructions if possible. This can avoid using a temp register w/o increase the count of instructions. Inspired by

Re: [Patch] nvptx/mkoffload.cc: Add dummy proc for OpenMP rev-offload table [PR108098]

On 4/4/23 11:02, Thomas Schwinge wrote: Hi! Are we going to install such a work-around? Hi, LGTM. Thanks, - Tom Grüße Thomas On 2022-12-19T13:04:43+0100, I wrote: Hi! On 2022-12-16T17:19:00+0100, Tobias Burnus wrote: Seems to be a CUDA JIT issue A Nvidia Driver JIT issue, more

Re: [Patch] nvptx/mkoffload.cc: Add dummy proc for OpenMP rev-offload table [PR108098]

Hi! Are we going to install such a work-around? Grüße Thomas On 2022-12-19T13:04:43+0100, I wrote: > Hi! > > On 2022-12-16T17:19:00+0100, Tobias Burnus wrote: >> Seems to be a CUDA JIT issue > > A Nvidia Driver JIT issue, more precisely. ;-) > >> which is fixed by adding a dummy procedure.

[PATCH] riscv: Fix bootstrap [PR109384]

Hi! The following patch unbreaks riscv bootstrap, where it previously failed on -Werror=format-diag warning promoted to error. Ok for trunk? Or shall it say e.g. "%<-march=%s%>: % extension conflicts with %" ? Or say if the current condition is true, do const char *ext = "zfinx"; if

[PATCH] RISC-V: Fix PR109399 VSETVL PASS bug

From: Juzhe-Zhong This patch fix bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109399 PR 109399 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local demand fusion. gcc/testsuite/ChangeLog: *

Re: [GCC14 PATCH] LoongArch: Optimize additions with immediates

On Tue, 2023-04-04 at 16:00 +0800, Xi Ruoyao via Gcc-patches wrote: > On Tue, 2023-04-04 at 11:01 +0800, Lulu Cheng wrote: > > /* snip */ > > > > +unsigned long f10 (unsigned long x) { return x - 0x8000l * 2; } > > > +unsigned long f11 (unsigned long x) { return x - 0x8000l * 2; } > >  

[GCC14 PATCH v2] LoongArch: Optimize additions with immediates

1. Use addu16i.d for TARGET_64BIT and suitable immediates. 2. Split one addition with immediate into two addu16i.d or addi.{d/w} instructions if possible. This can avoid using a temp register w/o increase the count of instructions. Inspired by https://reviews.llvm.org/D143710 and

Re: [PATCH] tree-optimization/109304 - properly handle instrumented aliases

On Tue, Apr 04, 2023 at 01:21:40AM +0200, Jan Hubicka via Gcc-patches wrote: > It is however really side case and I am worried about dropping > pure/const from builtin declarations... Yeah, that can certainly break stuff. See e.g. the recently fixed ICE when memcmp wasn't pure in PR109258.

[COMMITTED] config: -pthread shouldn't link with -lpthread on Solaris

libpthread has been folded into libc since Solaris 10 and replaced by a filter on libc. Linking with libpthread thus only creates unnecessary runtime overhead. This patch thus removes linking with -lpthread if -pthread/-pthreads is specified, thus getting rid of the libpthread dependency in

Re: [GCC14 PATCH] LoongArch: Optimize additions with immediates

On Tue, 2023-04-04 at 11:01 +0800, Lulu Cheng wrote: /* snip */ > > +unsigned long f10 (unsigned long x) { return x - 0x8000l * 2; } > > +unsigned long f11 (unsigned long x) { return x - 0x8000l * 2; } >  These two test cases are duplicates. /* snip */ > > > +unsigned int g10

[PATCH] RISC-V: Fix typo

gcc/ChangeLog: * config/riscv/riscv-vector-builtins.def: Fix typo. * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto. * config/riscv/vector-iterators.md: Ditto. --- gcc/config/riscv/riscv-vector-builtins.def | 3 +-- gcc/config/riscv/riscv.cc