[GCC-6][RFA 1/2]: Don't ignore target_header_dir when deciding inhibit_libc

On 27/05/16 15:51, Ulrich Weigand wrote: > Andre Vieira (lists) wrote: >> On 07/04/16 10:30, Andre Vieira (lists) wrote: >>> On 17/03/16 16:33, Andre Vieira (lists) wrote: >>>> On 23/10/15 12:31, Bernd Schmidt wrote: >>>>> On 10/12/2015 11:58 AM, U

Re: [PATCHv2, PING 3][ARM] -mpure-code option for ARM

On 11/08/16 15:13, Andre Vieira (lists) wrote: > On 25/07/16 11:52, Andre Vieira (lists) wrote: >> On 11/07/16 17:56, Andre Vieira (lists) wrote: >>> On 07/07/16 13:30, mickael guene wrote: >>>> Hi Andre, >>>> >>>> Another feedback on your pu

Re: [Patch] Implement std::experimental::variant

On 19/08/16 09:18, Jonathan Wakely wrote: > On 18/08/16 13:32 -0700, Tim Shen wrote: >> Tested on x86_64-linux-gnu and checked in as r239590. > > This updates the status at > https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.201z > > Committed to trunk. > > Hi, I am

Re: [PATCH 0/7, GCC, V8M] ARMv8-M Security Extensions

On 10/08/16 09:08, Andre Vieira (lists) wrote: > On 09/08/16 17:47, Sandra Loosemore wrote: >> On 08/09/2016 06:01 AM, Andre Vieira (lists) wrote: >>> [snip] >>> >>> The documentation is in the ARMV8-M Security Extensions in: ARM®v8-M >>> Security

[PATCHv2 6/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_call: use __gnu_cmse_nonsecure_call

On 25/07/16 14:26, Andre Vieira (lists) wrote: > This patch extends support for the ARMv8-M Security Extensions > 'cmse_nonsecure_call' to use a new library function > '__gnu_cmse_nonsecure_call'. This library function is responsible for > (without using r0-r3 or d0-d7): > 1) savi

[PATCHv2 5/7, GCC, ARM, V8M] Handling ARMv8-M Security Extension's cmse_nonsecure_call attribute

On 25/07/16 14:25, Andre Vieira (lists) wrote: > This patch adds support for the ARMv8-M Security Extensions > 'cmse_nonsecure_call' attribute. This attribute may only be used for > function types and when used in combination with the '-mcmse' > compilation flag. See Section 5.5

Re: [PATCH 7/7, GCC, ARM, V8M] Added support for ARMV8-M Security Extension cmse_nonsecure_caller intrinsic

On 25/07/16 14:28, Andre Vieira (lists) wrote: > This patch adds support ARMv8-M's Security Extension's > cmse_nonsecure_caller intrinsic. This intrinsic is used to check whether > an entry function was called from a non-secure state. > See Section 5.4.3 of ARM®v8-M Securit

[PATCHv2 4/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

On 25/07/16 14:23, Andre Vieira (lists) wrote: > This patch extends support for the ARMv8-M Security Extensions > 'cmse_nonsecure_entry' attribute to safeguard against leak of > information through unbanked registers. > > When returning from a nonsecure entry function we clear a

[PATCHv2 2/7, GCC, ARM, V8M] Handling ARMv8-M Security Extension's cmse_nonsecure_entry attribute

On 25/07/16 14:21, Andre Vieira (lists) wrote: > This patch adds support for the ARMv8-M Security Extensions > 'cmse_nonsecure_entry' attribute. In this patch we implement the > attribute handling and diagnosis around the attribute. See Section 5.4 > of ARM®v8-M Security Extens

[PATCHv2 1/7, GCC, ARM, V8M] Add support for ARMv8-M's Secure Extensions flag and intrinsics

On 25/07/16 14:19, Andre Vieira (lists) wrote: > This patch adds the support of the '-mcmse' option to enable ARMv8-M's > Security Extensions and supports the following intrinsics: > cmse_TT > cmse_TT_fptr > cmse_TTT > cmse_TTT_fptr > cmse_TTA > cmse_TTA_fptr >

Re: [PATCHv2, PING 2][ARM] -mpure-code option for ARM

On 25/07/16 11:52, Andre Vieira (lists) wrote: > On 11/07/16 17:56, Andre Vieira (lists) wrote: >> On 07/07/16 13:30, mickael guene wrote: >>> Hi Andre, >>> >>> Another feedback on your purecode patch. >>> You have to disable casesi pattern since the

Re: [PATCH 0/7, GCC, V8M] ARMv8-M Security Extensions

On 09/08/16 17:47, Sandra Loosemore wrote: > On 08/09/2016 06:01 AM, Andre Vieira (lists) wrote: >> [snip] >> >> The documentation is in the ARMV8-M Security Extensions in: ARM®v8-M >> Security Extensions: Requirements on Development Tools document I linked >>

Re: [PATCH 0/7, GCC, V8M] ARMv8-M Security Extensions

On 08/08/16 05:19, Sandra Loosemore wrote: > On 07/25/2016 07:17 AM, Andre Vieira (lists) wrote: >> [PATCH 0/7, GCC, V8M] ARMv8-M Security Extensions >> >> Hello, >> >> This is a respin of a previous patch series for ARMv8-M Security >> Extensions. In this ve

[PATCH 7/7, GCC, ARM, V8M] Added support for ARMV8-M Security Extension cmse_nonsecure_caller intrinsic

that such a diagnostic might become mandatory, so I might have to pick this up later, otherwise it is left as a potential extra feature. *** gcc/ChangeLog *** 2016-07-25 Andre Vieira<andre.simoesdiasvie...@arm.com> Thomas Preud'homme <thomas.preudho...@arm.com> * co

[PATCH 6/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_call: use __gnu_cmse_nonsecure_call

(single/double precision) all depends on the multilib used. See Section 5.5 of ARM®v8-M Security Extensions (http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/index.html). *** gcc/ChangeLog *** 2016-07-25 Andre Vieira<andre.simoesdiasvie...@arm.com>

[PATCH 5/7, GCC, ARM, V8M] Handling ARMv8-M Security Extension's cmse_nonsecure_call attribute

/com.arm.doc.ecm0359818/index.html). We currently do not support cmse_nonsecure_call functions that pass arguments or return variables on the stack and we diagnose this. *** gcc/ChangeLog *** 2016-07-25 Andre Vieira<andre.simoesdiasvie...@arm.com> Thomas Preud

[PATCH 4/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

return types. For unions a bit is only considered a padding bit if it is an unused bit in every field of that union. The function that calculates these is used in a later patch to do the same for arguments of cmse_nonsecure_call's. *** gcc/ChangeLog *** 2016-07-25 Andre Vieira

[PATCH 3/7, GCC, ARM, V8M] ARMv8-M Security Extension's cmse_nonsecure_entry: __acle_se label and bxns return

for this entry function. 2) Return from cmse_nonsecure_entry marked functions using bxns. See Section 5.4 of ARM®v8-M Security Extensions (http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/index.html). *** gcc/ChangeLog *** 2016-07-25 Andre Vieira<andre.simoesdias

[PATCH 2/7, GCC, ARM, V8M] Handling ARMv8-M Security Extension's cmse_nonsecure_entry attribute

/index.html). *** gcc/ChangeLog *** 2016-07-25 Andre Vieira<andre.simoesdiasvie...@arm.com> Thomas Preud'homme <thomas.preudho...@arm.com> * config/arm/arm.c (arm_handle_cmse_nonsecure_entry): New. (arm_attribute_table): Added cmse_non

[PATCH 1/7, GCC, ARM, V8M] Add support for ARMv8-M's Secure Extensions flag and intrinsics

*** 2016-07-25 Andre Vieira<andre.simoesdiasvie...@arm.com> Thomas Preud'homme <thomas.preudho...@arm.com> * config.gcc (extra_headers): Added arm_cmse.h. * config/arm/arm-arches.def (ARM_ARCH): (armv8-m): Add FL2_CMSE. (armv8-m.mai

[PATCH 0/7, GCC, V8M] ARMv8-M Security Extensions

for cmse_nonsecure_{call,entry} functions, - only test Security Extensions for -mfpu=fpv5-d16 and fpv5-sp-d16 and only support single and double precision FPU's with d16. Bootstrapped and tested on arm-none-linux-gnueabihf and tested on arm-none-eabi with ARMv8-M Baseline and Mainline targets. Andre Vieira (7

[PATCHv2, PING][ARM] -mpure-code option for ARM

On 11/07/16 17:56, Andre Vieira (lists) wrote: > On 07/07/16 13:30, mickael guene wrote: >> Hi Andre, >> >> Another feedback on your purecode patch. >> You have to disable casesi pattern since then it will >> generate wrong code with -mpure-code option. >&

Re: [PATCHv2, ARM, libgcc] New aeabi_idiv function for armv6-m

On 11/07/16 18:09, Andre Vieira (lists) wrote: > On 06/07/16 11:52, Andre Vieira (lists) wrote: >> On 01/07/16 14:40, Ramana Radhakrishnan wrote: >>> >>> >>> On 13/10/15 18:01, Andre Vieira wrote: >>>> This patch ports the aeabi_idiv routine from Lin

Re: [PATCHv2, ARM, libgcc] New aeabi_idiv function for armv6-m

On 06/07/16 11:52, Andre Vieira (lists) wrote: > On 01/07/16 14:40, Ramana Radhakrishnan wrote: >> >> >> On 13/10/15 18:01, Andre Vieira wrote: >>> This patch ports the aeabi_idiv routine from Linaro Cortex-Strings >>> (https://git.linaro.o

[PATCHv2][ARM] -mpure-code option for ARM

) which will not work in our > case since 'Lx' label is put in an .rodata section. > So offset value is unknown and can be impossible > to encode correctly. > > Regards > Mickael > > On 06/30/2016 04:32 PM, Andre Vieira (lists) wrote: >> Hello, >> >> This

Re: [PATCHv2, ARM, libgcc] New aeabi_idiv function for armv6-m

On 01/07/16 14:40, Ramana Radhakrishnan wrote: > > > On 13/10/15 18:01, Andre Vieira wrote: >> This patch ports the aeabi_idiv routine from Linaro Cortex-Strings >> (https://git.linaro.org/toolchain/cortex-strings.git), which was contributed >> by ARM under Free

[PATCH][ARM] -mpure-code option for ARM

/ChangeLog: 2016-06-30 Andre Vieira <andre.simoesdiasvie...@arm.com> Terry Guo <terry@arm.com> * target.def (elf_flags_numeric): New target hook. * targhooks.h (default_asm_elf_flags_numeric): New. * varasm.c (default_asm_e

Re: [PING^5][PATCHv2, ARM, libgcc] New aeabi_idiv function for armv6-m

Ping. On 08/06/16 15:35, Andre Vieira (lists) wrote: > Ping. > > On 19/05/16 11:19, Andre Vieira (lists) wrote: >> Ping for GCC-7, patch applies cleanly, passed make check for cortex-m0. >> >> Might be worth mentioning that this patch has been used in three >>

[PATCH][ARM] Updating testcase unsigned-extend-2.c

target. Is this OK? Cheers, Andre gcc/ChangeLog 2016-06-21 Andre Vieira <andre.simoesdiasvie...@arm.com> * gcc.target/arm/unsigned-extend-2.c: Update testcase. >From 12da0a48045b37efb2e459116ec81cc7117a0981 Mon Sep 17 00:00:00 2001 From: Andre Simoes Dias Vieira <ands

[arm-embedded][committed] patch for PR61578

Hi Backported the following two patches to embedded-5-branch: https://gcc.gnu.org/ml/gcc-patches/2015-09/msg00096.html https://gcc.gnu.org/ml/gcc-patches/2015-09/msg02028.html Committed as revisions r237369 and r237371. gcc/ChangeLog.arm: 2016-06-13 Andre Vieira <andre.simoesdias

[GCC] Add aarch64 to zero_bits_compound testing

Hello, This patch adds aarch64*-*-* to the list of supported targets for the recently added zero bits compound tests. Tested for aarch64-none-elf and aarch64_be-none-elf. Is this OK? Cheers, Andre gcc/testsuite/ChangeLog 2016-06-10 Andre Vieira <andre.simoesdiasvie...@arm.

Re: [PING^4][PATCHv2, ARM, libgcc] New aeabi_idiv function for armv6-m

Ping. On 19/05/16 11:19, Andre Vieira (lists) wrote: > Ping for GCC-7, patch applies cleanly, passed make check for cortex-m0. > > Might be worth mentioning that this patch has been used in three > releases of the GNU ARM embedded toolchain, using GCC versions 4.9 and > 5, and

Re: [RFA 1/2]: Don't ignore target_header_dir when deciding inhibit_libc

On 07/04/16 10:30, Andre Vieira (lists) wrote: > On 17/03/16 16:33, Andre Vieira (lists) wrote: >> On 23/10/15 12:31, Bernd Schmidt wrote: >>> On 10/12/2015 11:58 AM, Ulrich Weigand wrote: >>>>

[PING^3][PATCHv2, ARM, libgcc] New aeabi_idiv function for armv6-m

Ping for GCC-7, patch applies cleanly, passed make check for cortex-m0. Might be worth mentioning that this patch has been used in three releases of the GNU ARM embedded toolchain, using GCC versions 4.9 and 5, and no issues have been reported so far. On 25/01/16 17:15, Andre Vieira (lists

Re: [patch] libstdc++/69703 ignore endianness in codecvt_utf8

On 20/04/16 18:40, Jonathan Wakely wrote: > On 19/04/16 19:07 +0100, Jonathan Wakely wrote: >> This was reported as a bug in the Filesystem library, but it's >> actually a problem in the codecvt_utf8 facet that it uses. > > The fix had a silly typo meaning it didn't work for big endian > targets,

[COMMITTED] Add myself as GCC maintainer

Hi, I have added myself to the "Write After Approval" maintainers list. Committed revision r234902. Cheers, Andre ChangeLog: 2016-04-12 Andre Vieira <andre.simoesdiasvie...@arm.com> * MAINTAINERS (Write After Approval): Add myself.

Re: [RFA 1/2]: Don't ignore target_header_dir when deciding inhibit_libc

On 17/03/16 16:33, Andre Vieira (lists) wrote: > On 23/10/15 12:31, Bernd Schmidt wrote: >> On 10/12/2015 11:58 AM, Ulrich Weigand wrote: >>> >>> Index: gcc/configure.ac >>> === >>

Re: [PATCH][Testsuite] Add --param sra-max-scalarization-size-Ospeed to sra-12.c

On 18/03/16 10:34, Andre Vieira (lists) wrote: > On 21/10/15 16:59, Jeff Law wrote: >> On 10/21/2015 09:52 AM, Alan Lawrence wrote: >>> gcc.dg/tree-ssa/sra-12.c is skipped on a bunch of targets, including >>> AArch64, >>> because the default max-scal

[PATCH 8/8, GCC, V8M][arm-embedded] Added support for ARMV8-M Security Extension cmse_nonsecure_caller intrinsic

Hi, Applied https://gcc.gnu.org/ml/gcc-patches/2015-12/msg02155.html on embedded-5-branch using included patch at revision r234589. *** gcc/ *** 2016-03-30 Andre Vieira<andre.simoesdiasvie...@arm.com> Thomas Preud'homme <thomas.preudho...@arm.com> * co

[PATCH 7/8, GCC, V8M][arm-embedded] ARMv8-M Security Extension's cmse_nonsecure_call: use __gnu_cmse_nonsecure_call

Hi, Applied https://gcc.gnu.org/ml/gcc-patches/2016-01/msg02334.html on embedded-5-branch using the included patch at revision r234587. *** gcc/ *** 2016-03-30 Andre Vieira<andre.simoesdiasvie...@arm.com> Thomas Preud'homme <thomas.preudho...@arm.com>

[PATCH 6/8, GCC, V8M][arm-embedded] Handling ARMv8-M Security Extension's cmse_nonsecure_call attribute

Hi, Applied https://gcc.gnu.org/ml/gcc-patches/2015-12/msg02153.html on embedded-5-branch using included patch at revision r234586. *** gcc *** 2016-03-30 Andre Vieira<andre.simoesdiasvie...@arm.com> Thomas Preud'homme <thomas.preudho...@arm.com> * conf

[PATCH v2, GCC, V8M 5/8][arm-embedded] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

Applied the patch in https://gcc.gnu.org/ml/gcc-patches/2016-03/msg01524.html on embedded-5-branch at revision r234585. Cheers, Andre

[PATCH 3/8, GCC, V8M][arm-embedded] Handling ARMv8-M Security Extension's cmse_nonsecure_entry attribute

Hi, Applied https://gcc.gnu.org/ml/gcc-patches/2015-12/msg02150.html on embedded-5-branch using the included patch at revision r234583. *** gcc *** 2016-03-30 Andre Vieira<andre.simoesdiasvie...@arm.com> Thomas Preud'homme <thomas.preudho...@arm.com>

[PATCHv2 1/8, GCC, V8M][arm-embedded] Add support for ARMv8-M's Security Extensions flag and intrinsics

Hi there, Applied https://gcc.gnu.org/ml/gcc-patches/2015-12/msg02148.html on embedded-5-branch using the included patch at revision r234582. Cheers, Andre *** gcc *** 2016-03-30 Andre Vieira<andre.simoesdiasvie...@arm.com> Thomas Preud'homme <thomas.preudho..

[RFC][PATCHv3, ARM 7/8] ARMv8-M Security Extension's cmse_nonsecure_call: use __gnu_cmse_nonsecure_call]

On 29/01/16 17:08, Andre Vieira (lists) wrote: > On 19/01/16 15:28, Andre Vieira (lists) wrote: >> On 16/01/16 14:49, Senthil Kumar Selvaraj wrote: >>> User-agent: mu4e 0.9.13; emacs 24.5.1 >>> >>> Hi, >>> >>> Apologies for the bad po

[RFC][PATCH v3, ARM 5/8] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

On 29/03/16 17:49, Andre Vieira (lists) wrote: > On 29/01/16 17:07, Andre Vieira (lists) wrote: >> On 26/12/15 01:54, Thomas Preud'homme wrote: >>> [Sending on behalf of Andre Vieira] >>> >>> Hello, >>> >>> This patch extends support for the

[arm-embedded]: Don't ignore target_header_dir when deciding inhibit_libc

On 17/03/16 16:33, Andre Vieira (lists) wrote: > On 23/10/15 12:31, Bernd Schmidt wrote: >> On 10/12/2015 11:58 AM, Ulrich Weigand wrote: >>> >>> Index: gcc/configure.ac >>> === >>

Re: [RFC][PATCH, ARM 0/8] ARMv8-M Security Extensions

On 26/12/15 01:39, Thomas Preud'homme wrote: > [Sending on behalf of Andre Vieira] > > Hello, > > This patch series aims at implementing an alpha status support for ARMv8-M's > Security Extensions. It is only posted as RFC at this stage. You can find the > specificatio

Re: [RFC][PATCH v2, ARM 5/8] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

On 29/01/16 17:07, Andre Vieira (lists) wrote: > On 26/12/15 01:54, Thomas Preud'homme wrote: >> [Sending on behalf of Andre Vieira] >> >> Hello, >> >> This patch extends support for the ARMv8-M Security Extensions >> 'cmse_nonsecure_entry' attribute to s

Re: [GCC][ARM] Skip tests that assume target supports arm mode, when testing M profiles

On 21/03/16 10:39, Ramana Radhakrishnan wrote: > On Thu, Mar 17, 2016 at 4:39 PM, Andre Vieira (lists) > <andre.simoesdiasvie...@arm.com> wrote: >> Hello, >> >> This patch skips four tests that assume a target supports ARM mode when >> testing M-profiles. &g

[GCC][ARM] Skip tests that assume target supports arm mode, when testing M profiles

Hello, This patch skips four tests that assume a target supports ARM mode when testing M-profiles. Tested it by running the four tests for A-profiles and M-profiles. Is this ok? Cheers, Andre gcc/testsuite/ChangeLog: 2016-03-17 Andre Vieira <andre.simoesdiasvieira@arm> * gcc/tes

Re: [RFA 1/2]: Don't ignore target_header_dir when deciding inhibit_libc

On 23/10/15 12:31, Bernd Schmidt wrote: > On 10/12/2015 11:58 AM, Ulrich Weigand wrote: >> >> Index: gcc/configure.ac >> === >> --- gcc/configure.ac(revision 228530) >> +++ gcc/configure.ac(working copy) >> @@ -1993,7 +1993,7

Re: Re: [PATCH][Testsuite] Add --param sra-max-scalarization-size-Ospeed to sra-12.c

On 21/10/15 16:59, Jeff Law wrote: > On 10/21/2015 09:52 AM, Alan Lawrence wrote: >> gcc.dg/tree-ssa/sra-12.c is skipped on a bunch of targets, including >> AArch64, >> because the default max-scalarization-size depends on MOVE_RATIO, and >> on those >> targets thus ends up being too small for SRA

Re: [PATCH][ARM][testsuite][committed] Do not override -mcpu in no-volatile-in-it.c

On 16/07/15 16:31, Kyrill Tkachov wrote: > Hi all, > > This scan-assembler test was failing for me when testing with an > explicit /-march=armv7-a variant because > it clashed with the -mcpu=cortex-m7 and overrode it. > > This patch skips the test if the user forces an incompatible -march or >

[Patch testsuite obvious][gcc-5] g++.dg/ext/pr57735.C should not run if the testsuite is explicitly passing -mfloat-abi=hard

On 09/06/15 14:07, James Greenhalgh wrote: > > Hi, > > g++.dg/ext/pr57735.C is failing for test runs which explicitly pass > -mfloat-abi=hard. Looking at the test, it seems the best fix would be > to check before adding -mfloat-abi=soft that we are not testing some other > float-abi. We also

[arm-embedded][PATCH][ARM] Make Cortex-R8 use ARMv7 multilib

On 09/03/16 16:55, Andre Vieira (lists) wrote: > Hi there, > > This patch adds cortex-r8 to the list of cores using the armv7 multilib. > > This patch is based on Thomas' multilib patch series: > https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01584.html > https://gcc.gnu.or

[arm-embedded][PATCH 2/2][GCC][ARM] Fix testcases after introduction of Cortex-R8

On 09/03/16 16:57, Andre Vieira (lists) wrote: > On 08/03/16 14:56, Kyrill Tkachov wrote: >> Hi Andre, >> >> On 08/03/16 11:05, Andre Vieira (lists) wrote: >>> On 03/03/16 11:28, Kyrill Tkachov wrote: >>>> Hi Andre, >>>> >&g

[arm-embedded][PATCH 1/2][GCC][ARM] Add support for Cortex-R8

On 02/03/16 12:20, Andre Vieira (lists) wrote: > > gcc/ChangeLog: > > 2016-03-02 Andre Vieira <andre.simoesdiasvie...@arm.com> > > * config/arm/arm-cores.def (cortex-r8): New. > * config/arm/arm-tables.opt (cortex-r8): New. > * config/arm/arm-tun

[arm-embedded][PATCH 2/2][GCC][ARM] Fix testcases after introduction of Cortex-R8

On 02/03/16 12:21, Andre Vieira (lists) wrote: > Hi, > > Tests used to check for "r8" which will not work because cortex-r8 > string is now included in the assembly. Fixed by checking for "[^\-]r8". > > Is this Ok? > > Cheers, > Andre > > g

Re: [PATCH 2/2][GCC][ARM] Fix testcases after introduction of Cortex-R8

On 09/03/16 17:03, Mike Stump wrote: > On Mar 9, 2016, at 8:57 AM, Andre Vieira (lists) > <andre.simoesdiasvie...@arm.com> wrote: >>> I'm seeing a DejaGNU error while testing >>> RUNTESTFLAGS="arm.exp=pr45701-*.c": >>> ERROR: (DejaGnu) proc &

Re: [PATCH 2/2][GCC][ARM] Fix testcases after introduction of Cortex-R8

On 08/03/16 14:56, Kyrill Tkachov wrote: > Hi Andre, > > On 08/03/16 11:05, Andre Vieira (lists) wrote: >> On 03/03/16 11:28, Kyrill Tkachov wrote: >>> Hi Andre, >>> >>> On 02/03/16 12:21, Andre Vieira (lists) wrote: >>>> Hi, >>>

[PATCH][ARM] Make Cortex-R8 use ARMv7 multilib

/msg01586.html Is this OK? 2016-03-09 Andre Vieira <andre.simoesdiasvie...@arm.com> * gcc/config/arm/t-baremetal: Add cortex-r8. diff --git a/gcc/config/arm/t-baremetal b/gcc/config/arm/t-baremetal index ffd29815e6ec22c747e77747ed9b69e0ae21b63a..6794b1cc02e73ca5b53a6350f09f9ae3afd171dc

Re: [PATCH 2/2][GCC][ARM] Fix testcases after introduction of Cortex-R8

On 03/03/16 11:28, Kyrill Tkachov wrote: > Hi Andre, > > On 02/03/16 12:21, Andre Vieira (lists) wrote: >> Hi, >> >> Tests used to check for "r8" which will not work because cortex-r8 >> string is now included in the assembly. Fixed by checking fo

Re: [Ping^2][PATCH][GCC-5] Fix "#pragma GCC pop_options" warning.

On 03/03/16 12:11, Bernd Schmidt wrote: > On 03/03/2016 11:45 AM, Andre Vieira (lists) wrote: >> On 29/02/16 10:47, Andre Vieira (lists) wrote: >>> On 15/02/16 10:33, Andre Vieira (lists) wrote: >>>> On 18/01/16 11:04, Andre Vieira (lists) wrote: >>&

Re: [Ping^2][PATCH][GCC-5] Fix "#pragma GCC pop_options" warning.

On 29/02/16 10:47, Andre Vieira (lists) wrote: > On 15/02/16 10:33, Andre Vieira (lists) wrote: >> On 18/01/16 11:04, Andre Vieira (lists) wrote: >>> Hi there, >>> >>> Can we have the "#pragma GCC pop_options" fix backported to GCC-5? >>> >

Re: [patch, testsuite, ARM] don't try to execute simd.exp tests on targets without NEON

On 21/05/15 10:01, Kyrill Tkachov wrote: > Hi Sandra, > > On 21/05/15 06:43, Sandra Loosemore wrote: >> This is another patch aimed at fixing bugs relating to trying to execute >> NEON code on a target that doesn't support it revealed by my >> arm-none-eabi testing on a gazillion different

[PATCH 2/2][GCC][ARM] Fix testcases after introduction of Cortex-R8

Hi, Tests used to check for "r8" which will not work because cortex-r8 string is now included in the assembly. Fixed by checking for "[^\-]r8". Is this Ok? Cheers, Andre gcc/testsuite/ChangeLog: 2016-03-02 Andre Vieira <andre.simoesdiasvie...@arm.com> *

[PATCH 1/2][GCC][ARM] Add support for Cortex-R8

gcc/ChangeLog: 2016-03-02 Andre Vieira <andre.simoesdiasvie...@arm.com> * config/arm/arm-cores.def (cortex-r8): New. * config/arm/arm-tables.opt (cortex-r8): New. * config/arm/arm-tune.md: Regenerate. * gcc/doc/invoke.texi: Add cortex-r8 to list of cpu values.

[PATCH 0/2][GCC][ARM] Add support for Cortex-R8

Hi there, This patch series adds support for the recently announced ARM core Cortex-R8. Andre Vieira(2) Add support for Cortex-R8 Fix testcases after introduction of Cortex-R8 Tested by comparing regression runs of Cortex-R7 vs Cortex-R8 for both ARM and THUMB modes. Is this OK? Cheers, Andre

Re: [Ping^2][PATCH][GCC-5] Fix "#pragma GCC pop_options" warning.

On 15/02/16 10:33, Andre Vieira (lists) wrote: On 18/01/16 11:04, Andre Vieira (lists) wrote: Hi there, Can we have the "#pragma GCC pop_options" fix backported to GCC-5? Patch found in https://gcc.gnu.org/ml/gcc-patches/2015-10/msg01261.html and was committed in r228794. The

[Ping][PATCH][GCC-5] Fix "#pragma GCC pop_options" warning.

On 18/01/16 11:04, Andre Vieira (lists) wrote: Hi there, Can we have the "#pragma GCC pop_options" fix backported to GCC-5? Patch found in https://gcc.gnu.org/ml/gcc-patches/2015-10/msg01261.html and was committed in r228794. The same patch applies cleanly to gcc-5, which would

Re: Fix PR69752, insn with REG_INC being removed as equiv_init insn

On 12/02/16 07:43, Jeff Law wrote: On 02/11/2016 06:28 PM, Bernd Schmidt wrote: This seems fairly straightforward: (insn 213 455 216 6 (set (reg:SI 266) (mem/u/c:SI (post_inc:SI (reg/f:SI 267)) [4 S4 A32])) 748 {*thumb1_movsi_insn} (expr_list:REG_EQUAL (const_int -1044200508

[PING] Re: [RFC][PATCH, ARM 8/8] Added support for ARMV8-M Security Extension cmse_nonsecure_caller intrinsic

On 26/12/15 01:59, Thomas Preud'homme wrote: [Sending on behalf of Andre Vieira] Hello, This patch adds support ARMv8-M's Security Extension's cmse_nonsecure_caller intrinsic. This intrinsic is used to check whether an entry function was called from a non-secure state. See Section 5.4.3

[PATCHv2] Re: [RFC][PATCH, ARM 7/8] ARMv8-M Security Extension's cmse_nonsecure_call: use __gnu_cmse_nonsecure_call]

On 19/01/16 15:28, Andre Vieira (lists) wrote: On 16/01/16 14:49, Senthil Kumar Selvaraj wrote: User-agent: mu4e 0.9.13; emacs 24.5.1 Hi, Apologies for the bad posting style (I don't have the original email handy), but shouldn't _gnu_cmse_nonsecure_call be defined with the .global directive

[PING] Re: [RFC][PATCH, ARM 5/8] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

On 26/12/15 01:54, Thomas Preud'homme wrote: [Sending on behalf of Andre Vieira] Hello, This patch extends support for the ARMv8-M Security Extensions 'cmse_nonsecure_entry' attribute to safeguard against leak of information through unbanked registers. When returning from a nonsecure entry

[PING] Re: [RFC][PATCH, ARM 6/8] Handling ARMv8-M Security Extension's cmse_nonsecure_call attribute

On 26/12/15 01:55, Thomas Preud'homme wrote: [Sending on behalf of Andre Vieira] Hello, This patch adds support for the ARMv8-M Security Extensions 'cmse_nonsecure_call' attribute. This attribute may only be used for function types and when used in combination with the '-mcmse' compilation

[PING] Re: [RFC][PATCH, ARM 3/8] Handling ARMv8-M Security Extension's cmse_nonsecure_entry attribute

On 26/12/15 01:47, Thomas Preud'homme wrote: [Sending on behalf of Andre Vieira] Hello, This patch adds support for the ARMv8-M Security Extensions 'cmse_nonsecure_entry' attribute. In this patch we implement the attribute handling and diagnosis around the attribute. See Section 5.4 of ARM

Re: [RFC][PATCH , ARM 2/8] Add RTL patterns for thumb1 push/pop

On 26/12/15 01:45, Thomas Preud'homme wrote: [Sending on behalf of Andre Vieira] Hello, This patch adds RTL patterns for the push and pop instructions for thumb1. These are needed by subsequent patches in the series. *** gcc/ChangeLog *** 2015-10-27 Andre Vieira<andre.simoesdias

[PATCHv2] Re: [RFC][PATCH, ARM 1/8] Add support for ARMv8-M's Security Extensions flag and intrinsics

On 05/01/16 14:38, Andre Vieira wrote: On 31/12/15 20:54, Joseph Myers wrote: On Sat, 26 Dec 2015, Thomas Preud'homme wrote: +#define CMSE_TT_ASM(flags) \ +{ \ + cmse_address_info_t result; \ + __asm__ ("tt" # flags " %0,%1" \ + : "=r"(result) \ +

[PING] Re: [RFC][PATCH, ARM 4/8] ARMv8-M Security Extension's cmse_nonsecure_entry: __acle_se label and bxns return

On 26/12/15 01:52, Thomas Preud'homme wrote: [Sending on behalf of Andre Vieira] Hello, This patch extends support for the ARMv8-M Security Extensions 'cmse_nonsecure_entry' attribute in two ways: 1) Generate two labels for the function, the regular function name and one with the function's

Re: [PING^2][PATCHv2, ARM, libgcc] New aeabi_idiv function for armv6-m

Ping. On 27/10/15 17:03, Andre Vieira wrote: Ping. BR, Andre On 13/10/15 18:01, Andre Vieira wrote: This patch ports the aeabi_idiv routine from Linaro Cortex-Strings (https://git.linaro.org/toolchain/cortex-strings.git), which was contributed by ARM under Free BSD license. The new

Re: [Ping^3][PATCH][GCC][ARM] testcase memset-inline-10.c uses -mfloat-abi=hard but does not check whether target supports it

On 05/01/16 17:40, Andre Vieira wrote: On 27/11/15 14:28, Andre Vieira wrote: On 12/11/15 15:16, Andre Vieira wrote: On 12/11/15 15:08, Andre Vieira wrote: Hi, This patch changes the memset-inline-10.c testcase to make sure that it is only compiled for ARM targets that support -mfloat-abi

Re: [RFC][PATCH, ARM 7/8] ARMv8-M Security Extension's cmse_nonsecure_call: use __gnu_cmse_nonsecure_call]

On 16/01/16 14:49, Senthil Kumar Selvaraj wrote: User-agent: mu4e 0.9.13; emacs 24.5.1 Hi, Apologies for the bad posting style (I don't have the original email handy), but shouldn't _gnu_cmse_nonsecure_call be defined with the .global directive in the below hunk (to make it visible when

[PATCH][GCC-5] Fix "#pragma GCC pop_options" warning.

Hi there, Can we have the "#pragma GCC pop_options" fix backported to GCC-5? Patch found in https://gcc.gnu.org/ml/gcc-patches/2015-10/msg01261.html and was committed in r228794. The same patch applies cleanly to gcc-5, which would otherwise not be able to use this pragma even though the

Re: [PATCH] Fix math transformation on targets without c99 math functions

On 11/01/16 16:39, Jakub Jelinek wrote: On Mon, Jan 11, 2016 at 05:11:21PM +0100, Christophe Lyon wrote: I tested a similar version on my side. It just makes the test become UNSUPPORTED for arm/aarch64 + newlib. They used to pass, though. Is anything bad on that? The test tests functions

Re: [Ping^2][PATCH][GCC][ARM] testcase memset-inline-10.c uses -mfloat-abi=hard but does not check whether target supports it

On 27/11/15 14:28, Andre Vieira wrote: On 12/11/15 15:16, Andre Vieira wrote: On 12/11/15 15:08, Andre Vieira wrote: Hi, This patch changes the memset-inline-10.c testcase to make sure that it is only compiled for ARM targets that support -mfloat-abi=hard using the fact that all non-thumb1

Re: [RFC][PATCH, ARM 1/8] Add support for ARMv8-M's Security Extensions flag and intrinsics

On 31/12/15 20:54, Joseph Myers wrote: On Sat, 26 Dec 2015, Thomas Preud'homme wrote: +#define CMSE_TT_ASM(flags) \ +{ \ + cmse_address_info_t result; \ + __asm__ ("tt" # flags " %0,%1" \ + : "=r"(result) \ + : "r"(p) \ + : "memory"); \ + return result; \ Are

Re: [PATCH][GCC] Make stackalign test LTO proof

On 17/11/15 16:30, Andre Vieira wrote: On 17/11/15 12:29, Bernd Schmidt wrote: On 11/16/2015 04:48 PM, Andre Vieira wrote: On 16/11/15 15:34, Joern Wolfgang Rennecke wrote: I just happened to stumble on this problem with another port. The volatile & test solution doesn't work, though.

Re: [Ping][PATCH][GCC][ARM] testcase memset-inline-10.c uses -mfloat-abi=hard but does not check whether target supports it

On 12/11/15 15:16, Andre Vieira wrote: On 12/11/15 15:08, Andre Vieira wrote: Hi, This patch changes the memset-inline-10.c testcase to make sure that it is only compiled for ARM targets that support -mfloat-abi=hard using the fact that all non-thumb1 targets do. This is correct because

Re: [PATCH][GCC][ARM] Disable neon testing for armv7-m

Hi Kyrill On 20/11/15 11:51, Kyrill Tkachov wrote: Hi Andre, On 18/11/15 09:44, Andre Vieira wrote: On 17/11/15 10:10, James Greenhalgh wrote: On Mon, Nov 16, 2015 at 01:15:32PM +, Andre Vieira wrote: On 16/11/15 12:07, James Greenhalgh wrote: On Mon, Nov 16, 2015 at 10:49:11AM +

Re: [PATCH][GCC][ARM] Disable neon testing for armv7-m

On 17/11/15 10:10, James Greenhalgh wrote: On Mon, Nov 16, 2015 at 01:15:32PM +, Andre Vieira wrote: On 16/11/15 12:07, James Greenhalgh wrote: On Mon, Nov 16, 2015 at 10:49:11AM +, Andre Vieira wrote: Hi, This patch changes the target support mechanism to make it recognize any

Re: [PATCH][GCC] Make stackalign test LTO proof

On 17/11/15 12:29, Bernd Schmidt wrote: On 11/16/2015 04:48 PM, Andre Vieira wrote: On 16/11/15 15:34, Joern Wolfgang Rennecke wrote: I just happened to stumble on this problem with another port. The volatile & test solution doesn't work, though. What does work, however, is: __a

[embedded-5-branch][PATCH 0/2] Backporting algorithmic optimization and testcase change

This series is aimed at backporting algorithmic optimizations and a change to a test it affects from trunk to the embedded-5-branch. Andre Vieira(2): Backporting algorithmic optimization in match and simplify Backporting fix for PR-67948.

[embedded-5-branch][PATCH 2/2]Backporting fix for PR-67948.

This patch backports the fix for PR-67948 from trunk to the embedded-5-branch. The original patch is at: https://gcc.gnu.org/ml/gcc-patches/2015-10/msg02193.html Tested for Cortex-M3. Is this OK to commit? Thanks, Andre gcc/testsuite/ChangeLog 2015-10-27 Andre Vieira <andre.simoesdias

[embedded-5-branch][PATCH 1/2] Backporting algorithmic optimization in match and simplify

1493.html (for the first optimization and changes to second and third) https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00517.html (the addition of the original second and third optimizations) gcc/ChangeLog: 2015-11-27 Andre Vieira <andre.simoesdiasvie...@arm.com> Backport from mainline: 20

Re: [PATCH][GCC] Make stackalign test LTO proof

On 16/11/15 15:34, Joern Wolfgang Rennecke wrote: I just happened to stumble on this problem with another port. The volatile & test solution doesn't work, though. What does work, however, is: __asm__ ("" : : "" (dummy)); I can confirm that Joern's solution works for me too.

Re: [PATCH][GCC] Make stackalign test LTO proof

On 16/11/15 13:33, Richard Biener wrote: On Mon, Nov 16, 2015 at 12:43 PM, Andre Vieira <andre.simoesdiasvie...@arm.com> wrote: On 13/11/15 10:34, Richard Biener wrote: On Thu, Nov 12, 2015 at 4:07 PM, Andre Vieira <andre.simoesdiasvie...@arm.com> wrote: Hi, This p

Re: [PATCH][GCC][ARM] Disable neon testing for armv7-m

On 16/11/15 12:07, James Greenhalgh wrote: On Mon, Nov 16, 2015 at 10:49:11AM +, Andre Vieira wrote: Hi, This patch changes the target support mechanism to make it recognize any ARM 'M' profile as a non-neon supporting target. The current check only tests for armv6 architectures

Re: [PATCH][GCC] Make stackalign test LTO proof

On 13/11/15 10:34, Richard Biener wrote: On Thu, Nov 12, 2015 at 4:07 PM, Andre Vieira <andre.simoesdiasvie...@arm.com> wrote: Hi, This patch changes this testcase to make sure LTO will not optimize away the assignment of the local array to a global variable which was introduced t

[PATCH][GCC][ARM] Disable neon testing for armv7-m

neon and the current test is not sufficient to exclude armv7-m. Tested by running regressions for this testcase for various ARM targets. Is this OK to commit? Thanks, Andre Vieira gcc/testsuite/ChangeLog: 2015-11-06 Andre Vieira <andre.simoesdiasvie...@arm.com>

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