Yes, it gives small improvements(~2%) on 557.xz on O2 and on
548.exchange(~2.5%) and 500.perlbench(~1%) on Ofast in rate mode.
> -Original Message-
> From: Uros Bizjak [mailto:ubiz...@gmail.com]
> Sent: Thursday, July 19, 2018 8:12 AM
> To: Koval, Julia
> Cc: GCC Patches
Hi,
This patch improves memset/memcpy strategy for Skylake. Ok for trunk?
* gcc/config/i386/x86-tune-costs.h (skylake_memcpy,
skylake_memcpy): Replace rep_prefix with unrolling on 512.
Thanks,
Julia
0001-memset.patch
Description: 0001-memset.patch
Hi,
This patch should fix the issue. Ok for trunk?
gcc/testsuite/
* gcc.target/i386/avx512vl-vpclmulqdq-2.c: Remove 128bit version.
Thanks,
Julia
> -Original Message-
> From: H.J. Lu [mailto:hjl.to...@gmail.com]
> Sent: Tuesday, June 12, 2018 1:27 PM
> To: Koval,
Hi,
Since pre-Icelake ISA already had 128bit version vpclmul and vaes, we already
have intrinsics for them(_mm_aesdec_si128, _mm_aesdeclast_si128,
_mm_aesenc_si128, _mm_aesenclast_si128, _mm_clmulepi64_si128). Therefore
intrinsics for them, introduced with Icelake instructions are redundant. Th
Hi,
This patch adds 2 tuning options to -march=skylake-avx512. Ok for trunk?
gcc/
PR target/84413
* config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL,
X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Add m_SKYLAKE_AVX512.
Thanks,
Julia
0001-pts.pa
Hi,
This patch adds 2 tuning options for -mtune=skylake-avx512. Ok for trunk?
gcc/
* x86-tune.def (movx, partial_reg_dependency): Enable for
m_SKYLAKE_AVX512.
Thanks,
Julia
0001-ptc.patch
Description: 0001-ptc.patch
Gentle ping.
> -Original Message-
> From: Koval, Julia
> Sent: Monday, February 12, 2018 10:57 AM
> To: Kirill Yukhin
> Cc: 'GCC Patches'
> Subject: RE: [x86,avx] Fix __builtin_cpu_supports for icelake and cannonlake
> isa
>
> Hi,
>
> The
.
* gcc.target/i386/funcspec-56.inc: Ditto.
libgcc/
* config/i386/cpuinfo.h (processor_subtypes): Split up icelake on
icelake
client and icelake-server.
Thanks,
Julia
> -Original Message-
> From: Koval, Julia
> Sent: Tuesday, March 13, 2018 8:42 AM
> To: Joseph
): Split up icelake on
icelake
client and icelake-server.
Thanks,
Julia
> -Original Message-
> From: Joseph Myers [mailto:jos...@codesourcery.com]
> Sent: Monday, March 12, 2018 10:21 PM
> To: Koval, Julia
> Cc: 'GCC Patches' ; Uros Bizjak
>
> Sub
Hi,
This patch introduces separate client and server arch options instead of
-march=icelake. Ok for trunk?
Thanks,
Julia
gcc/
* config.gcc (icelake-client, icelake-server): New.
(icelake): Remove.
* config/i386/i386.c (initial_ix86_tune_features): Extend to 64 bit.
Hi,
This is small fix for documentation - it adds CLWB to skylake-avx512 and
removes it from cannonlake.
gcc/
* doc/invoke.texi (Skylake Server): Add CLWB.
(Cannonlake): Remove CLWB.
Thanks,
Julia
doc_patch_16.2.18
Description: doc_patch_16.2.18
In latest ISE extensions document
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
CLWB was removed from Cannonlake. This patch removes it from GCC. Ok for trunk?
Thanks,
Julia
gcc/
* config/i386/i386.c (ix86_
Hi,
There is no PR for this. This builtin was just missing for all new cpus.
Thanks,
Julia
> -Original Message-
> From: Kirill Yukhin [mailto:kirill.yuk...@gmail.com]
> Sent: Monday, February 12, 2018 7:19 AM
> To: Koval, Julia
> Cc: 'GCC Patches'
>
.inc: Handle new march.
* g++.dg/ext/mv16.C: Ditto.
libgcc/
* config/i386/cpuinfo.h (processor_subtypes): Add INTEL_COREI7_ICELAKE.
Thanks,
Julia
> -Original Message-
> From: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Tuesday, January 30, 2018 9:47 AM
> To:
nal Message-
> From: Richard Biener [mailto:rguent...@suse.de]
> Sent: Wednesday, January 24, 2018 12:18 PM
> To: Koval, Julia
> Cc: Jakub Jelinek ; Uros Bizjak ; GCC
> Patches ; Kirill Yukhin
> Subject: RE: [patch][x86] -march=icelake
>
> On Wed, 24 Jan 2018, Koval, Julia w
-mavx512bw.
* gcc.target/i386/i386.exp: Fix types.
Thanks,
Julia
> -Original Message-
> From: Kirill Yukhin [mailto:kirill.yuk...@gmail.com]
> Sent: Saturday, January 20, 2018 11:49 AM
> To: Koval, Julia
> Cc: 'Jakub Jelinek' ; 'Uros Bizjak' ;
>
: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Wednesday, January 24, 2018 12:06 PM
> To: Uros Bizjak ; Richard Biener
> Cc: Koval, Julia ; GCC Patches patc...@gcc.gnu.org>; Kirill Yukhin
> Subject: Re: [patch][x86] -march=icelake
>
> On Wed, Jan 24, 2018 at 12:00:26PM +0100, Uros
Yes, you are right, any() is not required. Here is the patch.
Thanks,
Julia
> -Original Message-
> From: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Monday, January 22, 2018 12:36 PM
> To: Koval, Julia
> Cc: Richard Biener ; Uros Bizjak
> ; GCC Patches ; Kirill Y
lto:ja...@redhat.com]
> Sent: Tuesday, December 19, 2017 2:50 PM
> To: Koval, Julia
> Cc: Richard Biener ; Uros Bizjak
> ; GCC Patches ; Kirill Yukhin
>
> Subject: Re: [patch][x86] -march=icelake
>
> On Tue, Dec 19, 2017 at 12:34:03PM +, Koval, Julia wrote:
> >
Fix bug, when rdpid intrinsic used eax instead of rax in 64bit mode. Ok for
trunk?
gcc/
* config/i386/i386.c (ix86_expand_builtin): Handle IX86_BUILTIN_RDPID.
* config/i386/i386.md (rdpid_rex64) New.
(rdpid): Make 32bit only.
gcc/testsuite/
* gcc.target/i386/rdpid
Hi,
This patch fixes subj. Ok for trunk?
gcc/
* config/i386/i386.c (F_AVX512VBMI2, F_GFNI, F_VPCLMULQDQ, F_AVX512VNNI,
F_AVX512BITALG): New.
gcc/testsuite/
* gcc.target/i386/builtin_target.c (check_intel_cpu_model): Add
cannonlake.
(check_features): Add avx512vbmi
.
* gcc.target/i386/i386.exp: Fix types.
> -Original Message-
> From: Koval, Julia
> Sent: Wednesday, January 10, 2018 11:51 AM
> To: 'Jakub Jelinek' ; 'Kirill Yukhin'
> ; 'Uros Bizjak'
> Cc: 'GCC Patches'
> Subject: RE: [PAT
Hi,
What do you think about changing these types to UHI_FTYPE_V16QI_V16QI_UHI and
so on?
In docs it is (KL, VL) = (16,128), (32,256), (64, 512) - so looks like this is
where the error was from the start.
Here is the patch.
Thanks,
Julia
> -Original Message-
> From: Koval, Julia
] 214)
> (match_operand:QI 3 ("register_operand") ("Yk"
> (incorrect, should use :DI result and :DI mask input). Similarly the
> non-masked patterns, where just the result is incorrect, not the operand 3
> which doesn't exist). I'll file a
ap set to ones(which
doesn't look fast)?
Sorry, I think there should be some obvious solution, but can't find a proper
function.
Thanks,
Julia
> -Original Message-
> From: Richard Biener [mailto:richard.guent...@gmail.com]
> Sent: Tuesday, December 19, 2017 12:56 PM
>
t; -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Uros Bizjak
> Sent: Sunday, November 12, 2017 5:30 PM
> To: Koval, Julia
> Cc: GCC Patches ; Kirill Yukhin
>
> Subject: Re: [patch][x86] -march=icelake
>
Here is the patch to update these files with my contributions. Ok for trunk?
Thanks,
Julia
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Gerald Pfeifer
> Sent: Tuesday, December 12, 2017 11:34 AM
> To: Kov
Sorry,
gcc/
* config/i386/i386.c (PTA_SKYLAKE_AVX512): Add PTA_CLWB.
(PTA_CANNONLAKE): Remove PTA_CLWB.
Thanks,
Julia
> -Original Message-
> From: Uros Bizjak [mailto:ubiz...@gmail.com]
> Sent: Monday, December 11, 2017 9:47 AM
> To: Koval, Julia
>
Looks good. How to put it there(sorry, noob question)?
Thanks,
Julia
> -Original Message-
> From: Gerald Pfeifer [mailto:ger...@pfeifer.com]
> Sent: Saturday, December 09, 2017 2:49 PM
> To: Koval, Julia
> Cc: Kirill Yukhin ; GCC Patches patc...@gcc.gnu.org>
> Subj
Hi Uros, Kirill,
According to isa-extensions doc CLWB appeared first in Skylake-avx512, but it
isn't in the PTA. This patch fixes it. Ok for trunk?
Thanks,
Julia
0001-i386.patch
Description: 0001-i386.patch
Sent: Sunday, December 03, 2017 6:51 PM
> To: Koval, Julia ; Kirill Yukhin
>
> Cc: GCC Patches
> Subject: Re: [PATCH][i386,AVX] Enable VBMI2 support [5/7]
>
> Hi Julia, hi Kirill,
>
> On Tue, 24 Oct 2017, Koval, Julia wrote:
> > This patch enables VPSHRD in
Hi, here is the followup patch. Ok for trunk?
gcc/c-family/
* c-common.h (inv_list): Remove.
Thanks,
Julia
> -Original Message-
> From: Jeff Law [mailto:l...@redhat.com]
> Sent: Monday, November 27, 2017 6:50 PM
> To: Koval, Julia ; Joseph Myers
>
> Cc: J
2017-11-28 Julia Koval
* MAINTAINERS (write after approval): Add myself.
Sorry, I think in this version of this patch they are fixed.
> -Original Message-
> From: Joseph Myers [mailto:jos...@codesourcery.com]
> Sent: Wednesday, November 22, 2017 6:23 PM
> To: Koval, Julia
> Cc: Jeff Law ; Jakub Jelinek ; GCC
> Patches
> Subject: RE: [pa
Added fix for gcc/doc/sourcebuild.texi
> -Original Message-
> From: Koval, Julia
> Sent: Wednesday, November 22, 2017 10:15 AM
> To: Rainer Orth
> Cc: Jeff Law ; Jakub Jelinek ; GCC
> Patches
> Subject: RE: [patch] remove cilk-plus
>
> Changes for these f
, 2017 10:11 AM
> To: Koval, Julia
> Cc: Jeff Law ; Jakub Jelinek ; GCC
> Patches
> Subject: Re: [patch] remove cilk-plus
>
> Hi Julia,
>
> >> So it's not important, but the patch doesn't have the removal of the
> >> cilk+ testsuite or runtime.
m]
> Sent: Tuesday, November 21, 2017 8:41 AM
> To: Koval, Julia ; Jakub Jelinek
> Cc: GCC Patches
> Subject: Re: [patch] remove cilk-plus
>
> On 11/16/2017 10:02 AM, Koval, Julia wrote:
> > Thanks for your comments, fixed it.
> >
> > 2017-11-16 Julia Koval
Hi, this patch introduces separate cost model for skylake-avx512. Ok for trunk?
gcc/
* config/i386/i386.c (processor_target_table): Add skylake_cost for
skylake-avx512.
* config/i386/x86-tune-costs.h (skylake_memcpy, skylake_memset,
skylake_cost): New.
Thanks,
Julia
vember 16, 2017 4:49 PM
> To: Koval, Julia
> Cc: GCC Patches ; l...@redhat.com
> Subject: Re: [patch] remove cilk-plus
>
> On Thu, Nov 16, 2017 at 03:33:40PM +, Koval, Julia wrote:
> > // I failed to send patch itself, it is too big even in gzipped form. What
> >
// I failed to send patch itself, it is too big even in gzipped form. What is
the right way to send such big patches?
Hi, this patch removes cilkplus. Ok for trunk?
2017-11-16 Julia Koval
Sebastian Peryt
gcc/
* Makefile.def (target_modules): Remove libcilkrts.
Hi, this patch fix GFNI check which didn't work properly in gfni+sse case.
gcc/
* config/i386/gfniintrin.h: Add sse check.
* config/i386/i386.c (ix86_expand_builtin): Fix gfni check.
0001-fix-gfni.patch
Description: 0001-fix-gfni.patch
Didn't get in the list for some reason.
> -Original Message-
> From: Koval, Julia
> Sent: Tuesday, November 14, 2017 10:29 AM
> To: GCC Patches
> Cc: Kirill Yukhin
> Subject: [x86,avx][patch] Fix PR82983
>
> Hi, this patch fix GFNI check which didn
Hi, here is followup patch to add skylake-avx512.
gcc/
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
skylake-avx512.
> -Original Message-
> From: Uros Bizjak [mailto:ubiz...@gmail.com]
> Sent: Sunday, November 12, 2017 5:05 PM
> To: Koval, Julia
>
Hi, this patch enables AVX512BITALG and AVX512VPOPCNTDQ instructions from
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf.
Ok for trunk?
Thanks,
Julia
Julia Koval
Sebastian Peryt
gcc/
* common/config/i386/
Hi, this patch adds new option -march=icelake. Isasets defined in:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
I didn't add arch code to driver-i386.c, because there is no code available in
SDM yet, only for cannon
ber 08, 2017 8:45 PM
> To: Koval, Julia
> Cc: GCC Patches ; Kirill Yukhin
>
> Subject: Re: [x86][patch] Add -march=cannonlake.
>
> On Wed, Nov 8, 2017 at 9:02 AM, Koval, Julia wrote:
> > Attachment got lost.
> >
> >> -Original Message-
> >> F
Hi, this patch enables VPCLMULQDQ instruction from VPCLMULQDQ isaset, defined
here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* common/config/i386/i386-common.c (OPTION_
Hi, this patch enables VAESENC instruction from VAES isaset, defined here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config/i386/i386-builtin.def (__builtin_ia32_vaesen
Hi, this patch enables VAESENC instruction from VAES isaset, defined here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config/i386/i386-builtin.def (__builtin_ia32_vaesen
Patch attached.
> -Original Message-
> From: Koval, Julia
> Sent: Wednesday, November 08, 2017 1:38 PM
> To: 'GCC Patches'
> Cc: 'Kirill Yukhin'
> Subject: [PATCH][i386,AVX] Enable VAES support [3/5]
>
> Hi, this patch enables VAESDECLAS
Hi, this patch enables VAESDECLAST instruction from VAES isaset, defined here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config/i386/i386-builtin.def (__builtin_ia32_va
Hi, this patch enables VAESDEC instruction from VAES isaset, defined here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config.gcc: Add vaesintrin.h.
* config/i386
Attachment got lost.
> -Original Message-
> From: Koval, Julia
> Sent: Wednesday, November 08, 2017 9:01 AM
> To: 'GCC Patches'
> Cc: 'Uros Bizjak' ; 'Kirill Yukhin'
>
> Subject: RE: [x86][patch] Add -march=cannonlake.
>
>
Hi, this patch adds new option -march=cannonlake. Isasets defined in:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
gcc/
* config.gcc: Add -march=cannonlake.
* config/i386/driver-i386.c
tests.
* gcc.target/i386/sse-23.c: Handle new tests.
> -Original Message-
> From: Koval, Julia
> Sent: Tuesday, October 17, 2017 3:26 PM
> To: Jakub Jelinek
> Cc: GCC Patches ; Kirill Yukhin
>
> Subject: RE: [patch][i386, AVX] GFNI enabling [3/4]
>
&g
,
__builtin_ia32_vgf2p8affineinvqb_v16qi_mask): Move to ARGS array.
> -Original Message-
> From: Koval, Julia
> Sent: Friday, November 03, 2017 9:27 AM
> To: 'Jakub Jelinek'
> Cc: 'Kirill Yukhin' ; 'GCC Patches' patc...@gcc.gnu.org>
> Subject: RE: [patch][x86] GFNI enabling
/AVX/SSE belong to isa_flags, so we can't keep them in the same field.
There are candidates, which can be moved from isa_flags to isa_flags2 instead
of GFNI, because there are no dependencies on other flags, but it is only a
short term solution.
> -Original Message-
> From:
-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Jakub Jelinek
> Sent: Tuesday, October 31, 2017 8:28 PM
> To: Koval, Julia
> Cc: Kirill Yukhin ; GCC Patches patc...@gcc.gnu.org>
> Subject: Re: [patch][x86] GFNI enabling [2/4]
&
Hi,
This patch enables VAES isaset option. The doc for isaset and instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_
.
* config/i386/i386.opt (mavx512vbmi2): New option.
* doc/invoke.texi: Add new option.
> -Original Message-
> From: Joseph Myers [mailto:jos...@codesourcery.com]
> Sent: Wednesday, October 25, 2017 12:40 AM
> To: Koval, Julia
> Cc: GCC Patches ; Kirill Yukhin
&
Hi,
This patch enables VPDPWSSDS instruction. The doc for isaset and instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config/i386/avx512vnniintrin.h (_mm512_dpws
Hi,
This patch enables VPDPWSSD instruction. The doc for isaset and instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config/i386/avx512vnniintrin.h (_mm512_dpwss
Hi,
This patch enables VPDPBUSDS instruction. The doc for isaset and instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config/i386/avx512vnniintrin.h (_mm512_dpbu
Hi,
This patch enables VPDPBUSD instruction, also it contains builtins and md
patterns for other VNNI instructions. The doc for isaset and instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Th
Hi,
This patch enables VNNI isaset option. The doc for isaset and instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_
Hi,
This patch enables VPSHRDV instruction. The doc for isaset and instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
gcc/
config/i386/avx512vbmi2intrin.h (_mm512_shldv_epi16,
_
Hi,
This patch enables VPSHRDV instruction. The doc for isaset and instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
gcc/
config/i386/avx512vbmi2intrin.h (_mm512_shrdv_epi16,
_
Attached the patch
> -Original Message-
> From: Koval, Julia
> Sent: Tuesday, October 24, 2017 12:01 PM
> To: GCC Patches
> Cc: Kirill Yukhin
> Subject: [PATCH][i386,AVX] Enable VBMI2 support [5/7]
>
> Hi,
> This patch enables VPSHRD instruction. The doc
Hi,
This patch enables VPSHRD instruction. The doc for isaset and instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
gcc/
config/i386/avx512vbmi2intrin.h (_mm512_shrdi_epi16,
_m
Hi,
This patch enables VPSHLD instruction. The doc for isaset and instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
gcc/
config/i386/avx512vbmi2intrin.h (_mm512_shldi_epi16,
_m
Hi,
This patch enables VPEXPANDB[W] instruction. The doc for isaset and
instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
gcc/
config/i386/avx512vbmi2intrin.h (_mm512_mask_expand_epi8
Hi,
This patch enables VPCOMPRESSB[W] instruction. The doc for isaset and
instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
gcc/
config.gcc (avx512vbmi2intrin.h, avx512vbmi2vlintrin):
Hi,
This patch enables VBMI2 isaset option. The doc for isaset and instruction:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
common/config/i386/i386-common.c (OPTION_MASK_I
age-
> From: Koval, Julia
> Sent: Tuesday, October 17, 2017 3:21 PM
> To: GCC Patches
> Cc: Kirill Yukhin
> Subject: [patch][i386, AVX] GFNI enabling [4/4]
>
> Hi,
> This the fourth patch of GFNI ISASET enabling. It enables GF2P8MULB
> instruction, described here
.
> -Original Message-
> From: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Tuesday, October 17, 2017 3:15 PM
> To: Koval, Julia
> Cc: GCC Patches ; Kirill Yukhin
>
> Subject: Re: [patch][i386, AVX] GFNI enabling [3/4]
>
> On Tue, Oct 17, 2017 at 01:09:50P
Hi,
This the fourth patch of GFNI ISASET enabling. It enables GF2P8MULB
instruction, described here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
gcc/
* config/i386/gfniintrin.h (_mm_gf2p8mul_epi8, _mm256_g
Hi, this the third patch of GFNI ISASET enabling. It enables GF2P8AFFINE
instruction, described here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
gcc/
* config/i386/gfniintrin.h (_mm_gf2p8affine_epi64_epi8
Hi, this is the second patch of enabling GFNI ISASET. It adds GF2P8AFFINEINV
instruction.
The instruction is described here:
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
gcc/
* config.gcc: Add gfniintrin.h.
Sorry, fixed that.
Thanks,
Julia
> -Original Message-
> From: Jakub Jelinek [mailto:ja...@redhat.com]
> Sent: Friday, October 13, 2017 9:08 AM
> To: Koval, Julia
> Cc: GCC Patches ; Uros Bizjak
> ; Kirill Yukhin
> Subject: Re: [x86] GFNI enabling[1/4]
>
> On
Hi,
gcc/
* gcc/common/config/i386/i386-common.c (OPTION_MASK_ISA_GFNI_SET,
(OPTION_MASK_ISA_GFNI_UNSET): New.
(ix86_handle_option): Handle OPT_mgfni.
* gcc/config/i386/cpuid.h (bit_GFNI): New.
* gcc/config/i386/driver-i386.c (host_detect_local_cpu): Detect g
Hi,
This patch removes old parallel code for avx512er. Parallel in this case can't
be generated anymore, because all existing patterns were reworked to unspec in
r249423 and r249009. Ok for trunk?
gcc/
* gcc/config/i386/i386.c (ix86_erase_embedded_rounding):
Remove code for old r
combined then).
Added other changes.
Thanks,
Julia
> -Original Message-
> From: Uros Bizjak [mailto:ubiz...@gmail.com]
> Sent: Wednesday, June 14, 2017 11:54 AM
> To: Koval, Julia
> Cc: Richard Biener ; Jakub Jelinek
> ; H.J. Lu ; GCC Patches patc...@gcc.gnu.or
lia
> -Original Message-
> From: Richard Biener [mailto:richard.guent...@gmail.com]
> Sent: Tuesday, June 13, 2017 10:09 AM
> To: Koval, Julia
> Cc: Jakub Jelinek ; H.J. Lu ; GCC
> Patches ; Uros Bizjak ; Kirill
> Yukhin
> Subject: Re: [PATCH][X86] Fix rounding
, 2017 6:18 PM
> To: H.J. Lu
> Cc: Koval, Julia ; GCC Patches patc...@gcc.gnu.org>; Uros Bizjak ; Kirill Yukhin
>
> Subject: Re: [PATCH][X86] Fix rounding pattern similar to PR73350
>
> On Mon, Jun 12, 2017 at 09:08:00AM -0700, H.J. Lu wrote:
> > On Mon, Jun 12, 2017
n CSE.
> -Original Message-
> From: H.J. Lu [mailto:hjl.to...@gmail.com]
> Sent: Monday, June 12, 2017 3:43 PM
> To: Koval, Julia
> Cc: GCC Patches ; Uros Bizjak
> ; Kirill Yukhin
> Subject: Re: [PATCH][X86] Fix rounding pattern similar to PR73350
>
> On Mon
This is the same issue as PR73350 and PR80862 for disabling FP exceptions.
gcc -O0 -mavx512f -mavx512er returns exception
gcc -O2 -mavx512f -mavx512er returns nan
For this code:
#include
#include
#include
#include
#include
int main(int argc, char *argv[]) {
__m512 a = _mm512_set1_ps((f
Hi,
These patch adds these 9 new intrinsics. Ok for trunk?
gcc/
* config/i386/avx512bwintrin.h (_mm512_mask_cvtepi16_storeu_epi8,
_mm512_mask_cvtsepi16_storeu_epi8,
_mm512_mask_cvtusepi16_storeu_epi8): New intrinsics.
* config/i386/avx512vlbwintrin.h (_mm256_mask_cv
4 PM
> To: Koval, Julia
> Cc: GCC Patches ; Uros Bizjak
> ; Peryt, Sebastian ;
> ja...@redhat.com; richard.guent...@gmail.com
> Subject: Re: [PATCH][x86][PR73350][PR80862]
>
> On 31 May 11:38, Kirill Yukhin wrote:
> > Hello Julia,
> > On 26 May 09:13, Koval, Julia wro
Hi,
This patch fixes these PR's. Ok for trunk?
gcc/
* config/i386/subst.md (round): Fix round pattern.
* config/i386/i386.c (ix86_erase_embedded_rounding):
Fix erasing rounding for the fixed pattern.
Thanks,
Julia
0001-patch_1.patch
Description: 0001-patch_1.patch
Hi,
This patch add these missing intrinsics:
_xsetbv
_xgetbv
gcc/
* config/i386/i386-builtin-types.def (VOID_FTYPE_INT_INT64): New type.
* config/i386/i386-builtin.def (__builtin_ia32_xgetbv,
__builtin_ia32_xsetbv): New builtins.
* config/i386/i386.c (ix86_expand_s
iz...@gmail.com]
Sent: Thursday, May 11, 2017 11:25 AM
To: Koval, Julia
Cc: GCC Patches ; Kirill Yukhin
Subject: Re: [PATCH][X86] Add missing intrinsics for VRSQRT14
On Thu, May 11, 2017 at 7:43 AM, Koval, Julia wrote:
> Hi,
>
> These are 4 missing intrinsics for VRSQRT14 instruction.
Hi,
These are 4 missing intrinsics for VRSQRT14 instruction. Ok for trunk?
gcc/
* config/i386/avx512fintrin.h (_mm_mask_rsqrt14_sd,
_mm_maskz_rsqrt14_sd,
_mm_mask_rsqrt14_ss, _mm_maskz_rsqrt14_ss): New intrinsics.
* config/i386/i386-builtin.def (__builtin_ia32_rsqrt14sd_m
Sorry, fixed that.
Thanks,
Julia
-Original Message-
From: Jakub Jelinek [mailto:ja...@redhat.com]
Sent: Tuesday, May 09, 2017 11:36 AM
To: Koval, Julia
Cc: GCC Patches ; Uros Bizjak ;
Kirill Yukhin
Subject: Re: [PR80582][X86] Add missing __mm256_set[r] intrinsics
On Tue, May 09
Hi,
This patch implements missing intrinsics:
_mm256_set_m128
_mm256_set_m128d
_mm256_set_m128i
_mm256_setr_m128
_mm256_setr_m128d
_mm256_setr_m128i
gcc/
* config/i386/avxintrin.h (_mm256_set_m128, _mm256_set_m128d,
_mm256_set_m128i, _mm256_setr_m128, _mm256_setr_m128d,
_m
Hi,
This patch adds missing intrinsics for VRCP14SD and VRCP14SS instructions:
_mm_mask_rcp14_sd
_mm_maskz_rcp14_sd
_mm_mask_rcp14_ss
_mm_maskz_rcp14_ss
These instructions and intrinsics are described in SDM Vol. 2C 5-487.
gcc/
* config/i386/avx512fintrin.h (_mm_mask_rcp14_sd,
_m
.
* gcc.target/i386/interrupt-13.c: Ditto.
* gcc.target/i386/interrupt-14.c: Ditto.
* gcc.target/i386/interrupt-15.c: Ditto.
-Original Message-
From: Koval, Julia
Sent: Monday, March 06, 2017 1:03 PM
To: 'Uros Bizjak'
Cc: GCC Patches ; H.J. Lu
Subject: RE: [PR79
directives.
* gcc.target/i386/interrupt-13.c: Ditto.
* gcc.target/i386/interrupt-14.c: Ditto.
* gcc.target/i386/interrupt-15.c: Ditto.
Thanks,
Julia
-Original Message-
From: Uros Bizjak [mailto:ubiz...@gmail.com]
Sent: Friday, March 03, 2017 4:29 PM
To: Koval, Julia
Cc
Hi,
This patch fixes PR79731. Ok for trunk?
gcc/
* config/i386/i386.c (ix86_minimum_incoming_stack_boundary): Fix
boundary for interrupt
gcc/testsuite/
* gcc.target/i386/interrupt-12.c: Fix test.
* gcc.target/i386/interrupt-13.c: Ditto.
* gcc.target/i386/interrupt
Hi,
Can you please commit it for me?
Thanks,
Julia
-Original Message-
From: Uros Bizjak [mailto:ubiz...@gmail.com]
Sent: Friday, February 17, 2017 1:30 PM
To: Koval, Julia
Cc: GCC Patches
Subject: Re: [PATCH] Enable RDPID instruction.
On Thu, Feb 16, 2017 at 11:56 PM, Koval, Julia
Hi,
This is GCC5 backport discussed in
https://gcc.gnu.org/ml/gcc-patches/2017-02/msg01034.html. Please commit it for
me, if it is ok.
PR target/76731
* config/i386/avx512fintrin.h
(_mm512_i32gather_ps): Change __addr type to void const*.
(_mm512_mask_i32gather_p
1 - 100 of 120 matches
Mail list logo
