2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_init_bif_table):
Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 71 +
1 file changed, 71 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (parse_args): New function.
(parse_prototype): Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 143
1 file changed, 143 insertions(+)
diff --git
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c
(write_autogenerated_header): New function.
(write_decls): Likewise.
(write_extern_fntype): New callback function.
(write_header_file): Implement.
---
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (write_defines_file):
Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (complete_vector_type): New
function.
(complete_base_type): Likewise.
(construct_fntype_id): Likewise.
(parse_bif_entry): Call construct_fntype_id.
(parse_ovld_entry): Likewise.
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (ovld_stanza): New struct.
(MAXOVLDSTANZAS): New defined constant.
(ovld_stanzas): New filescope variable.
(curr_ovld_stanza): Likewise.
(MAXOVLDS): New defined constant.
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (bif_stanza): New enum.
(curr_bif_stanza): New filescope variable.
(stanza_entry): New struct.
(stanza_map): New initialized filescope variable.
(enable_string): Likewise.
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (parse_bif_attrs):
Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 102
1 file changed, 102 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rbtree.c: New file.
* config/rs6000/rbtree.h: New file.
---
gcc/config/rs6000/rbtree.c | 233 +
gcc/config/rs6000/rbtree.h | 51
2 files changed, 284 insertions(+)
create mode 100644
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (rbtree.h): New #include.
(num_bifs): New filescope variable.
(num_ovld_stanzas): Likewise.
(num_ovlds): Likewise.
(exit_codes): Add more enum values.
(parse_codes): New enum.
2021-03-24 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (restriction): New enum.
(typeinfo): Add restr field.
(match_const_restriction): Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 136
1 file changed, 136 insertions(+)
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (match_basetype): Implement.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 64 +
1 file changed, 64 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-gen-builtins.c
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (void_status): New enum.
(basetype): Likewise.
(typeinfo): New struct.
(handle_pointer): New function.
(match_basetype): New stub function.
(match_const_restriction): Likewise.
2021-03-03 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c (MININT): New defined
constant.
(exit_codes): New enum.
(consume_whitespace): New function.
(advance_line): Likewise.
(safe_inc_pos): Likewise.
(match_identifier):
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-gen-builtins.c: New.
---
gcc/config/rs6000/rs6000-gen-builtins.c | 165
1 file changed, 165 insertions(+)
create mode 100644 gcc/config/rs6000/rs6000-gen-builtins.c
diff --git
This patch adds a tiny subset of the built-in and overload descriptions.
2021-04-02 Bill Schmidt
gcc/
* config/rs6000/rs6000-builtin-new.def: New.
* config/rs6000/rs6000-overload.def: New.
---
gcc/config/rs6000/rs6000-builtin-new.def | 199 +++
2021-03-03 Bill Schmidt
gcc/
* Makefile.in (OUT_FILE_DEPS): New variable.
(out_object_file): Depend on OUT_FILE_DEPS.
---
gcc/Makefile.in | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index 8a5fb3fd99c..2fd94fc7dba
The design of the target-specific built-in function support in the
Power back end has not stood the test of time. The machinery is
grossly inefficient, confusing, and arcane; and adding new built-in
functions is inefficient and error-prone. This patch set introduces a
replacement.
Because of
Currently gengtype supports scanning target-specific files for GC roots,
but those files must exist in the source tree. This patch extends the
support to include header files generated into the build directory. It
also allows targets to specify build dependencies for s-gtype to ensure
the built
On Mon, 2021-04-26 at 14:00 -0500, acsaw...@linux.ibm.com wrote:
> From: Aaron Sawdey
>
> This adds some test cases to make sure that the combine patterns for p10
> fusion are working.
>
> OK for trunk?
>
> gcc/testsuite/ChangeLog:
> * gcc.target/powerpc/fusion-p10-ldcmpi.c: New file.
>
On Mon, 2021-04-26 at 13:04 -0500, acsaw...@linux.ibm.com wrote:
> From: Aaron Sawdey
>
> This adds new values for insn attr type for p10 fusion. The
> genfusion.pl
> script is modified to use them, and fusion.md regenerated to capture
> the new patterns. There are also some formatting only
On 4/26/21 11:04 AM, will schmidt wrote:
On Sun, 2021-04-25 at 20:50 -0500, Bill Schmidt via Gcc-patches wrote:
2021-03-25 Bill Schmidt
gcc/testsuite/
* gcc.target/powerpc/rop-1.c: New.
* gcc.target/powerpc/rop-2.c: New.
* gcc.target/powerpc/rop-3.c: New
On 4/26/21 11:01 AM, will schmidt wrote:
On Sun, 2021-04-25 at 20:50 -0500, Bill Schmidt via Gcc-patches wrote:
Add POWER10 support for hashst[p] and hashchk[p] operations. When
the -mrop-protect option is selected, any function that loads the
link
register from memory before returning must
On Sun, 2021-04-25 at 20:50 -0500, Bill Schmidt via Gcc-patches wrote:
> 2021-03-25 Bill Schmidt
>
> gcc/testsuite/
> * gcc.target/powerpc/rop-1.c: New.
> * gcc.target/powerpc/rop-2.c: New.
> * gcc.target/powerpc/rop-3.c: New.
> * gcc.target
On Sun, 2021-04-25 at 20:50 -0500, Bill Schmidt via Gcc-patches wrote:
> 2021-03-25 Bill Schmidt
>
> gcc/
> * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
> __ROP_PROTECT__ if -mrop-protect is selected.
ok
> ---
> gcc/config/rs6000/rs6000-
On Sun, 2021-04-25 at 20:50 -0500, Bill Schmidt via Gcc-patches wrote:
> Insert the hashst and hashchk instructions when -mrop-protect has been
> selected. The encrypted save slot for ROP mitigation is placed
> between the parameter save area and the alloca space (if any;
> otherwi
On Sun, 2021-04-25 at 20:50 -0500, Bill Schmidt via Gcc-patches wrote:
> 2021-03-25 Bill Schmidt
>
> gcc/
> * config/rs6000/rs6000.c (rs6000_option_override_internal):
> Disable shrink wrap when inserting ROP-protect instructions.
> * config/rs6000/rs6000
On Sun, 2021-04-25 at 20:50 -0500, Bill Schmidt via Gcc-patches wrote:
> Add POWER10 support for hashst[p] and hashchk[p] operations. When
> the -mrop-protect option is selected, any function that loads the
> link
> register from memory before returning must have protection in th
Add POWER10 support for hashst[p] and hashchk[p] operations. When
the -mrop-protect option is selected, any function that loads the link
register from memory before returning must have protection in the
prologue and epilogue to ensure the link register save location has
not been compromised. If
2021-03-25 Bill Schmidt
gcc/testsuite/
* gcc.target/powerpc/rop-1.c: New.
* gcc.target/powerpc/rop-2.c: New.
* gcc.target/powerpc/rop-3.c: New.
* gcc.target/powerpc/rop-4.c: New.
* gcc.target/powerpc/rop-5.c: New.
---
Insert the hashst and hashchk instructions when -mrop-protect has been
selected. The encrypted save slot for ROP mitigation is placed
between the parameter save area and the alloca space (if any;
otherwise the local variable space).
Note that ROP-mitigation instructions are currently only
2021-03-25 Bill Schmidt
gcc/
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
__ROP_PROTECT__ if -mrop-protect is selected.
---
gcc/config/rs6000/rs6000-c.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-c.c
2021-03-25 Bill Schmidt
gcc/
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Disable shrink wrap when inserting ROP-protect instructions.
* config/rs6000/rs6000.opt (mrop-protect): New option.
(mprivileged): Likewise.
* doc/invoke.texi:
On 4/23/21 6:58 PM, Segher Boessenkool wrote:
On Fri, Apr 23, 2021 at 06:24:07PM -0400, Michael Meissner wrote:
On Thu, Apr 22, 2021 at 05:56:32PM -0500, Segher Boessenkool wrote:
As Will says, it looks like the ELFv2 version has the same bug. Please
fix that the same way.
Yes it has the
On 4/16/21 8:56 AM, Bill Schmidt via Gcc-patches wrote:
The standard for many Power vector interfaces is now the recently
published Power Vector Intrinsics Programming Reference. Reference
that document for the relevant interfaces, and remove redundant
information from the GCC user's manual
The standard for many Power vector interfaces is now the recently
published Power Vector Intrinsics Programming Reference. Reference
that document for the relevant interfaces, and remove redundant
information from the GCC user's manual.
2021-04-16 Bill Schmidt
gcc/
* doc/extend.texi
On Fri, 2021-04-09 at 17:09 -0400, Michael Meissner wrote:
> Fix logic error in 32-bit trampolines, PR target/98952.
>
> The test in the PowerPC 32-bit trampoline support is backwards. It aborts
> if the trampoline size is greater than the expected size. It should abort
> when the trampoline
On Fri, 2021-04-09 at 10:43 -0400, Michael Meissner wrote:
> Add IEEE 128-bit fp conditional move on PowerPC.
>
> This patch has been posted various times in the past. My memory is the last
> time I changed the patch, I addressed the concerns posted at that time. Since
> then the patch seems to
On Fri, 2021-04-09 at 10:42 -0400, Michael Meissner wrote:
> Add IEEE 128-bit min/max support on PowerPC.
>
> This patch has been posted various times in the past. My memory is the last
> time I changed the patch, I addressed the concerns posted at that time. Since
> then the patch seems to
On Thu, 2021-03-18 at 09:21 +0800, HAO CHEN GUI wrote:
> David & Segher,
>
> Thanks so much for your explanation. My patch wants to enables the
> constant anchor on rs6000 as TARGET_ANCHOR_CONST or targetm.anchor_const
> is undefined. I realized that we have addi and addis instructions. So
On Wed, 2021-03-17 at 15:49 -0500, Pat Haugen via Gcc-patches wrote:
> Update prefixed attribute for Power10.
>
> This patch creates a new attribute, prepend_prefixed_insn, which is
> used to mark
> those instructions that are prefixed and need to have a 'p' prepended
> to their
> mnemonic at asm
On Mon, 2021-03-15 at 11:11 +0800, HAO CHEN GUI via Gcc-patches wrote:
> Hi,
>
> This patch adds const_anchor for rs6000. The const_anchor is
> used
> in cse pass.
>
> The attachment are the patch diff and change log file.
>
> Bootstrapped and tested on powerpc64le with no
On Mon, 2021-03-15 at 11:11 +0800, HAO CHEN GUI via Gcc-patches wrote:
> Hi,
>
> This patch adds const_anchor for rs6000. The const_anchor is used
> in cse pass.
>
> The attachment are the patch diff and change log file.
>
> Bootstrapped and tested on powerpc64le with no
On Wed, 2021-02-03 at 14:37 +0800, Kewen.Lin via Gcc-patches wrote:
> Hi,
>
Hi,
> This patch merges the previously approved one[1] and its relied patch
I don't see the review for [1] in the archives.
> made by Segher here[2], it's to make unsigned int vector init go with
> rldimi to
On Wed, 2021-02-03 at 03:01 -0600, Xionghu Luo via Gcc-patches wrote:
Hi,
> v[k] will also be expanded to IFN VEC_SET if k is long type when
> built
> with -Og. -O0 didn't exposed the issue due to v is TREE_ADDRESSABLE,
> -O1 and above also didn't capture it because of v[k] is not optimized
>
On Fri, 2021-01-29 at 11:11 +0800, HAO CHEN GUI via Gcc-patches wrote:
> Hi,
>
Hi,
just a couple cosmetic nits below.
Thanks,
> This patch tries to optimize PowerPC 64 bit constant generation
> when
> the constant can be transformed from a 32 bit or 16 bit constant by
> rotating,
[PATCH, rs6000] Fix typo in gcc.target/pr91903.c dg-require stanza
Hi,
I somehow messed up when I tested this change.. Committed as obvious, also
had pre-approval blessing per offline discussion.
Fix obvious typo in testcases dg-require stanza.
2021-01-29 Will Schmidt
On Thu, 2021-01-28 at 21:42 -0500, Michael Meissner via Gcc-patches wrote:
> [PATCH] Add conversions between _Float128 and Decimal.
>
Hi,
Just a couple cosmetic nits in the description. The changelog seems to
match that patch contents OK.
> This patch implements conversions between
On Wed, 2021-01-27 at 19:43 -0600, Segher Boessenkool wrote:
> On Wed, Jan 27, 2021 at 01:06:46PM -0600, will schmidt wrote:
> > On Thu, 2021-01-14 at 11:59 -0500, Michael Meissner via Gcc-patches
> > wrote:
> > > November 19th, 2020:
> > > Message-ID:
On Wed, 2021-01-27 at 18:24 -0600, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Oct 26, 2020 at 04:22:32PM -0500, will schmidt wrote:
> > Per PR91903, GCC ICEs when we attempt to pass a variable
> > (or out of range value) into the vec_ctf() builtin. Per
> > investigation, the parameter
Ping!
Thanks
-Will
On Mon, 2021-01-04 at 18:03 -0600, will schmidt via Gcc-patches wrote:
> On Mon, 2020-10-26 at 16:22 -0500, will schmidt wrote:
> > [PATCH, rs6000] improve vec_ctf invalid parameter handling.
> >
> > Hi,
> > Per PR91903, GCC ICEs when we
On Thu, 2021-01-14 at 11:59 -0500, Michael Meissner via Gcc-patches wrote:
> From 78435dee177447080434cdc08fc76b1029c7f576 Mon Sep 17 00:00:00 2001
> From: Michael Meissner
> Date: Wed, 13 Jan 2021 21:47:03 -0500
> Subject: [PATCH] PowerPC: Map IEEE 128-bit long double built-ins.
>
> This patch
On 1/25/21 10:23 AM, Segher Boessenkool wrote:
Hi!
On Thu, Jan 21, 2021 at 05:49:14PM -0600, will schmidt wrote:
Noted as part of the work-in-progress builtins rewrite, the
__builtin_dfp_dtstsfi_*_{dd,td} builtins are redundant, and are thusly
being marked as deprecated. They will be
On Tue, 2021-01-26 at 01:46 -0600, Xionghu Luo via Gcc-patches wrote:
> From: "luo...@cn.ibm.com"
>
> UNSPEC_SI_FROM_SF is not supported when TARGET_DIRECT_MOVE_64BIT
> is false for -m32, don't generate VIEW_CONVERT_EXPR(ARRAY_REF) for
> variable vector insert. Remove
[PATCH, rs6000] Deprecate unnecessary __builtin_dfp_dtstsfi_*_dd and td
overloads
Hi,
Noted as part of the work-in-progress builtins rewrite, the
__builtin_dfp_dtstsfi_*_{dd,td} builtins are redundant, and are thusly
being marked as deprecated. They will be removed as part of the builtins
[PATCH, rs6000] Update pr88233.c test (pr91799)
Hi,
This is a follow-up fix to clean up pr91799. Per review of test results,
it appears that the combination of target and dg-require stanzas is
not sufficient to properly limit the test to 64-bit only on darwin.
This adds additional clauses to
On Mon, 2020-12-07 at 16:31 -0800, Carl Love wrote:
> Will:
>
> I have addressed you comments with regards to the Change Log entries.
>
> The extra define vec_div was removed.
>
> Added the missing entries for DIVU_V2DI DIVS_V2DI in rs6000-call.c.
>
> The extra MULLD_V2DI case statement
On Mon, 2020-10-26 at 16:22 -0500, will schmidt wrote:
> [PATCH, rs6000] improve vec_ctf invalid parameter handling.
>
> Hi,
> Per PR91903, GCC ICEs when we attempt to pass a variable
> (or out of range value) into the vec_ctf() builtin. Per
> investigation, the parameter checking exists for
On Tue, 2020-12-08 at 15:46 -0600, Pat Haugen via Gcc-patches wrote:
> Update size attribute for Power10.
>
>
> This patch was broken out from my larger patch to update various
> attributes for
> Power10, in order to make the review process hopefully easier. This
> patch only
> updates the size
On Tue, 2020-12-08 at 20:20 +1030, Alan Modra wrote:
> On Mon, Dec 07, 2020 at 05:49:05PM -0600, will schmidt via Gcc-
> patches wrote:
> > [PATCH, powerpc] testsuite update tests for powerpc power10 target
> > codegen.
>
> Appears to duplicate work I did earlier,
> ht
[PATCH, powerpc] testsuite update tests for powerpc power10 target codegen.
Hi,
Assorted fix-ups to include prefixed load and store instructions in the
scan-assembler stanzas for the gcc.target/powerpc tests.
For these tests, we simply need to add pstxv or plxv added to the chain
of
On Fri, 2020-12-04 at 13:19 -0600, acsawdey--- via Gcc-patches wrote:
> From: Aaron Sawdey
>
Assorted comments sprinkled around below.
thanks
-Will
> This patch adds the first batch of patterns to support p10 fusion. These
> will allow combine to create a single insn for a pair of
On Tue, 2020-12-01 at 15:48 -0800, Carl Love via Gcc-patches wrote:
> Segher, Pat:
>
> I have updated the patch to address the comments below.
>
> On Wed, 2020-11-25 at 20:30 -0600, Segher Boessenkool wrote:
> > On Tue, Nov 24, 2020 at 08:34:51PM -0600, Pat Haugen wrote:
> > > On 11/24/20 8:17
On Tue, 2020-12-01 at 15:48 -0800, Carl Love via Gcc-patches wrote:
> Segher, Pat:
>
> I have updated the patch to address the comments below.
In all the excitement, i've lost track of some of the details throughout the
thread. :-)
Subject: Re: [PATCH v2] rs6000, vector integer
On Wed, 2020-12-02 at 17:44 +0800, Kewen.Lin via Gcc-patches wrote:
> Hi,
>
> This patch is to use paradoxical subreg instead of
> zero_extend for promoting QI/HI to SI/DI when we
> want to construct one vector with these modes.
> Since we do the gpr->vsx movement and vector merge
> or pack
On Wed, 2020-11-18 at 01:03 -0500, Michael Meissner wrote:
> On Tue, Nov 17, 2020 at 11:33:29PM -0600, will schmidt wrote:
> > On Sun, 2020-11-15 at 12:23 -0500, Michael Meissner via Gcc-patches
> > wrote:
> > > PowerPC: Restrict long double test to use IBM long double.
> > >
> > > I posted this
On Wed, 2020-11-18 at 00:55 -0500, Michael Meissner wrote:
> On Tue, Nov 17, 2020 at 11:33:23PM -0600, will schmidt wrote:
> > On Sun, 2020-11-15 at 12:12 -0500, Michael Meissner via Gcc-patches
> > wrote:
> > > Include math.h in nextafter-2.c test.
> > >
> > > I previously posted this with two
On Sun, 2020-11-15 at 12:17 -0500, Michael Meissner via Gcc-patches wrote:
> From 698d9fd8a5701fa4ed9690ddf71d57765921778c Mon Sep 17 00:00:00 2001
> From: Michael Meissner
> Date: Sun, 15 Nov 2020 00:48:23 -0500
> Subject: [PATCH] PowerPC Fix ibm128 defaults for pr70117.c test.
>
> This patch
On Sun, 2020-11-15 at 12:12 -0500, Michael Meissner via Gcc-patches wrote:
> Include math.h in nextafter-2.c test.
>
> I previously posted this with two other patches. I've separated this into its
> own patch. What happens is because the nextafter-2.c test uses -fno-builtin,
> and it does not
On Sun, 2020-11-15 at 12:23 -0500, Michael Meissner via Gcc-patches wrote:
> PowerPC: Restrict long double test to use IBM long double.
>
> I posted this patch previously as a set of 3 testsuite patches. I have
> separated them into separate patches. This patch marks the convert-bfp-11.c
>
On Fri, 2020-11-13 at 16:04 -0600, Pat Haugen via Gcc-patches wrote:
> Add Power10 scheduling description.
>
> This patch adds the Power10 scheduling description. Since power10.md
> was pretty much a complete rewrite (existing version of power10.md is
> mostly just a copy of power9.md), I diffed
On Fri, 2020-11-13 at 16:04 -0600, Pat Haugen via Gcc-patches wrote:
> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
> index 4d528a39a37..85bb42d6dce 100644
> --- a/gcc/config/rs6000/rs6000.c
> +++ b/gcc/config/rs6000/rs6000.c
> @@ -1080,6 +1080,26 @@ struct processor_costs
On Fri, 2020-11-06 at 10:46 -0600, Pat Haugen wrote:
> On 11/5/20 4:32 PM, will schmidt wrote:
> > On Wed, 2020-11-04 at 14:42 -0600, Pat Haugen via Gcc-patches
> > wrote:
> > > * config/rs6000/rs6000.c (rs6000_final_prescan_insn): Only add
> > > 'p' for
> > > PREFIXED_YES.
> >
> > The code
On Wed, 2020-11-04 at 12:12 -0600, Aaron Sawdey via Gcc-patches wrote:
> Ping.
>
> Aaron Sawdey, Ph.D. saw...@linux.ibm.com
> IBM Linux on POWER Toolchain
>
>
> > On Oct 26, 2020, at 4:44 PM, acsaw...@linux.ibm.com wrote:
> >
> > From: Aaron Sawdey
> >
Hi,
> > This patch adds the first
On Wed, 2020-11-04 at 14:42 -0600, Pat Haugen via Gcc-patches wrote:
> Update instruction attributes for Power10.
>
>
> This patch updates the type/prefixed/dot/size attributes for various new
> instructions (and a couple existing that were incorrect) in preparation for
> the Power10
On Wed, 2020-11-04 at 12:10 -0600, acsawdey--- via Gcc-patches wrote:
> From: Aaron Sawdey
>
> Ping, as it has been a while.
> This also includes a slight fix to make sure that all references can get
> optimized.
>
I've read over what I could. a few nits below, nothing significant
jumped out
On Thu, 2020-10-29 at 13:05 -0400, Michael Meissner wrote:
> On Mon, Oct 26, 2020 at 05:48:48PM -0500, will schmidt wrote:
> > On Thu, 2020-10-22 at 18:15 -0400, Michael Meissner via Gcc-patches
> > wrote:
> > > PowerPC: Allow C/C++ to change long double type on GLIBC 2.32.
> > >
> > > This is a
On Wed, 2020-10-28 at 21:20 +1030, Alan Modra via Gcc-patches wrote:
> Otherwise some versions of dejagnu go ahead and run the vsx tests
> below when they should not. To best cope with older dejagnu, put
> "run" before "compile", the idea being that if the second dg-do always
> wins then that
On Thu, 2020-10-22 at 18:08 -0400, Michael Meissner via Gcc-patches wrote:
> PowerPC: Map q built-ins to *l instead of *f128 if IEEE 128-bit long double.
>
> I have split all of these patches into separate patches to hopefully get them
> into the tree.
>
> If we map nanq to nanf128 when long
On Thu, 2020-10-22 at 18:07 -0400, Michael Meissner via Gcc-patches wrote:
> PowerPC: Update long double IEEE 128-bit tests.
>
> I have split all of these patches into separate patches to hopefully get them
> into the tree.
>
> This patch fixes 3 tests in the testsuite that fail if long double
On Thu, 2020-10-22 at 18:06 -0400, Michael Meissner via Gcc-patches wrote:
> PowerPC: Add __float128 conversions to/from Decimal.
>
> I have split all of these patches into separate patches to hopefully get them
> into the tree.
>
> This patch adds the various decimal to/from IEEE 128-bit
On Thu, 2020-10-22 at 18:09 -0400, Michael Meissner via Gcc-patches wrote:
> PowerPC: Update IEEE 128-bit built-ins for long double is IEEE 128-bit.
"for when .."
>
> I have split all of these patches into separate patches to hopefully get them
> into the tree.
>
> This patch adds long double
On Thu, 2020-10-22 at 18:10 -0400, Michael Meissner via Gcc-patches wrote:
> PowerPC: Use __builtin_pack_ieee128 if long double is IEEE 128-bit.
>
> I have split all of these patches into separate patches to hopefully get them
> into the tree.
>
> This patch changes the __ibm128 emulator to use
On Thu, 2020-10-22 at 18:11 -0400, Michael Meissner via Gcc-patches wrote:
> PowerPC: Update __float128 and __ibm128 error messages.
>
> I have split all of these patches into separate patches to hopefully get them
> into the tree.
>
> This patch attempts to make the error messages for
On Thu, 2020-10-22 at 18:12 -0400, Michael Meissner via Gcc-patches wrote:
> PowerPC: Use __float128 instead of __ieee128 in tests.
>
> I have split all of these patches into separate patches to hopefully get them
> into the tree.
>
> Two of the tests used the __ieee128 keyword instead of
On Thu, 2020-10-22 at 18:05 -0400, Michael Meissner via Gcc-patches wrote:
> PowerPC: Add -mno-gnu-attributes to ibm-ldouble.o.
>
> I have split all of these patches into separate patches to hopefully get them
> into the tree.
>
> This patch is split off from the patch adding __float128 <->
On Thu, 2020-10-22 at 18:15 -0400, Michael Meissner via Gcc-patches wrote:
> PowerPC: Allow C/C++ to change long double type on GLIBC 2.32.
>
> This is a new patch. It turns off the warning about switching the long double
> type via compile line if the GLIBC is 2.32 or newer. It only does this
On Thu, 2020-10-22 at 18:03 -0400, Michael Meissner via Gcc-patches wrote:
> PowerPC: Map IEEE 128-bit long double built-in functions
>
> This patch is revised from the first and second versions of the patch posted.
> It now uses the names that are not in the user's namespace (i.e. __sinieee128
>
[PATCH, rs6000] improve vec_ctf invalid parameter handling.
Hi,
Per PR91903, GCC ICEs when we attempt to pass a variable
(or out of range value) into the vec_ctf() builtin. Per
investigation, the parameter checking exists for this
builtin with the int types, but was missing for
the long long
[PATCH 2/2, rs6000, v2] VSX load/store rightmost element operations
Hi,
This adds support for the VSX load/store rightmost element operations.
This includes the instructions lxvrbx, lxvrhx, lxvrwx, lxvrdx,
stxvrbx, stxvrhx, stxvrwx, stxvrdx; And the builtins
vec_xl_sext() /* vector load sign
On Thu, 2020-10-08 at 09:36 +1030, Alan Modra via Gcc-patches wrote:
> Implement more two insn constants. rotate_and_mask_constant covers
> 64-bit constants that can be formed by rotating a 16-bit signed
> constant, rotating a 16-bit signed constant masked on left or right
> (rldicl and rldicr),
On Thu, 2020-10-08 at 09:27 +1030, Alan Modra via Gcc-patches wrote:
> The aim of this patch is to make rtx_costs for SETs closer to
> insn_cost for SETs. One visible effect on powerpc code is increased
> if-conversion.
>
> * config/rs6000/rs6000.c (rs6000_rtx_costs): Reduce cost of SET
>
On Mon, 2020-10-05 at 11:52 -0700, Carl Love wrote:
> Will, Segher:
>
> This patch adds support for converting to/from 128-bit integers and
> 128-bit decimal floating point formats using the new P10 instructions
> dcffixqq and dctfixqq. The new instructions are only used on P10 HW,
> otherwise
On Mon, 2020-10-05 at 11:52 -0700, Carl Love wrote:
> Will, Segher:
>
> Patch 4 adds the vector 128-bit integer shift instruction support for
> the V1TI type.
>
> The changes from the previous version include:
>
> Fixed up the change log entry issues noted by Will.
>
> Regression tests reran
On Mon, 2020-10-05 at 11:52 -0700, Carl Love wrote:
> Will, Segher:
>
> Add support for converting to/from 128-bit integers and 128-bit
> decimal floating point formats.
>
> The updates from the previous version of the patch:
>
> Just a fix for the change log per Will's comments.
>
> No
On Mon, 2020-10-05 at 11:52 -0700, Carl Love wrote:
> Will and Segher:
>
> This is the rest of the second patch which adds the 128-bit integer
> support for divide, modulo, shift, compare of 128-bit
> integers instructions and builtin support.
>
> In the last round of changes, the flag for the
On Mon, 2020-10-05 at 11:52 -0700, Carl Love wrote:
> Will, Segher:
>
>
>
> The following changes were made from the previous version:
>
> Per Will's comments, I split the bug fix from patch 2 into a separate
> patch. This patch is the bug fix for the vec_rlnm builtin.
I recommend trying to
On Mon, 2020-10-05 at 11:51 -0700, Carl Love wrote:
> Will, Segher:
>
> Patch 1, adds the 128-bit sign extension instruction support and
> corresponding builtin support.
>
> I updated the change log per the comments from Will.
>
> Patch has been retested on Power 9 LE.
>
> Pet me know if it
Hi,
Rename our BU_P10_MISC_2 built-in define macro to be
BU_P10_POWERPC64_MISC_2. This more accurately reflects
that the macro includes the RS6000_BTM_POWERPC64 entry
that is not present in the other BU_P10_MISC macros,
and matches the style we used for the P7 equivalent.
Should be
On Mon, 2020-10-05 at 17:23 -0300, Tulio Magno Quites Machado Filho via
Gcc-patches wrote:
> Ping?
+cc Segher :-)
>
> Tulio Magno Quites Machado Filho via Gcc-patches
> writes:
>
> > Replace them with a whitespace in order to avoid artifacts in the HTML
> > document.
> >
> > 2020-08-19
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