On Wed, 19 Sep 2018 at 11:31, Kyrill Tkachov
wrote:
>
> Hi Christophe,
>
> On 18/09/18 23:00, Christophe Lyon wrote:
> > On Thu, 13 Sep 2018 at 11:49, Kyrill Tkachov
> > wrote:
> >>
> >> On 13/09/18 10:25, Sam Tebbs wrote:
> >>> On 09/11/2018 04:20 PM, James Greenhalgh wrote:
> On Tue, Sep
Hi Christophe,
On 18/09/18 23:00, Christophe Lyon wrote:
On Thu, 13 Sep 2018 at 11:49, Kyrill Tkachov
wrote:
On 13/09/18 10:25, Sam Tebbs wrote:
On 09/11/2018 04:20 PM, James Greenhalgh wrote:
On Tue, Sep 04, 2018 at 10:13:43AM -0500, Sam Tebbs wrote:
Hi James,
Thanks for the feedback.
On Thu, 13 Sep 2018 at 11:49, Kyrill Tkachov
wrote:
>
>
> On 13/09/18 10:25, Sam Tebbs wrote:
> >
> > On 09/11/2018 04:20 PM, James Greenhalgh wrote:
> > > On Tue, Sep 04, 2018 at 10:13:43AM -0500, Sam Tebbs wrote:
> > >> Hi James,
> > >>
> > >> Thanks for the feedback. Here is an update with the
On 13/09/18 10:25, Sam Tebbs wrote:
On 09/11/2018 04:20 PM, James Greenhalgh wrote:
> On Tue, Sep 04, 2018 at 10:13:43AM -0500, Sam Tebbs wrote:
>> Hi James,
>>
>> Thanks for the feedback. Here is an update with the changes you proposed
>> and an updated changelog.
>>
>> gcc/
>> 2018-09-04
On 09/11/2018 04:20 PM, James Greenhalgh wrote:
On Tue, Sep 04, 2018 at 10:13:43AM -0500, Sam Tebbs wrote:
Hi James,
Thanks for the feedback. Here is an update with the changes you proposed
and an updated changelog.
gcc/
2018-09-04 Sam Tebbs
PR target/85628
*
On Tue, Sep 04, 2018 at 10:13:43AM -0500, Sam Tebbs wrote:
> Hi James,
>
> Thanks for the feedback. Here is an update with the changes you proposed
> and an updated changelog.
>
> gcc/
> 2018-09-04 Sam Tebbs
>
> PR target/85628
> * config/aarch64/aarch64.md
Hi James,
Thanks for the feedback. Here is an update with the changes you proposed
and an updated changelog.
gcc/
2018-09-04 Sam Tebbs
PR target/85628
* config/aarch64/aarch64.md (*aarch64_bfxil):
Define.
* config/aarch64/constraints.md (Ulc): Define
On 08/28/2018 11:53 PM, James Greenhalgh wrote:
On Wed, Aug 01, 2018 at 10:07:23AM -0500, Sam Tebbs wrote:
+ ones from the MSB. */
+bool
+aarch64_is_left_consecutive (HOST_WIDE_INT i)
+{
+ return (i | (i - 1)) == HOST_WIDE_INT_M1;
exact_log2(-i) != HOST_WIDE_INT_M1?
I could change
On Fri, 31 Aug 2018, Kyrill Tkachov wrote:
> > That sounds good! Although I'm confused about what the 'p' means.
>
> It stands for "predicate" meaning a boolean function with no side-effects.
> It's the preferred way to name these kinds of functions in GCC (though I can't
> seem to find the
On 31/08/18 16:27, Sam Tebbs wrote:
On 08/31/2018 11:59 AM, Kyrill Tkachov wrote:
>
> On 30/08/18 16:53, Sam Tebbs wrote:
>>
>>
>> On 08/28/2018 11:53 PM, James Greenhalgh wrote:
>> > Hm, I'm not very sure about the naming here; "left consecutive"
>> isn't a
>> > common phrase to denote the
On 08/31/2018 11:59 AM, Kyrill Tkachov wrote:
On 30/08/18 16:53, Sam Tebbs wrote:
On 08/28/2018 11:53 PM, James Greenhalgh wrote:
> Hm, I'm not very sure about the naming here; "left consecutive"
isn't a
> common phrase to denote the mask you're looking for (exact_log2
(-i) != -1
> if I'm
On 30/08/18 16:53, Sam Tebbs wrote:
On 08/28/2018 11:53 PM, James Greenhalgh wrote:
> Hm, I'm not very sure about the naming here; "left consecutive" isn't a
> common phrase to denote the mask you're looking for (exact_log2 (-i) != -1
> if I'm reading right), and is misleading 0x is
On 08/28/2018 11:53 PM, James Greenhalgh wrote:
Hm, I'm not very sure about the naming here; "left consecutive" isn't a
common phrase to denote the mask you're looking for (exact_log2 (-i) != -1
if I'm reading right), and is misleading 0x is 'left consecutive'
too, just with zeroes
On Wed, Aug 01, 2018 at 10:07:23AM -0500, Sam Tebbs wrote:
> Hi all,
>
> This patch adds an optimisation that exploits the AArch64 BFXIL
> instruction when or-ing the result of two bitwise and operations
> with non-overlapping bitmasks
> (e.g. (a & 0x) | (b & 0x)).
>
> Example:
>
ping
https://gcc.gnu.org/ml/gcc-patches/2018-08/msg00108.html
On 08/01/2018 04:07 PM, Sam Tebbs wrote:
Hi all,
This patch adds an optimisation that exploits the AArch64 BFXIL
instruction when or-ing the result of two bitwise and operations
with non-overlapping bitmasks
(e.g. (a & 0x)
Hi all,
This patch adds an optimisation that exploits the AArch64 BFXIL
instruction when or-ing the result of two bitwise and operations
with non-overlapping bitmasks
(e.g. (a & 0x) | (b & 0x)).
Example:
unsigned long long combine(unsigned long long a, unsigned long
long b) {
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