On Fri, Jun 25, 2021 at 8:48 AM Richard Biener wrote:
>
> On Thu, 24 Jun 2021, Uros Bizjak wrote:
>
> > On Thu, Jun 24, 2021 at 1:07 PM Richard Biener wrote:
> >
> > > This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
> > > instructions which compute { v0[0] - v1[0], v0[1]
On Thu, 24 Jun 2021, Uros Bizjak wrote:
> On Thu, Jun 24, 2021 at 1:07 PM Richard Biener wrote:
>
> > This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
> > instructions which compute { v0[0] - v1[0], v0[1], + v1[1], ... }
> > thus subtract, add alternating on lanes, start
On Thu, Jun 24, 2021 at 1:07 PM Richard Biener wrote:
> This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
> instructions which compute { v0[0] - v1[0], v0[1], + v1[1], ... }
> thus subtract, add alternating on lanes, starting with subtract.
>
> It adds a corresponding opta
On Tue, 22 Jun 2021, Uros Bizjak wrote:
> On Tue, Jun 22, 2021 at 12:34 PM Richard Biener wrote:
> >
> > On Tue, 22 Jun 2021, Uros Bizjak wrote:
> >
> > > On Tue, Jun 22, 2021 at 11:42 AM Richard Sandiford
> > > wrote:
> > >
> > > > >> Well, the pattern is called addsub in the x86 world because
On Tue, Jun 22, 2021 at 12:34 PM Richard Biener wrote:
>
> On Tue, 22 Jun 2021, Uros Bizjak wrote:
>
> > On Tue, Jun 22, 2021 at 11:42 AM Richard Sandiford
> > wrote:
> >
> > > >> Well, the pattern is called addsub in the x86 world because highpart
> > > >> does add and lowpart does sub. In left-
On Tue, 22 Jun 2021, Uros Bizjak wrote:
> On Tue, Jun 22, 2021 at 11:42 AM Richard Sandiford
> wrote:
>
> > >> Well, the pattern is called addsub in the x86 world because highpart
> > >> does add and lowpart does sub. In left-to-right writing systems
> > >> highpart comes before lowpart, so you
On Tue, Jun 22, 2021 at 11:42 AM Richard Sandiford
wrote:
> >> Well, the pattern is called addsub in the x86 world because highpart
> >> does add and lowpart does sub. In left-to-right writing systems
> >> highpart comes before lowpart, so you have addsub.
> >
> > The other targets mentioned do n
Richard Biener writes:
> On Thu, 17 Jun 2021, Uros Bizjak wrote:
>
>> On Thu, Jun 17, 2021 at 11:44 AM Richard Biener wrote:
>> >
>> > This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
>> > instructions which compute { v0[0] - v1[0], v0[1], + v1[1], ... }
>> > thus subtrac
On Thu, 17 Jun 2021, Richard Biener wrote:
> On Thu, 17 Jun 2021, Uros Bizjak wrote:
>
> > On Thu, Jun 17, 2021 at 11:44 AM Richard Biener wrote:
> > >
> > > This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
> > > instructions which compute { v0[0] - v1[0], v0[1], + v1[1]
On Thu, 17 Jun 2021, Uros Bizjak wrote:
> On Thu, Jun 17, 2021 at 11:44 AM Richard Biener wrote:
> >
> > This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
> > instructions which compute { v0[0] - v1[0], v0[1], + v1[1], ... }
> > thus subtract, add alternating on lanes, sta
> -Original Message-
> From: Richard Biener
> Sent: Thursday, June 17, 2021 10:45 AM
> To: gcc-patches@gcc.gnu.org
> Cc: hongtao@intel.com; ubiz...@gmail.com; Tamar Christina
>
> Subject: [PATCH][RFC] Add x86 subadd SLP pattern
>
> This addds SLP pattern r
On Thu, Jun 17, 2021 at 12:00 PM Richard Biener wrote:
>
> On Thu, 17 Jun 2021, Uros Bizjak wrote:
>
> > On Thu, Jun 17, 2021 at 11:44 AM Richard Biener wrote:
> > >
> > > This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
> > > instructions which compute { v0[0] - v1[0], v
On Thu, 17 Jun 2021, Uros Bizjak wrote:
> On Thu, Jun 17, 2021 at 11:44 AM Richard Biener wrote:
> >
> > This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
> > instructions which compute { v0[0] - v1[0], v0[1], + v1[1], ... }
> > thus subtract, add alternating on lanes, sta
On Thu, Jun 17, 2021 at 11:44 AM Richard Biener wrote:
>
> This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
> instructions which compute { v0[0] - v1[0], v0[1], + v1[1], ... }
> thus subtract, add alternating on lanes, starting with subtract.
>
> It adds a corresponding op
On Thu, Jun 17, 2021 at 11:44 AM Richard Biener wrote:
>
> This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
> instructions which compute { v0[0] - v1[0], v0[1], + v1[1], ... }
> thus subtract, add alternating on lanes, starting with subtract.
>
> It adds a corresponding op
This addds SLP pattern recognition for the SSE3/AVX [v]addsubp{ds} v0, v1
instructions which compute { v0[0] - v1[0], v0[1], + v1[1], ... }
thus subtract, add alternating on lanes, starting with subtract.
It adds a corresponding optab and direct internal function,
vec_subadd$a3 and at the moment t
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