Re: [PATCH] RISC-V: Fix reg order of RVV registers.

2023-04-20 Thread Kito Cheng via Gcc-patches
Committed to trunk, thanks :) On Tue, Apr 18, 2023 at 9:50 PM Jeff Law wrote: > > > > On 3/13/23 02:19, juzhe.zh...@rivai.ai wrote: > > From: Ju-Zhe Zhong > > > > Co-authored-by: kito-cheng > > Co-authored-by: kito-cheng > > > > Consider this case: > > void f19 (void *base,void *base2,void

Re: [PATCH] RISC-V: Fix reg order of RVV registers.

2023-04-18 Thread Jeff Law via Gcc-patches
On 3/13/23 02:19, juzhe.zh...@rivai.ai wrote: From: Ju-Zhe Zhong Co-authored-by: kito-cheng Co-authored-by: kito-cheng Consider this case: void f19 (void *base,void *base2,void *out,size_t vl, int n) { vuint64m8_t bindex = __riscv_vle64_v_u64m8 (base + 100, vl); for (int i = 0;

Re: [PATCH] RISC-V: Fix reg order of RVV registers.

2023-03-15 Thread Kito Cheng via Gcc-patches
Hi Jeff: We promised only to commit intrinsic implication and bug fix this moment, so yes, those optimization and non-bug fix pattern turning include this will all defer to gcc-14. On Wed, Mar 15, 2023 at 2:02 AM Jeff Law via Gcc-patches wrote: > > > > On 3/13/23 02:19, juzhe.zh...@rivai.ai

Re: [PATCH] RISC-V: Fix reg order of RVV registers.

2023-03-14 Thread Jeff Law via Gcc-patches
On 3/13/23 02:19, juzhe.zh...@rivai.ai wrote: From: Ju-Zhe Zhong Co-authored-by: kito-cheng Co-authored-by: kito-cheng Consider this case: void f19 (void *base,void *base2,void *out,size_t vl, int n) { vuint64m8_t bindex = __riscv_vle64_v_u64m8 (base + 100, vl); for (int i = 0;

[PATCH] RISC-V: Fix reg order of RVV registers.

2023-03-13 Thread juzhe . zhong
From: Ju-Zhe Zhong Co-authored-by: kito-cheng Co-authored-by: kito-cheng Consider this case: void f19 (void *base,void *base2,void *out,size_t vl, int n) { vuint64m8_t bindex = __riscv_vle64_v_u64m8 (base + 100, vl); for (int i = 0; i < n; i++){ vbool8_t m = __riscv_vlm_v_b8