RE: [PATCH] RISC-V: Refactor the integer ternary autovec pattern

2023-06-24 Thread Li, Pan2 via Gcc-patches
: Refactor the integer ternary autovec pattern On 6/21/23 16:38, Juzhe-Zhong wrote: > Long time ago, I encounter ICE when trying to set clobber register as Pmode > and I forgot the reason. > > So, I clobber SI scratch and PUT_MODE to make it Pmode after reload which > makes patterns lo

Re: [PATCH] RISC-V: Refactor the integer ternary autovec pattern

2023-06-24 Thread Jeff Law via Gcc-patches
On 6/21/23 16:38, Juzhe-Zhong wrote: Long time ago, I encounter ICE when trying to set clobber register as Pmode and I forgot the reason. So, I clobber SI scratch and PUT_MODE to make it Pmode after reload which makes patterns look unreasonable. According to Jeff's comments, I tried it

Re: [PATCH] RISC-V: Refactor the integer ternary autovec pattern

2023-06-23 Thread 钟居哲
Is this patch ok for trunk ? Tests are all passed. juzhe.zh...@rivai.ai From: Juzhe-Zhong Date: 2023-06-22 06:38 To: gcc-patches CC: kito.cheng; palmer; rdapp.gcc; jeffreyalaw; Juzhe-Zhong Subject: [PATCH] RISC-V: Refactor the integer ternary autovec pattern Long time ago, I encounter ICE

[PATCH] RISC-V: Refactor the integer ternary autovec pattern

2023-06-21 Thread Juzhe-Zhong
Long time ago, I encounter ICE when trying to set clobber register as Pmode and I forgot the reason. So, I clobber SI scratch and PUT_MODE to make it Pmode after reload which makes patterns look unreasonable. According to Jeff's comments, I tried it again, it works now when we try to set clobber