On 2024-06-27 08:52 wangfeng wrote:
I rebased the patch 3/3, there is a conflict. I will submit again after
internal code review.
Due to many changes, the patch was split, so a dependency relationship between
patch 2/3
and patch 3/3 was generated. Could you help pull both patches down when
On 2024-06-22 00:16 Patrick O'Neill wrote:
>
>Hi Feng,
>
>Pre-commit has flagged a build-failure for patch 2/3:
>https://github.com/ewlu/gcc-precommit-ci/issues/1786#issuecomment-2181962244
>
>When applied to 9a76db24e04 i386: Allow all register_operand SUBREGs in
>x86_ternlog_idx.
>
Hi Feng,
Pre-commit has flagged a build-failure for patch 2/3:
https://github.com/ewlu/gcc-precommit-ci/issues/1786#issuecomment-2181962244
When applied to 9a76db24e04 i386: Allow all register_operand SUBREGs in
x86_ternlog_idx.
Re-confirmed locally with 5320bcbd342 xstormy16: Fix
I see, it's operator== overloaded.
LGTM.
juzhe.zh...@rivai.ai
From: wangf...@eswincomputing.com
Date: 2024-06-21 17:03
To: juzhe.zhong; gcc-patches
CC: kito.cheng; jinma.contrib
Subject: Re: Re: [PATCH 2/3] RISC-V: Add Zvfbfmin and Zvfbfwma intrinsic
On 2024-06-21 12:24 juzhe.zhong wrote
you have a beteer method, please don't hesitate to share it.
Thanks.
>From: Feng Wang
>Date: 2024-06-21 09:54
>To: gcc-patches
>CC: kito.cheng; juzhe.zhong; jinma.contrib; Feng Wang
>Subject: [PATCH 2/3] RISC-V: Add Zvfbfmin and Zvfbfwma intrinsic
>Accroding to the intrinsic doc,
;
juzhe.zh...@rivai.ai
From: Feng Wang
Date: 2024-06-21 09:54
To: gcc-patches
CC: kito.cheng; juzhe.zhong; jinma.contrib; Feng Wang
Subject: [PATCH 2/3] RISC-V: Add Zvfbfmin and Zvfbfwma intrinsic
Accroding to the intrinsic doc, the 'Zvfbfmin' and 'Zvfbfwma' intrinsic
functions are added by this patch
Accroding to the intrinsic doc, the 'Zvfbfmin' and 'Zvfbfwma' intrinsic
functions are added by this patch.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc (class vfncvtbf16_f):
Add 'Zvfbfmin' intrinsic in bases.
(class vfwcvtbf16_f): Ditto.
(class