...@rivai.ai
Cc: gcc-patches ; palmer ;
jeffreyalaw
Subject: Re: Re: [PATCH V5] RISC-V: Using merge approach to optimize repeating
sequence in vec_init
On Wed, May 17, 2023 at 11:36 AM juzhe.zh...@rivai.ai
wrote:
>
> >> Does it means we assume inner_int_mode is DImode? (be
On Wed, May 17, 2023 at 11:36 AM juzhe.zh...@rivai.ai
wrote:
>
> >> Does it means we assume inner_int_mode is DImode? (because sizeof
> >> (uint64_t))
> >> or it should be something like `for (unsigned int i = 0; i <
> >> (GET_MODE_SIZE(inner_int_mode ()) * 8 / npatterns ()); i++)` ?
> No, sizeof
Cheng
Date: 2023-05-17 11:21
To: juzhe.zhong
CC: gcc-patches; palmer; jeffreyalaw
Subject: Re: [PATCH V5] RISC-V: Using merge approach to optimize repeating
sequence in vec_init
> +
> +/* Get the mask for merge approach.
> +
> + Consider such following case:
> + {a, b, a, b,
> +
> +/* Get the mask for merge approach.
> +
> + Consider such following case:
> + {a, b, a, b, a, b, a, b, a, b, a, b, a, b, a, b}
> + To merge "a", the mask should be 1010
> + To merge "b", the mask should be 0101
> +*/
> +rtx
> +rvv_builder::get_merge_mask_bitfield (u
Ping. Ok for trunk ?
juzhe.zh...@rivai.ai
From: juzhe.zhong
Date: 2023-05-13 08:20
To: gcc-patches
CC: kito.cheng; palmer; jeffreyalaw; Juzhe-Zhong
Subject: [PATCH V5] RISC-V: Using merge approach to optimize repeating sequence
in vec_init
From: Juzhe-Zhong
1. Remove magic number of V4
2
From: Juzhe-Zhong
1. Remove magic number of V4
2. Remove unnecessary gcc_assert
Consider this following case:
typedef int64_t vnx32di __attribute__ ((vector_size (256)));
__attribute__ ((noipa)) void
f_vnx32di (int64_t a, int64_t b, int64_t *out)
{
vnx32di v
= {a, b, a, b, a, b, a, b, a,
