Am 17.09.2014 um 15:14 schrieb Matthias Klose:
> Am 17.09.2014 um 00:03 schrieb James Greenhalgh:
>> If you have any other suggestions, or if "=&r" is actually correct and
>> I am misreading the documentation please let me know.
>
> with this patch I see a lot of ICEs in the testsuite for test cas
Am 17.09.2014 um 15:14 schrieb Matthias Klose:
> Am 17.09.2014 um 00:03 schrieb James Greenhalgh:
>> If you have any other suggestions, or if "=&r" is actually correct and
>> I am misreading the documentation please let me know.
>
> with this patch I see a lot of ICEs in the testsuite for test cas
Am 17.09.2014 um 00:03 schrieb James Greenhalgh:
> If you have any other suggestions, or if "=&r" is actually correct and
> I am misreading the documentation please let me know.
with this patch I see a lot of ICEs in the testsuite for test cases built with
-O3 (and a build defaulting to -fstack-pr
On 16/09/14 23:03, James Greenhalgh wrote:
> On Tue, Sep 16, 2014 at 10:36:08PM +0100, Andrew Pinski wrote:
>> On Thu, Sep 4, 2014 at 1:18 AM, James Greenhalgh
>> wrote:
>>> On Thu, Sep 04, 2014 at 08:42:31AM +0100, Venkataramanan Kumar wrote:
Hi maintainers,
I just added "=r" and r
On Tue, Sep 16, 2014 at 3:03 PM, James Greenhalgh
wrote:
> On Tue, Sep 16, 2014 at 10:36:08PM +0100, Andrew Pinski wrote:
>> On Thu, Sep 4, 2014 at 1:18 AM, James Greenhalgh
>> wrote:
>> > On Thu, Sep 04, 2014 at 08:42:31AM +0100, Venkataramanan Kumar wrote:
>> >> Hi maintainers,
>> >>
>> >> I ju
On Tue, Sep 16, 2014 at 10:36:08PM +0100, Andrew Pinski wrote:
> On Thu, Sep 4, 2014 at 1:18 AM, James Greenhalgh
> wrote:
> > On Thu, Sep 04, 2014 at 08:42:31AM +0100, Venkataramanan Kumar wrote:
> >> Hi maintainers,
> >>
> >> I just added "=r" and retested it.
> >
> > I had a very similar patch
Hi Andrew,
Thanks for pointing that.
I thought "&" modifier is enough to say that operand is early
clobbered and so GCC will use a different register and it will not
allocate same register that was given to a input operand.
Lookign at the the bug it looks like "=" is needed for the clobber,
so t
On Thu, Sep 4, 2014 at 1:18 AM, James Greenhalgh
wrote:
> On Thu, Sep 04, 2014 at 08:42:31AM +0100, Venkataramanan Kumar wrote:
>> Hi maintainers,
>>
>> I just added "=r" and retested it.
>
> I had a very similar patch to this sitting in my local tree. However,
> I am surprised you have left opera
On 8 September 2014 16:36, Venkataramanan Kumar
wrote:
> Hi Marcus,
>
> I up streamed the changes to trunk.
>
> There is no support for stack protection in FSF GCC 4.9 branch yet.
Quite right, ignore my back port request.
Cheers
/Marcus
Hi Marcus,
I up streamed the changes to trunk.
There is no support for stack protection in FSF GCC 4.9 branch yet.
So I need to back port r209712 and this change together.
regards,
Venkat.
On 5 September 2014 21:17, Marcus Shawcroft wrote:
> On 4 September 2014 19:19, Venkataramanan Kumar
>
On 4 September 2014 19:19, Venkataramanan Kumar
wrote:
> Hi James,
>
> Yes we can just mark operand 3 as "&r".
>
> PFB, the updated patch. Ok for trunk?
>
> regards,
> Venkat.
>
> gcc/ChangeLog
>
> 2014-09-04 Venkataramanan Kumar
>
> * config/aarch64/aarch64.md (stack_protect_test_) Add r
Hi James,
Yes we can just mark operand 3 as "&r".
PFB, the updated patch. Ok for trunk?
regards,
Venkat.
gcc/ChangeLog
2014-09-04 Venkataramanan Kumar
* config/aarch64/aarch64.md (stack_protect_test_) Add register
constraint for operand 0 and remove write only constraint from o
On Thu, Sep 04, 2014 at 08:42:31AM +0100, Venkataramanan Kumar wrote:
> Hi maintainers,
>
> I just added "=r" and retested it.
I had a very similar patch to this sitting in my local tree. However,
I am surprised you have left operand 3 as an output operand. In my tree
I had marked operand 3 as "&
Hi maintainers,
I just added "=r" and retested it.
gcc/ChangeLog
2014-09-04 Venkataramanan Kumar
* config/aarch64/aarch64.md (stack_protect_test_) Add register
constraint for operand 0.
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index b5be79c..ed6
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