RE: [PATCH V3] MATCH: Optimize COND_ADD_LEN reduction pattern

2023-09-26 Thread Li, Pan2
Committed as passed x86 bootstrap and regression test, thanks Richard. Pan -Original Message- From: Richard Biener Sent: Tuesday, September 26, 2023 7:35 PM To: Juzhe-Zhong Cc: gcc-patches@gcc.gnu.org; richard.sandif...@arm.com Subject: Re: [PATCH V3] MATCH: Optimize COND_ADD_LEN reduc

RE: [PATCH] ifcvt: Fix comments

2023-09-27 Thread Li, Pan2
Committed, thanks Richard. Pan -Original Message- From: Richard Biener Sent: Wednesday, September 27, 2023 3:18 PM To: Juzhe-Zhong Cc: gcc-patches@gcc.gnu.org; richard.sandif...@arm.com; jeffreya...@gmail.com Subject: Re: [PATCH] ifcvt: Fix comments On Wed, 27 Sep 2023, Juzhe-Zhong wr

RE: [PATCH v1] RISC-V: Support FP roundeven auto-vectorization

2023-09-27 Thread Li, Pan2
Committed, thanks Juzhe. Pan From: juzhe.zh...@rivai.ai Sent: Wednesday, September 27, 2023 4:24 PM To: Li, Pan2 ; gcc-patches Cc: Li, Pan2 ; Wang, Yanzhang ; kito.cheng Subject: Re: [PATCH v1] RISC-V: Support FP roundeven auto-vectorization LGTM juzhe.zh

RE: [PATCH v1] Mode-Switching: Add optional EMIT_AFTER hook

2023-09-27 Thread Li, Pan2
Almost forget about this patch, sorry for disturbing and kindly ping again. Pan -Original Message- From: Gcc-patches On Behalf Of Li, Pan2 via Gcc-patches Sent: Monday, September 11, 2023 4:37 PM To: Jeff Law ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; Wang, Yanzhang ; kito.ch

RE: [PATCH v3] Vect: Support truncate after .SAT_SUB pattern in zip

2024-06-26 Thread Li, Pan2
> OK Committed, thanks Richard. Pan -Original Message- From: Richard Biener Sent: Thursday, June 27, 2024 2:04 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v3] Vect: Supp

RE: [PATCH v2] Internal-fn: Support new IFN SAT_TRUNC for unsigned scalar int

2024-06-26 Thread Li, Pan2
> OK. Committed, thanks Richard. Pan -Original Message- From: Richard Biener Sent: Thursday, June 27, 2024 2:08 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v2] Internal

RE: [PATCH v2] Vect: Support truncate after .SAT_SUB pattern in zip

2024-06-27 Thread Li, Pan2
iginal Message- From: Uros Bizjak Sent: Thursday, June 27, 2024 2:48 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com; jeffreya...@gmail.com; pins...@gmail.com Subject: Re: [PATCH v2] Vect: Support truncate after .SAT_SUB p

RE: [PATCH v1] Match: Support more forms for the scalar unsigned .SAT_SUB

2024-06-27 Thread Li, Pan2
return UINT32_MAX; } return tmp; } Pan -Original Message- From: Andrew Pinski Sent: Thursday, June 27, 2024 3:32 PM To: Li, Pan2 Cc: Richard Biener ; gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com; rdapp@gmail.com Subject: Re: [

RE: [PATCH v3] Vect: Support truncate after .SAT_SUB pattern in zip

2024-06-27 Thread Li, Pan2
by the vectorizable_conversion or we need some improvements from other pass. Thanks a lot. Pan -Original Message- From: Li, Pan2 Sent: Thursday, June 27, 2024 2:14 PM To: Richard Biener Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com;

RE: [PATCH v1] Match: Support imm form for unsigned scalar .SAT_ADD

2024-06-28 Thread Li, Pan2
> OK with those changes. Thanks Richard for comments, will make the changes and commit if no surprise from test suites. Pan -Original Message- From: Richard Biener Sent: Friday, June 28, 2024 9:12 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito

RE: [PATCH v3] Vect: Support truncate after .SAT_SUB pattern in zip

2024-06-28 Thread Li, Pan2
ake costing and codegen harder. Yes, you are right. It is not ssa_name during simple use check and then return failures to vectorization_convertion. Pan -Original Message- From: Tamar Christina Sent: Friday, June 28, 2024 9:39 PM To: Richard Biener ; Li, Pan2 Cc: gcc-patches@gcc.gnu.or

RE: [PATCH v2] RISC-V: Implement the .SAT_TRUNC for scalar

2024-07-02 Thread Li, Pan2
This stuff looks like > basic integer ops, so I don't see why Pmode is appropriate. The incoming operand may be HI/QI/SImode, so we need to prompt the mode. So there we should take Xmode? Will update in v2. Pan -Original Message- From: Jeff Law Sent: Wednesday, July 3, 2024 8:30 A

RE: [PATCH v1] Vect: Support IFN SAT_TRUNC for unsigned vector int

2024-07-02 Thread Li, Pan2
Thanks Tamar. Looks I missed the comments part, will update in v2. Pan -Original Message- From: Tamar Christina Sent: Tuesday, July 2, 2024 11:03 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com; jeffreya

RE: [PATCH v1] RISC-V: Fix asm check failure for truncated after SAT_SUB

2024-07-03 Thread Li, Pan2
Committed, thanks Juzhe. Pan From: juzhe.zh...@rivai.ai Sent: Wednesday, July 3, 2024 3:24 PM To: Li, Pan2 ; gcc-patches Cc: kito.cheng ; jeffreyalaw ; Robin Dapp ; Li, Pan2 Subject: Re: [PATCH v1] RISC-V: Fix asm check failure for truncated after SAT_SUB LGTM

RE: [PATCH v1] Match: Allow more types truncation for .SAT_TRUNC

2024-07-03 Thread Li, Pan2
> OK. Committed, thanks Richard. Pan -Original Message- From: Richard Biener Sent: Wednesday, July 3, 2024 5:04 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.com; jeffreya...@gmail.com; rdapp@gmail.com Subject:

RE: [PATCH v2] Vect: Support IFN SAT_TRUNC for unsigned vector int

2024-07-03 Thread Li, Pan2
> OK. Committed, thanks Richard. Pan -Original Message- From: Richard Biener Sent: Wednesday, July 3, 2024 5:06 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.com; jeffreya...@gmail.com; rdapp@gmail.com Subject:

RE: [PATCH v1] Vect: Distribute truncation into .SAT_SUB operands

2024-07-03 Thread Li, Pan2
essage- From: Richard Biener Sent: Wednesday, July 3, 2024 5:03 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.com; jeffreya...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v1] Vect: Distribute truncation into .SAT_SUB ope

RE: [PATCH v1] RISC-V: Bugfix vfmv insn honor zvfhmin for FP16 SEW [PR115763]

2024-07-03 Thread Li, Pan2
Committed, thanks Juzhe and Kito. Let’s wait for a while before backport to 14. I suspect there may be similar cases for other insn(s), will double check and fix first. Pan From: Kito Cheng Sent: Wednesday, July 3, 2024 10:32 PM To: juzhe.zh...@rivai.ai Cc: Li, Pan2 ; gcc-patches@gcc.gnu.org

RE: [PATCH v2] RISC-V: Implement the .SAT_TRUNC for scalar

2024-07-03 Thread Li, Pan2
m: Jeff Law Sent: Wednesday, July 3, 2024 11:14 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v2] RISC-V: Implement the .SAT_TRUNC for scalar On 7/2/24 7:16 PM, Li, Pan2 wrote: > Thanks Jeff for comments. >

RE: [PATCH v2] RISC-V: Implement the .SAT_TRUNC for scalar

2024-07-03 Thread Li, Pan2
e_call_set_lhs (call, lhs); gsi_replace (gsi, call, /* update_eh_info */ true); } } Pan -Original Message- From: Jeff Law Sent: Thursday, July 4, 2024 9:52 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com Subject: Re

RE: [PATCH v2] RISC-V: Implement the .SAT_TRUNC for scalar

2024-07-04 Thread Li, Pan2
takes GPR instead of ANYI, and I am not sure if we need to adjust the middle-end for the fn_supported check (failed to find similar case from tree-ssa-math-opts.cc). Additionally, we may need to improve the usadd/ussub for almost the same scenarios. Pan -Original Message- From: Li, Pan2

RE: [PATCH v2] Vect: Distribute truncation into .SAT_SUB operands

2024-07-08 Thread Li, Pan2
only rely on vect_look_through_possible_promotion > and scrapping > the use of ranges. Oh, got it, will update in v3. Pan -Original Message- From: Richard Biener Sent: Monday, July 8, 2024 7:40 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.

RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form 1

2024-07-08 Thread Li, Pan2
Thanks Jeff. > Do we really need stdio.h? If not, let's avoid this hunk. No, should be debug code, will remove it and commit the series. Pan -Original Message- From: Jeff Law Sent: Tuesday, July 9, 2024 1:34 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai;

RE: [PATCH v2] RISC-V: Implement the .SAT_TRUNC for scalar

2024-07-08 Thread Li, Pan2
ween the scalar and vector expander. Back to this patch, looks for now we can only leverage gen_lowpart to perform the widen for the right stmt. If so and my understanding is correct, I will rebase this patch in v3. Pan -Original Message- From: Jeff Law Sent: Tuesday, July 9, 2024 4:44 AM

RE: [PATCH v1] RISC-V: Bugfix vfmv insn honor zvfhmin for FP16 SEW [PR115763]

2024-07-08 Thread Li, Pan2
Backported to gcc 14 already. Pan From: Li, Pan2 Sent: Wednesday, July 3, 2024 10:41 PM To: Kito Cheng ; juzhe.zh...@rivai.ai Cc: gcc-patches@gcc.gnu.org; jeffreya...@gmail.com; rdapp@gmail.com Subject: RE: [PATCH v1] RISC-V: Bugfix vfmv insn honor zvfhmin for FP16 SEW [PR115763] Committed

RE: [PATCH v1] Match: Support form 2 for the .SAT_TRUNC

2024-07-10 Thread Li, Pan2
> OK. Committed, thanks Richard. Pan -Original Message- From: Richard Biener Sent: Wednesday, July 10, 2024 5:24 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.com; jeffreya...@gmail.com; rdapp@gmail.com;

RE: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call

2024-07-10 Thread Li, Pan2
, 2024 7:36 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.com; jeffreya...@gmail.com; rdapp@gmail.com; Liu, Hongtao Subject: Re: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call On Wed, Jul 10,

RE: [PATCH v3] Vect: Optimize truncation for .SAT_SUB operands

2024-07-10 Thread Li, Pan2
> OK. Committed, thanks Richard. Pan -Original Message- From: Richard Biener Sent: Wednesday, July 10, 2024 7:26 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.com; jeffreya...@gmail.com; rdapp@gmail.com;

RE: [PATCH v1] RISC-V: Add testcases for vector .SAT_SUB in zip benchmark

2024-07-11 Thread Li, Pan2
Committed, thanks Juzhe. Pan From: juzhe.zh...@rivai.ai Sent: Thursday, July 11, 2024 6:32 PM To: Li, Pan2 ; gcc-patches Cc: kito.cheng ; jeffreyalaw ; Robin Dapp ; Li, Pan2 Subject: Re: [PATCH v1] RISC-V: Add testcases for vector .SAT_SUB in zip benchmark LGTM

RE: [PATCH] RISC-V: Fix testcase for vector .SAT_SUB in zip benchmark

2024-07-12 Thread Li, Pan2
Thanks Jeff and Edwin for my silly mistake. Pan -Original Message- From: Jeff Law Sent: Saturday, July 13, 2024 5:40 AM To: Edwin Lu ; gcc-patches@gcc.gnu.org Cc: Li, Pan2 ; gnu-toolch...@rivosinc.com Subject: Re: [PATCH] RISC-V: Fix testcase for vector .SAT_SUB in zip benchmark On

RE: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call

2024-07-16 Thread Li, Pan2
warn_if_not_align:0 symtab:0 alias-set -1 canonical-type 0x76a437e0 precision:64 min max pointer_to_this > visited def_stmt _4 = *_3; version:4> (gdb) call debug_tree (_q41) constant 129> Pan -Original Message- From: Richard Biener Sent: Wednesday, July

RE: [PATCH v1] Internal-fn: Support new IFN SAT_TRUNC for unsigned scalar int

2024-07-17 Thread Li, Pan2
ate md.texi to add them? Thanks Andrew, almost forgot this, will add it soon. Pan -Original Message- From: Andrew Pinski Sent: Thursday, July 18, 2024 6:59 AM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com; jeffr

RE: [PATCH v1] Match: Bugfix .SAT_TRUNC honor types has no mode precision [PR115961]

2024-07-17 Thread Li, Pan2
Thanks all, will have a try in v2. Pan -Original Message- From: Richard Sandiford Sent: Thursday, July 18, 2024 5:14 AM To: Andrew Pinski Cc: Tamar Christina ; Richard Biener ; Li, Pan2 ; gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com

RE: [PATCH v1] Doc: Add Standard-Names ustrunc and sstrunc for integer modes

2024-07-18 Thread Li, Pan2
Thanks Richard and Andrew, will commit v2 with that changes. https://gcc.gnu.org/pipermail/gcc-patches/2024-July/657617.html Pan -Original Message- From: Richard Biener Sent: Thursday, July 18, 2024 3:00 PM To: Andrew Pinski Cc: Li, Pan2 ; gcc-patches@gcc.gnu.org; juzhe.zh

RE: [PATCH v1] Match: Only allow single use of MIN_EXPR for SAT_TRUNC form 2 [PR115863]

2024-07-18 Thread Li, Pan2
UNSIGNED (TREE_TYPE (captures[0])) && single_use (captures[1]) // explicit single_use check. Pan -Original Message- From: Tamar Christina Sent: Thursday, July 18, 2024 8:36 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com; jef

RE: [PATCH v1] Match: Only allow single use of MIN_EXPR for SAT_TRUNC form 2 [PR115863]

2024-07-18 Thread Li, Pan2
> Otherwise the patch looks good to me. Thanks Richard, will commit with the log updated. Pan -Original Message- From: Richard Biener Sent: Thursday, July 18, 2024 9:27 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.

RE: [PATCH v2] RISC-V: More support of vx and vf for autovec comparison

2024-07-19 Thread Li, Pan2
loat imm is -0.0 (notice only +0.0 is mentioned)? If so we can have similar tests as +0.0 here. It is totally Ok if -0.0f is not applicable here. Pan -Original Message- From: demin.han Sent: Friday, July 19, 2024 4:55 PM To: gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch

RE: [PATCH v1] Internal-fn: Only allow modes describe types for internal fn[PR115961]

2024-07-19 Thread Li, Pan2
Thanks Richard S for comments and suggestions, updated in v2. Pan -Original Message- From: Richard Sandiford Sent: Friday, July 19, 2024 3:46 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com; tamar.christ...@arm.com

RE: [PATCH v4 1/3] Internal-fn: Support new IFN SAT_ADD for unsigned scalar int

2024-05-14 Thread Li, Pan2
, we can add it back in future if we really changed cfg, will update in v5 (include vect patch 2/3) after all test passed. Pan -Original Message- From: Richard Biener Sent: Tuesday, May 14, 2024 9:18 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.

RE: [PATCH v5 1/3] Internal-fn: Support new IFN SAT_ADD for unsigned scalar int

2024-05-15 Thread Li, Pan2
> LGTM but you'll need an OK from Richard, > Thanks for working on this! Thanks Tamar for help and coaching, let's wait Richard for a while,😊! Pan -Original Message- From: Tamar Christina Sent: Wednesday, May 15, 2024 5:12 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.

RE: [PATCH v4] DSE: Fix ICE after allow vector type in get_stored_val

2024-05-15 Thread Li, Pan2
Kindly ping, looks no build error from Linaro for arm. Pan -Original Message- From: Li, Pan2 Sent: Friday, May 3, 2024 9:52 AM To: gcc-patches@gcc.gnu.org Cc: jeffreya...@gmail.com; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; Liu, Hongtao ; richard.guent...@gmail.com; Li, Pan2

RE: [PATCH v5 1/3] Internal-fn: Support new IFN SAT_ADD for unsigned scalar int

2024-05-16 Thread Li, Pan2
> OK. Thanks Richard for help and coaching. To double confirm, are you OK with this patch only or for the series patch(es) of SAT middle-end? Thanks again for reviewing and suggestions. Pan -Original Message- From: Richard Biener Sent: Thursday, May 16, 2024 4:10 PM To: Li, Pan2

RE: [PATCH v5 1/3] Internal-fn: Support new IFN SAT_ADD for unsigned scalar int

2024-05-16 Thread Li, Pan2
> For the series, the riscv specific part of course needs riscv approval. Thanks a lot, have a nice day! Pan -Original Message- From: Richard Biener Sent: Thursday, May 16, 2024 7:59 PM To: Li, Pan2 Cc: Tamar Christina ; gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito

RE: [PATCH v2 1/3] Vect: Support loop len in vectorizable early exit

2024-05-16 Thread Li, Pan2
Committed, thanks Richard. Pan -Original Message- From: Richard Biener Sent: Thursday, May 16, 2024 8:13 PM To: Tamar Christina Cc: Li, Pan2 ; gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; Richard Sandiford Subject: Re: [PATCH v2 1/3] Vect: Support loop len

RE: [PATCH v2 2/3] RISC-V: Implement vectorizable early exit with vcond_mask_len

2024-05-16 Thread Li, Pan2
Committed, thanks Juzhe. Pan From: juzhe.zh...@rivai.ai Sent: Thursday, May 16, 2024 8:19 PM To: Li, Pan2 ; gcc-patches Cc: kito.cheng ; tamar.christina ; Richard Biener ; richard.sandiford ; Li, Pan2 Subject: Re: [PATCH v2 2/3] RISC-V: Implement vectorizable early exit with vcond_mask_len

RE: [PATCH v2 3/3] RISC-V: Enable vectorizable early exit testsuite

2024-05-16 Thread Li, Pan2
Committed, thanks Juzhe. Pan From: juzhe.zh...@rivai.ai Sent: Thursday, May 16, 2024 8:19 PM To: Li, Pan2 ; gcc-patches Cc: kito.cheng ; tamar.christina ; Richard Biener ; richard.sandiford ; Li, Pan2 Subject: Re: [PATCH v2 3/3] RISC-V: Enable vectorizable early exit testsuite RISC-V part

RE: [PATCH v5 1/3] Internal-fn: Support new IFN SAT_ADD for unsigned scalar int

2024-05-16 Thread Li, Pan2
741824]: # _2 = PHI <65535(2), _1(3)> return _2; } Pan -Original Message- From: Tamar Christina Sent: Wednesday, May 15, 2024 5:12 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com; Liu, Hongtao Subject: RE: [

RE: [PATCH v6] RISC-V: Implement IFN SAT_ADD for both the scalar and vector

2024-05-17 Thread Li, Pan2
Committed with more comments, thanks Robin. Pan -Original Message- From: Robin Dapp Sent: Saturday, May 18, 2024 3:32 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: rdapp@gmail.com; juzhe.zh...@rivai.ai; kito.ch...@gmail.com Subject: Re: [PATCH v6] RISC-V: Implement IFN SAT_ADD for

RE: [PATCH v5 1/3] Internal-fn: Support new IFN SAT_ADD for unsigned scalar int

2024-05-17 Thread Li, Pan2
Thanks Tamer for enlightening, will have a try for the ingenious idea! Pan -Original Message- From: Tamar Christina Sent: Friday, May 17, 2024 10:46 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com; Liu, Hongtao

RE: [PATCH] Add widening expansion of MULT_HIGHPART_EXPR for integral modes

2024-05-18 Thread Li, Pan2
Hi Botcazou, Just notice that this patch may result in some ICE when build libc++ for the riscv port, details as below. Please note not all configuration can reproduce this issue, feel free to ping me if you cannot reproduce this issue. CC more riscv port people for awareness. during GIMPLE pas

RE: [PATCH] Add widening expansion of MULT_HIGHPART_EXPR for integral modes

2024-05-19 Thread Li, Pan2
Thanks for quick response, 😉! Pan -Original Message- From: Eric Botcazou Sent: Sunday, May 19, 2024 5:40 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; Robin Dapp ; Jeff Law Subject: Re: [PATCH] Add widening expansion of MULT_HIGHPART_EXPR

RE: [PATCH v4] DSE: Fix ICE after allow vector type in get_stored_val

2024-05-19 Thread Li, Pan2
Committed, thanks Jeff. Let's wait for a while before backporting. Pan -Original Message- From: Jeff Law Sent: Monday, May 20, 2024 12:23 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; Liu, Hongtao ; richard.guent...@gmail.com Subjec

RE: [PATCH v1] Match: Extract integer_types_ternary_match helper to avoid code dup [NFC]

2024-05-20 Thread Li, Pan2
Thanks Andrew for comments, updated in v2. Pan From: Andrew Pinski Sent: Sunday, May 19, 2024 12:25 PM To: Li, Pan2 Cc: GCC Patches ; 钟居哲 ; Kito Cheng ; Tamar Christina ; Richard Guenther Subject: Re: [PATCH v1] Match: Extract integer_types_ternary_match helper to avoid code dup [NFC] On

RE: [PATCH v1] Match: Extract integer_types_ternary_match helper to avoid code dup [NFC]

2024-05-20 Thread Li, Pan2
ina Sent: Monday, May 20, 2024 7:20 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com Subject: RE: [PATCH v1] Match: Extract integer_types_ternary_match helper to avoid code dup [NFC] > -Original Message- > F

RE: [PATCH v3] Match: Extract ternary_integer_types_match_p helper func [NFC]

2024-05-21 Thread Li, Pan2
> Thanks, looks good to me! You still need approval from a maintainer.. Thanks Tamar, let's wait for a while, 😊! Pan -Original Message- From: Tamar Christina Sent: Tuesday, May 21, 2024 11:19 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@g

RE: [PATCH v1 1/2] Match: Support __builtin_add_overflow branch form for unsigned SAT_ADD

2024-05-21 Thread Li, Pan2
, right? My initial idea is to catch both the (IFN_ADD_OVERFLOW @0 @1) and (IFN_ADD_OVERFLOW @1 @0). It is unnecessary if IFN_ADD_OVERFLOW takes care of this already. Pan From: Andrew Pinski Sent: Tuesday, May 21, 2024 7:40 PM To: Li, Pan2 Cc: GCC Patches ; 钟居哲 ; Kito Cheng ; Tamar Chris

RE: [PATCH v1 1/2] Match: Support __builtin_add_overflow branch form for unsigned SAT_ADD

2024-05-21 Thread Li, Pan2
a better understanding for this. Pan -Original Message- From: Andrew Pinski Sent: Tuesday, May 21, 2024 8:34 PM To: Li, Pan2 Cc: GCC Patches ; 钟居哲 ; Kito Cheng ; Tamar Christina ; Richard Guenther Subject: Re: [PATCH v1 1/2] Match: Support __builtin_add_overflow branch form for unsigne

RE: [PATCH v2] Match: Extract integer_types_ternary_match helper to avoid code dup [NFC]

2024-05-22 Thread Li, Pan2
here. Pan -Original Message- From: Richard Biener Sent: Wednesday, May 22, 2024 9:04 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.com; pins...@gmail.com Subject: Re: [PATCH v2] Match: Extract integer_types_ternary_match

RE: [PATCH v1 1/2] Match: Support __builtin_add_overflow for branchless unsigned SAT_ADD

2024-05-22 Thread Li, Pan2
Thanks Richard for comments, will merge the rest form of .SAT_ADD in one middle end patch for fully picture, as well as comments addressing. Pan -Original Message- From: Richard Biener Sent: Wednesday, May 22, 2024 9:16 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh

RE: [PATCH v2] Match: Support __builtin_add_overflow branch form for unsigned SAT_ADD

2024-05-22 Thread Li, Pan2
widen-mult). Not sure if my understanding is correct or not, thanks again for help. #define SAT_ADD_U_1(T) \ T sat_add_u_1_##T(T x, T y) \ { \ return (T)(x + y) >= x ? (x + y) : -1; \ } SAT_ADD_U_1(uint8_t); Pan -Original Message- From: Richard Biener Sent: Wednesday, May 22, 2024 9

RE: [PATCH v2] Match: Support __builtin_add_overflow branch form for unsigned SAT_ADD

2024-05-23 Thread Li, Pan2
55; return _2; } -Original Message- From: Li, Pan2 Sent: Thursday, May 23, 2024 12:17 PM To: Richard Biener Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.com; pins...@gmail.com Subject: RE: [PATCH v2] Match: Support __builtin_add_overflow

RE: [PATCH v4] Match: Add overloaded types_match to avoid code dup [NFC]

2024-05-23 Thread Li, Pan2
> the above three lines are redundant. > OK with those removed. Got it, will commit it after no surprise in test for removal. Pan -Original Message- From: Richard Biener Sent: Thursday, May 23, 2024 7:49 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; k

RE: [PATCH v4] Match: Add overloaded types_match to avoid code dup [NFC]

2024-05-23 Thread Li, Pan2
Committed as passed below test suites, thanks Richard. * The rv64gcv fully regression test. * The x86 bootstrap test. * The x86 regression test. Pan -Original Message- From: Li, Pan2 Sent: Thursday, May 23, 2024 8:06 PM To: Richard Biener Cc: gcc-patches@gcc.gnu.org

RE: [PATCH v2] Match: Support __builtin_add_overflow branch form for unsigned SAT_ADD

2024-05-23 Thread Li, Pan2
o_gimple_cond (cond_bb, phi, arg0, arg1)) +return true; + stmt = last_nondebug_stmt (cond_bb); /* We need to know which is the true edge and which is the false -Original Message- From: Jeff Law Sent: Thursday, May 23, 2024 10:59 PM To: Richard Biener ; Li, Pan2 Cc

RE: [PATCH v2] Match: Support __builtin_add_overflow branch form for unsigned SAT_ADD

2024-05-24 Thread Li, Pan2
genmatch) 2. Leverage this helper in widen-mul and recog it as .SAT_ADD if matches. Will have a try and keep you posted. Pan -Original Message- From: Richard Biener Sent: Friday, May 24, 2024 3:21 PM To: Li, Pan2 Cc: Jeff Law ; gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch

RE: [PATCH][v2] tree-optimization/115144 - improve sinking destination choice

2024-05-26 Thread Li, Pan2
Hi Richard, Looks this commit may result one ICE similar as below when build the newlib, feel free to ping me if you need one PR for this. CC RISC-V port for awareness. In file included from /home/pli/gcc/111/riscv-gnu-toolchain/newlib/newlib/libc/stdlib/setenv_r.c:26: /home/pli/gcc/111/riscv-

RE: [PATCH v1] Gen-Match: Fix gen_kids_1 right hand braces mis-alignment

2024-05-26 Thread Li, Pan2
Committed, thanks Jeff. Pan -Original Message- From: Jeff Law Sent: Sunday, May 26, 2024 9:59 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com Subject: Re: [PATCH v1] Gen-Match: Fix gen_kids_1 right hand braces mis

RE: [PATCH v3] Match: Support more form for scalar unsigned SAT_ADD

2024-05-29 Thread Li, Pan2
To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.com Subject: Re: [PATCH v3] Match: Support more form for scalar unsigned SAT_ADD On Mon, May 27, 2024 at 8:29 AM wrote: > > From: Pan Li > > After we support one gassign form of

RE: [PATCH v1 1/5] RISC-V: Add testcases for scalar unsigned SAT_ADD form 1

2024-06-02 Thread Li, Pan2
Thanks Juzhe, will commit it after the middle-end patch, as well as the rest similar 4 patches. Pan From: juzhe.zh...@rivai.ai Sent: Monday, June 3, 2024 11:19 AM To: Li, Pan2 ; gcc-patches Cc: kito.cheng ; Li, Pan2 Subject: Re: [PATCH v1 1/5] RISC-V: Add testcases for scalar unsigned

RE: [PATCH v1] RISC-V: Implement the quad and oct .SAT_TRUNC for scalar

2024-08-07 Thread Li, Pan2
Kindly ping++. Pan -Original Message- From: Li, Pan2 Sent: Wednesday, July 31, 2024 9:12 AM To: gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com; rdapp@gmail.com Subject: RE: [PATCH v1] RISC-V: Implement the quad and oct .SAT_TRUNC for

RE: [PATCH v2] Internal-fn: Handle vector bool type for type strict match mode [PR116103]

2024-08-08 Thread Li, Pan2
Hi Richard S, Please feel free to let me know if there is any further comments in v2. Thanks a lot. Pan -Original Message- From: Li, Pan2 Sent: Thursday, August 1, 2024 8:11 PM To: Richard Biener Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ

RE: [PATCH v1] RISC-V: Bugfix incorrect operand for vwsll auto-vect

2024-08-10 Thread Li, Pan2
l Message- From: Robin Dapp Sent: Saturday, August 10, 2024 10:32 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com; Robin Dapp Subject: Re: [PATCH v1] RISC-V: Bugfix incorrect operand for vwsll auto-vect A bit of bikeshedding:

RE: [PATCH v1] RISC-V: Make sure high bits of usadd operands is clean for HI/QI [PR116278]

2024-08-10 Thread Li, Pan2
up. Thanks Jeff, let me have a try in v2. Pan -Original Message- From: Jeff Law Sent: Saturday, August 10, 2024 11:34 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v1] RISC-V: Make sure high bits of usadd

RE: [PATCH v2] RISC-V: Make sure high bits of usadd operands is clean for HI/QI [PR116278]

2024-08-12 Thread Li, Pan2
v3 to ensure this. Pan -Original Message- From: Jeff Law Sent: Tuesday, August 13, 2024 12:58 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v2] RISC-V: Make sure high bits of usadd operands is clean for

RE: [PATCH v2] Internal-fn: Handle vector bool type for type strict match mode [PR116103]

2024-08-13 Thread Li, Pan2
> Looks good to me too. Sorry, didn't realise you were waiting for a second > ack. Never mind, thanks Richard S for confirmation and suggestions. Pan -Original Message- From: Richard Sandiford Sent: Tuesday, August 13, 2024 5:25 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.or

RE: [PATCH v2] RISC-V: Support IMM for operand 0 of ussub pattern

2024-08-13 Thread Li, Pan2
This Patch may requires rebase, will send v3 for conflict resolving. Pan -Original Message- From: Li, Pan2 Sent: Sunday, August 4, 2024 7:48 PM To: gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com; rdapp@gmail.com; Li, Pan2 Subject

RE: [PATCH v2] RISC-V: Support IMM for operand 0 of ussub pattern

2024-08-13 Thread Li, Pan2
given the incoming rtx x is const_int which is DImode(integer promoted) for ussub. I will rebase this patch after PR116278 commit, and give a try for this. Pan -Original Message- From: Jeff Law Sent: Wednesday, August 14, 2024 11:33 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.

RE: [PATCH v2] RISC-V: Make sure high bits of usadd operands is clean for HI/QI [PR116278]

2024-08-13 Thread Li, Pan2
> a1, then no-overflow as expected. Pan -Original Message- From: Jeff Law Sent: Wednesday, August 14, 2024 12:03 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v2] RISC-V: Make sure high bits of usadd opera

RE: [PATCH v2] RISC-V: Support IMM for operand 0 of ussub pattern

2024-08-13 Thread Li, Pan2
> But you're shifting a REG, not a CONST_INT. I see, we can make a QImode REG to be moved to, and then zero_extend. Thanks Jeff for enlightening me, and will send v3 for this. Pan -Original Message- From: Jeff Law Sent: Wednesday, August 14, 2024 11:52 AM To: Li, Pan2 ; gcc

RE: [PATCH] RISC-V: Fix factor in dwarf_poly_indeterminate_value [PR116305]

2024-08-16 Thread Li, Pan2
Hi there, Please feel free to let me know if you don't have authority to commit it. I can help to commit this patch. Pan -Original Message- From: Kito Cheng Sent: Friday, August 16, 2024 3:48 PM To: 曾治金 Cc: gcc-patches@gcc.gnu.org; gcc-b...@gcc.gnu.org Subject: Re: [PATCH] RISC-V: F

RE: [PATCH v2] RISC-V: Make sure high bits of usadd operands is clean for HI/QI [PR116278]

2024-08-16 Thread Li, Pan2
August 16, 2024 12:28 PM To: Jeff Law Cc: Li, Pan2 ; gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v2] RISC-V: Make sure high bits of usadd operands is clean for HI/QI [PR116278] On Thu, Aug 15, 2024 at 9:23 PM Jeff Law wrote: > &

RE: [PATCH] RISC-V: Fix factor in dwarf_poly_indeterminate_value [PR116305]

2024-08-16 Thread Li, Pan2
skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". Pan -Original Message- From: Zhijin Zeng Sent: Friday, August 16, 2024 8:47 PM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; gcc-b...@gcc.gnu.org; Kito

RE: [PATCH] RISC-V: Fix factor in dwarf_poly_indeterminate_value [PR116305]

2024-08-16 Thread Li, Pan2
t; [PR116305] > hint: Use 'git am --show-current-patch=diff' to see the failed patch > When you have resolved this problem, run "git am --continue". > If you prefer to skip this patch, run "git am --skip" instead. > To restore the original branch

RE: [PATCH] RISC-V: Fix factor in dwarf_poly_indeterminate_value [PR116305]

2024-08-16 Thread Li, Pan2
Ok, I will commit it if no surprise from test as manually changing. Pan -Original Message- From: Zhijin Zeng Sent: Saturday, August 17, 2024 10:46 AM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; gcc-b...@gcc.gnu.org; Kito Cheng Subject: Re: [PATCH] RISC-V: Fix factor in

RE: [PATCH] RISC-V: Fix factor in dwarf_poly_indeterminate_value [PR116305]

2024-08-16 Thread Li, Pan2
Should be in upstream already. Pan -Original Message- From: Li, Pan2 Sent: Saturday, August 17, 2024 11:45 AM To: Zhijin Zeng Cc: gcc-patches@gcc.gnu.org; gcc-b...@gcc.gnu.org; Kito Cheng Subject: RE: [PATCH] RISC-V: Fix factor in dwarf_poly_indeterminate_value [PR116305] Ok, I

RE: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call

2024-08-16 Thread Li, Pan2
Thanks Richard for confirmation. Sorry almost forget this thread. Hi Jakub, Please feel free to let me know if there is anything I can do to fix this issue. Thanks a lot. Pan -Original Message- From: Richard Biener Sent: Tuesday, July 16, 2024 11:29 PM To: Li, Pan2 Cc: gcc-patches

RE: [PATCH v1] RISC-V: Bugfix incorrect operand for vwsll auto-vect

2024-08-17 Thread Li, Pan2
> Thanks. I've pushed this to the trunk. Thanks a lot, Jeff. Pan -Original Message- From: Jeff Law Sent: Saturday, August 17, 2024 11:27 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v1

RE: [PATCH v4] RISC-V: Make sure high bits of usadd operands is clean for non-Xmode [PR116278]

2024-08-17 Thread Li, Pan2
Thanks for your patience on this. Thanks Jeff for comments and suggestions, I will have a try if we can do some combine-like optimization for the SImode asm in RV64. Pan -Original Message- From: Jeff Law Sent: Sunday, August 18, 2024 2:17 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.o

RE: [PATCH v1] RISC-V: Implement the quad and oct .SAT_TRUNC for scalar

2024-08-17 Thread Li, Pan2
rom: Jeff Law Sent: Sunday, August 18, 2024 2:21 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v1] RISC-V: Implement the quad and oct .SAT_TRUNC for scalar On 7/22/24 11:06 PM, pan2...@intel.com wrote: >

RE: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call

2024-08-17 Thread Li, Pan2
: Sunday, August 18, 2024 5:21 AM To: Li, Pan2 Cc: Richard Biener ; gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; tamar.christ...@arm.com; jeffreya...@gmail.com; rdapp@gmail.com; Liu, Hongtao Subject: Re: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for

RE: [PATCH v1] Test: Move pr116278 run test to c-torture [NFC]

2024-08-18 Thread Li, Pan2
Sure, will send v2 for this. Pan -Original Message- From: Jeff Law Sent: Sunday, August 18, 2024 11:19 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: richard.guent...@gmail.com; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com; s...@gentoo.org Subject: Re: [PATCH v1

RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2

2024-08-18 Thread Li, Pan2
Opps, let me double check what happened to my local tester. Pan -Original Message- From: Jeff Law Sent: Sunday, August 18, 2024 11:21 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v1 1/2] RISC-V: Add

RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2

2024-08-18 Thread Li, Pan2
Please ignore this patch, should be sent by mistake. Pan -Original Message- From: Li, Pan2 Sent: Monday, August 19, 2024 10:04 AM To: gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com; rdapp@gmail.com; Li, Pan2 Subject: [PATCH v1 1/2

RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2

2024-08-18 Thread Li, Pan2
Turn out that the pre-commit doesn't pick up the newest upstream when testing this patch. Pan -Original Message- From: Li, Pan2 Sent: Monday, August 19, 2024 9:25 AM To: Jeff Law ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com Subjec

RE: [PATCH v1 1/2] RISC-V: Add testcases for unsigned scalar quad and oct .SAT_TRUNC form 2

2024-08-19 Thread Li, Pan2
Great! Thanks Patrick. Pan -Original Message- From: Patrick O'Neill Sent: Tuesday, August 20, 2024 12:14 AM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; rdapp@gmail.com; Jeff Law Subject: Re: [PATCH v1 1/2] RISC-V: Add testcase

RE: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call

2024-08-19 Thread Li, Pan2
// need add (T)IMM, aka out[i] = __builtin_add_overflow (in[i], (T)IMM, &ret) ? -1 : ret; to hit the pattern. }\ } Pan -Original Message- From: Tamar Christina Sent: Tuesday, August 20, 2024 3:41 AM To: Jakub J

RE: [PATCH v2] Match: Support form 1 for scalar signed integer .SAT_ADD

2024-08-19 Thread Li, Pan2
Kindly ping. Pan -Original Message- From: Li, Pan2 Sent: Wednesday, August 7, 2024 5:31 PM To: gcc-patches@gcc.gnu.org Cc: richard.guent...@gmail.com; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com; rdapp@gmail.com; Li, Pan2 Subject: [PATCH v2] Match: Support

RE: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call

2024-08-20 Thread Li, Pan2
done there. Got the point here, I will double check all SAT_* related matching pattern for INT_CST type check. Pan -Original Message- From: Tamar Christina Sent: Tuesday, August 20, 2024 3:56 PM To: Li, Pan2 ; Jakub Jelinek Cc: Richard Biener ; gcc-patches@gcc.gnu.org; juzhe.zh...

RE: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call

2024-08-24 Thread Li, Pan2
Friday, August 23, 2024 6:53 PM To: Jakub Jelinek Cc: Li, Pan2 ; gcc-patches@gcc.gnu.org Subject: Re: [PATCH v1] Vect: Promote unsigned .SAT_ADD constant operand for vectorizable_call On Thu, Aug 22, 2024 at 8:36 PM Jakub Jelinek wrote: > > On Tue, Aug 20, 2024 at 01:52:35PM +0200, Richard

RE: [PATCH v1] Match: Add type check for .SAT_ADD imm operand

2024-08-24 Thread Li, Pan2
: Jakub Jelinek Sent: Sunday, August 25, 2024 1:16 AM To: Li, Pan2 Cc: gcc-patches@gcc.gnu.org; richard.guent...@gmail.com; tamar.christ...@arm.com; juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com; rdapp@gmail.com Subject: Re: [PATCH v1] Match: Add type check for .SAT_ADD

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