I've just started using geda, I actually gave it a shot once before
but gave up when the install hit bumps. This time I pushed
through these bumps and have something that sort of works.
Anyway, I thought that I would share my experience and ask
if this was representative:
First, after digging
Am Mittwoch, den 26.07.2006, 06:43 + schrieb Jim Strother:
I've just started using geda, I actually gave it a shot once before
but gave up when the install hit bumps. This time I pushed
through these bumps and have something that sort of works.
Anyway, I thought that I would share my
On Wed, 26 Jul 2006, Lars Friedrich wrote:
Am Mittwoch, den 26.07.2006, 06:43 + schrieb Jim Strother:
I've just started using geda, I actually gave it a shot once before
but gave up when the install hit bumps. This time I pushed
through these bumps and have something that sort of
On Tue, 25 Jul 2006 21:06:10 -0400
George M. Gallant, Jr. [EMAIL PROTECTED] wrote:
This time I am open to suggestions.
David Rowe wrote perls scripts for this. They are very useful. Check it out!
http://www.rowetel.com/perl4pcb.html
Levente
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Em Ter 25 Jul 2006 22:06, George M. Gallant, Jr. escreveu:
I need to take 6 small pcb's and create a single panel (I'm cheap).
Last time I used the brute force of:
1. load the pcb file
2. Create a symbol of the individual design
3. Cut, paste rotate.
This time I am open to
[EMAIL PROTECTED] wrote:
... so it's probably something in there. This computer
is Debian (sid), so its library infrastructure is probably
better tested and debugged than most.
Just installed latest gerbv on an old Debian box.
Bug occurs again there. And I find Debian-Bug-Reports
with
I just noticed that Digikey is now carrying 01005 sized parts.
Looks like they are about the size of a flake of black pepper.
How small a part can you realistically place with tweezers,
soldering iron and/or toaster oven?
I regularly do 0603 with tweezers/magnifying glass/Metcal iron
I've just started using geda, I actually gave it a shot once before
but gave up when the install hit bumps. This time I pushed
through these bumps and have something that sort of works.
Anyway, I thought that I would share my experience and ask
if this was representative:
[ snip ]
This
George M. Gallant, Jr. wrote:
I do homebrew image transfer boards with gschem and pcb. 15 mil trace
expands to
about 20 mil under heat and pressure. 1/4 oz boards are great for etch
time but the
underlying glass fabric causes visible waves in the transfered toner.
George
I am curious as
snip
Also, the folks who say use emerge foo.bar or apt-get baz.woof to
install don't understand that the real problem is the complexity and
lack of coherence of the components in gEDA. Yes, you can do emerge
geda, but what about PCB? How is the totally ignorant user to know
that he also needs
On 7/26/06, Dan McMahill [EMAIL PROTECTED] wrote:
I am curious as to how this really compares in terms of cost to a place
like APCircuits. I've used them a number of times for small 2 layer
boards and they're fast, cheap, and easy to deal with. Its been quite
some time since I priced just
Stefan Salewski wrote:
[EMAIL PROTECTED] wrote:
... so it's probably something in there. This computer
is Debian (sid), so its library infrastructure is probably
better tested and debugged than most.
Just installed latest gerbv on an old Debian box.
Bug occurs again there. And I
Dan,
I estimate a 3 inch by 5 inch board costs me $5.00 to make in the garage and $25.00 via
online board shops. The home brew is of poorer quality and in particular lacks plated thru
holes.
On the plus side. It takes me about 3 hours to print, etch, drill solder said board. As I am
a
El dom, 23-07-2006 a las 23:00 -0400, Ales Hvezda escribió:
[snip]
I want to thank all who attended, physically or virutally, for making
this a fun and enjoyable event. A good time was had by all (including
Yes, definately lots of fun.
I have posted the IRC chat log from
Hi Levente,
this is because gaf doesn't know if the input/output pin is used only as
input, output, or both of them.
Since the designer should know better, gnetlist only warns him about
something it can't check by itself.
If the circuit is ok, don't worry about this message.
Regards,
Carlos
El
Use the latest CVS. The nc symbols and the drc2 backend were fixed
recently.
Regards,
Carlos
El mié, 26-07-2006 a las 17:00 +0200, Levente escribió:
Hi folks,
Could you tell me what to do with unconnected pins? If you leave a pin
unconnected, gnetlis -g drc2 will give errors. If you
Is there a way to determine the board size using an action script?
Action scripts are like really dumb shell scripts - all they do is
run commands, there's no flow control or other common scripting
capabilities. What you really want to do is use a perl script to do
the logic, and have it drive
PS: Maybe you guys should put together a little conference. It
seems like with all of the gEDA developers in one room, there
could be some solid work on consolidating these programs into
a more unified project.
We just did this last Sunday. Three developers, two users. The users
Carlos,
Thank you very much for the info
Levente
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On Wed, 26 Jul 2006, DJ Delorie wrote:
Is there a way to determine the board size using an action script?
Action scripts are like really dumb shell scripts - all they do is
run commands, there's no flow control or other common scripting
capabilities. What you really want to do is use a perl
gEDA people in general,
This e-mail is in the nature of a well done! for your gEDA work. I'm
a hardware designer by training, and among other things I managed a
design system for a university electronics design group for some 10 to
15 years. Following my retirement, I began to use the gEDA
Anyone have an idea why I cannot reproduce the tutorial on my system?
tomdean
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On 7/26/06, User Tomdean [EMAIL PROTECTED] wrote:
Anyone have an idea why I cannot reproduce the tutorial on my system?
tomdean
I was able to load your PCB file and your netlist file.
I did the following:
1. Copied the PCB file contents from your email to a file called j.pcb
2. Copied the
I tried
file-load netlist file
highlight board.net
click open
The load popup closed, no messages, nothing.
window-message log
is empty
connects-optimize rats nest
log window pops up with
'Can't add rat lines because no netlist is loaded.'
file-load
On 7/26/06, User Tomdean [EMAIL PROTECTED] wrote:
I tried
file-load netlist file
highlight board.net
click open
Are you able to load the PCB file and disperse the footprints? I am assuming
that you can.
Is the netlist file board.net the same as the one that is listed below?
(*
I've reproduced this with HID; it seems that netlists loaded from the
File menu aren't enabled by default, but netlists loaded with the .pcb
are. For example, after loading the netlist, save the pcb and load it
again. Presto! Optimize rats works.
Working on it . . .
I checked in this patch, which causes newly loaded netlists to be
enabled by default, instead of the by chance disabled.
Index: file.c
===
RCS file: /cvsroot/pcb/pcb/src/file.c,v
retrieving revision 1.39
diff -p -U2 -r1.39 file.c
file-save layout - closes popup, but, does NOT write a file!
How do you know it doesn't?
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I deleted the file, then did file-save layout.
From the tutorial,
# pcb board.pcb
select-disperse all elements
drag U101 to a new location
file-save layout
file-quit program
OK to lose data? - seems to be a disconnect here
...
file-save layout as
xx.pcb
click open
I applied the patch to src/file.c, rebuilt and reinstalled pcb.
No change!
Something is strange with my installation. I will rebuild everything
related to pcb.
=== pcb-20060414 depends on executable: gm4 - found
=== pcb-20060414 depends on executable: gmake - found
=== pcb-20060414
On 7/26/06, Igor2 [EMAIL PROTECTED] wrote:
snipAlso, the folks who say use emerge foo.bar or apt-get baz.woof toinstall don't understand that the real problem is the complexity andlack of coherence of the components in gEDA.Yes, you can do emerge
geda, but what about PCB?How is the totally
User Tomdean wrote:
I applied the patch to src/file.c, rebuilt and reinstalled pcb.
No change!
Something is strange with my installation. I will rebuild everything
related to pcb.
=== pcb-20060414 depends on executable: gm4 - found
=== pcb-20060414 depends on executable: gmake - found
On Wednesday 26 July 2006 13:42, Igor2 wrote:
Another interesting approach would be to provide a live cd. There are many
live linux distros out there, so it would be possible to add gEDA to one
of them. This way the 'lazy' user could try out the system without needing
to understand parts of
Thanks, Dan.
I updated to 20060422. I can load the netlist.
tomdean
For FreeBSD,
--- Makefile~ Sun Jul 9 23:38:55 2006
+++ MakefileWed Jul 26 14:37:44 2006
@@ -6,7 +6,7 @@
#
PORTNAME= pcb
-PORTVERSION= 20060414
+PORTVERSION= 20060422
CATEGORIES=cad
MASTER_SITES=
On Wednesday 26 July 2006 15:31, Arnim Littek wrote:
Something else I don't understand in the Digikey
description is that they say 01005 (EIA) 402.
What does the EIA 402 mean?
EIA Metric
0402 1005
0603 1608
1206 3216
1210 3225
Bob Paddock wrote:
On Wednesday 26 July 2006 15:31, Arnim Littek wrote:
Something else I don't understand in the Digikey
description is that they say 01005 (EIA) 402.
What does the EIA 402 mean?
EIA Metric
0402 1005
0603 1608
1206 3216
1210 3225
On 7/26/06, Dan McMahill [EMAIL PROTECTED] wrote:
I am curious as to how this really compares in terms of cost to a placelike APCircuits.I've used them a number of times for small 2 layerboards and they're fast, cheap, and easy to deal with.
Thanks for the APCircuits tip! I wonder if anyone else
1210-1206-0603-0402-0201-01005 rather than being Metric?
I checked the data sheets; they're 16 mils long and 8 mils wide. For
comparison, my solder is 20 mils diam. Yeesh. OTOH they're the same
trace width as an 0.50mm pitch TQFP.
Anyone want to put together a challenge kit? Two each 0805
I wonder if anyone else has sources to suggest for cheap 2/4 layer
prototypes?
I posted a spreadsheet at one point; check the archives. The
cheapest depends on what features and size you need, and how long
you're willing to wait for it.
___
On 7/26/06, Taylor Jones [EMAIL PROTECTED] wrote:
Thanks for the APCircuits tip!
I wonder if anyone else has sources to suggest for cheap 2/4 layer
prototypes?
As DJ said it depends on features, size and how long you are willing to wait.
When I do boards (and footprints) I try to use design
I'm testing an etchant I have not used before and will report more tomorrow on
how it goes.
So far making up the recipe it seems easy to work with because it gives visual
indication of where the reaction is by being yellow green or dark green.
The etch bath has H2O2 HCl water and copper
[snip]
Yeah, sure. This is no problem as long as you are aware of it. But I
just spent one day looking for errors in my netlister-backend.
I still think this is a strange behavior.
I spent a little time looking at this during the code sprint.
This is a limitation of how gnetlist finds
DJ Delorie wrote:
1210-1206-0603-0402-0201-01005 rather than being Metric?
I checked the data sheets; they're 16 mils long and 8 mils wide. For
comparison, my solder is 20 mils diam. Yeesh. OTOH they're the same
trace width as an 0.50mm pitch TQFP.
Anyone want to put together a challenge
Our IPC footprints I think bottom out at 0201. But we do have 3 tier
footprints for things like 0201, 0402, 0805, etc. so it would take about
60 seconds to do the board layout (if you skipped the 01005).
I've designed three so far ;-)
With Olimex's standard board, scored and snapped, you
I have been seeing a random signal 11, Segmentation fault in gschem
for the past few days. I cannot pin it down to any action on my part.
Often it happens when gschem does not have focus. Other times it
happens when I am doing something with gschem, but, never the same
thing, as far as I can
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