Hi joseda,
On Freitag, 13. März 2009, joseda wrote:
I've discovered gEDA and ngspice and it's fantastic although there is
a big road to do.
I'm making a work in my university about EDA tools in Linux. My
question: Is there a way to plot a graphic (with a .plot directive in
the netlist file)
On Samstag, 14. März 2009, joseda wrote:
Hi everyone!! 2 question about ngspice.
1) Can I set the background color of the graphic window as white (and
not black) by default?
Yes. You can change all colors:
Please take a look into the NGSPICE User Manual:
-
colorN
These variables
Hi...
This is one of my designs that I have done using gEDA. The board is
Arduino single sided serial board.
Please read this page [1]http://jeffrey.co.in/gnudino/
If there is any mistakes please point out
JEFFREY ANTONY
References
1. http://jeffrey.co.in/gnudino/
Thank you Werner for helping!!
When i've finished a simulation i change the colors with the instruction
set color0=rgb:f/f/f
set color1=rbg:255/255/255
This make the graphic how i like (background in white color). But i would
like this by default to avoid to run the two sentences of set
On Samstag, 14. März 2009, joseda wrote:
When i've finished a simulation i change the colors with the
instruction set color0=rgb:f/f/f
set color1=rbg:255/255/255
This make the graphic how i like (background in white color). But i
would like this by default to avoid to run the two sentences
You can add them to the spinit file. On my box it's located in
/usr/share/ng-spice-rework/scripts/spinit
It's worked. Thanks. Now is nicer!!
No. graphical plots.
(example attached)
Thanks again. It's worked. The point was to add the directives .control and
.endc.
Regards
--
View this
Hi,
Looks nice :)
Better avoid for text as copper on component side.
A lot of resistors with refdes R1, capacitors with C7, no refdesses
on connectors, etc.
I bet you didn't use the gschem - gsch2pcb - pcb tool chain.
My EUR 0.02
Kind regards,
Bert Timmerman.
On Sat, 2009-03-14 at 03:21
Please read this page http://jeffrey.co.in/gnudino/
If there is any mistakes please point out
If my interpretation of your board is correct, you've put all the
components on the same side of the board as all the copper.
Check your drill sizes; 20 mil for an axial diode seems too small to
me.
Hi all,
I have built a simple hierarchical schematic: a testbench with a Vdc, Gnd,
Vpulse input, 1x Inv, and 5fF cap load. The inverter is a 1x CMOS inverter,
built from modified asic lib symbols.
When I run gnetlist:
gnetlist -g spice-sdb test_inv1x.sch
I get the following error:
WARNING:
On Mar 14, 2009, at 12:03 PM, daledoug...@mindspring.com wrote:
When I run gnetlist:
gnetlist -g spice-sdb test_inv1x.sch
I get the following error:
WARNING: Found a placeholder/missing component, are you missing a
symbol file? [inv1x.sym]
My project-level gschemrc clearly defines
On Sat, 14 Mar 2009 13:41:47 -0600, John Doty wrote:
(component-library /Users/daledouglas/gEDA/development/schematics)
(component-library /Users/daledouglas/gEDA/development/testbenches)
I tend not to use absolute pathnames in the library search, as I work on
multiple machines and
On Tuesday 10 March 2009, r wrote:
On Tue, Mar 10, 2009 at 2:11 PM, al davis
ad...@freeelectron.net wrote:
Can you send me some examples of where it crashes?
I sent you a bug report recently. As for the newest revision,
I haven't tried it yet, sorry.
It was an assert fail, in a development
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